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SN74AVC4T245

SCES576G –JUNE 2004–REVISED NOVEMBER 2014

SN74AVC4T245 Dual-Bit Bus Transceiver with Configurable Voltage Translation

and 3-State Outputs

1 Features 3 Description

This 4-bit noninverting bus transceiver uses two

1• Control Inputs VIH/VIL Levels Are Referenced to separate configurable power-supply rails. The A port

VCCA Voltage is designed to track VCCA. VCCA accepts any supply

• Fully Configurable Dual-Rail Design Allows Each voltage from 1.2 V to 3.6 V. The B port is designed to

Port to Operate Over the Full 1.2-V to 3.6-V track VCCB. VCCB accepts any supply voltage from

Power-Supply Range 1.2 V to 3.6 V. The SN74AVC4T245 is optimized to

operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is

• I/Os Are 4.6-V Tolerant operational with VCCA/VCCB as low as 1.2 V. This

• Ioff Supports Partial Power-Down-Mode Operation allows for universal low-voltage bidirectional

• Maximum Data Rates translation between any of the 1.2-V, 1.5-V, 1.8-V,

2.5-V, and 3.3-V voltage nodes.

– 380 Mbps (1.8-V to 3.3-V Translation)

– 200 Mbps (< 1.8-V to 3.3-V Translation) The SN74AVC4T245 device is designed for

asynchronous communication between two data

– 200 Mbps (Translate to 2.5 V or 1.8 V) buses. The logic levels of the direction-control (DIR)

– 150 Mbps (Translate to 1.5 V) input and the output-enable (OE) input activate either

– 100 Mbps (Translate to 1.2 V) the B-port outputs or the A-port outputs or place both

output ports into the high-impedance mode. The

• Latch-Up Performance Exceeds 100 mA Per device transmits data from the A bus to the B bus

JESD 78, Class II when the B-port outputs are activated, and from the B

• ESD Protection Exceeds JESD 22 bus to the A bus when the A-port outputs are

– 8000-V Human-Body Model (A114-A) activated. The input circuitry on both A and B ports is

always active and must have a logic HIGH or LOW

– 150-V Machine Model (A115-A) level applied to prevent excess ICC and ICCZ.

– 1000-V Charged-Device Model (C101) The SN74AVC4T245 device is designed so that the

2 Applications control pins (1DIR, 2DIR, 1OE, and 2OE) are

supplied by VCCA.

• Personal Electronics This device is fully specified for partial-power-down

• Industrial applications using Ioff. The Ioff circuitry disables the

• Enterprise outputs, preventing damaging current backflow

• Telecom through the device when it is powered down.

The VCC isolation feature ensures that if either VCC

Logic Diagram (Positive Logic) input is at GND, then both ports are in the high-

for 1/2 of SN74AVC4T245 impedance state.

To ensure the high-impedance state during power up

or power down, OE should be tied to VCC through a

pullup resistor; the minimum value of the resistor is

determined by the current-sinking capability of the

driver.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

SOIC (16) 9.90 mm x 3.91 mm

TVSOP (16) 3.60 mm x 4.40 mm

SN74AVC4T245 TSSOP (16) 5.00 mm x 4.40 mm

VQFN (16) 4.00 mm x 3.50 mm

UQFN (16) 2.60 mm x 1.80 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

SN74AVC4T245

SCES576G –JUNE 2004–REVISED NOVEMBER 2014

www.ti.com

Table of Contents

1 Features.................................................................. 18 Detailed Description............................................ 12

8.1 Overview................................................................. 12

2 Applications ........................................................... 18.2 Functional Block Diagram....................................... 12

3 Description............................................................. 18.3 Feature Description................................................. 13

4 Revision History..................................................... 28.4 Device Functional Modes........................................ 13

5 Pin Configuration and Functions......................... 39 Application and Implementation ........................ 14

6 Specifications......................................................... 49.1 Application Information............................................ 14

6.1 Absolute Maximum Ratings ..................................... 49.2 Typical Application ................................................. 14

6.2 Handling Ratings....................................................... 410 Power Supply Recommendations ..................... 16

6.3 Recommended Operating Conditions....................... 511 Layout................................................................... 16

6.4 Thermal Information.................................................. 511.1 Layout Guidelines ................................................. 16

6.5 Electrical Characteristics .......................................... 611.2 Layout Example .................................................... 16

6.6 Operating Characteristics.......................................... 712 Device and Documentation Support................. 17

6.7 Switching Characteristics: VCCA = 1.2 V................... 712.1 Trademarks........................................................... 17

6.8 Switching Characteristics: VCCA = 1.5 V ± 0.1 V....... 812.2 Electrostatic Discharge Caution............................ 17

6.9 Switching Characteristics: VCCA = 1.8 V ± 0.15 V..... 812.3 Glossary................................................................ 17

6.10 Switching Characteristics: VCCA = 2.5 V ± 0.2 V..... 9

6.11 Switching Characteristics: VCCA = 3.3 V ± 0.3 V..... 913 Mechanical, Packaging, and Orderable

Information........................................................... 17

6.12 Typical Characteristics.......................................... 10 13.1 Package Materials Information ............................. 18

7 Parameter Measurement Information ................ 11

4 Revision History

Changes from Revision F (October 2014) to Revision G Page

• Changed Pin Functions table. ............................................................................................................................................... 3

• Changed Typical Application schematic. ............................................................................................................................. 14

Changes from Revision E (December 2011) to Revision F Page

• Added Applications,Pin Configuration and Functions section, Handling Rating table, Thermal Information table,

Feature Description section, Typical Characteristics section, Device Functional Modes, Application and

Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation

Support section, and Mechanical, Packaging, and Orderable Information section ............................................................... 1

Changes from Revision D (September 2007) to Revision E Page

• Fixed tPZL VCCB = 3.3 V parameter typographical error from 36.6 to 3.6................................................................................ 7

Product Folder Links: SN74AVC4T245

VCCA

1DIR

2DIR

1A1

1A2

2A1

2A2

GND

VCCB

1OE

2OE

1B1

1B2

2B1

2B2

GND

1 16

8 9

1OE

2OE

1B1

1B2

2B1

2B2

1DIR

2DIR

1A1

1A2

2A1

2A2

GND VCCB

GND VCCA

RSV PACKAGE

(TOP VIEW)

RGY PACKAGE

(TOP VIEW)

D, DGV, OR PW PACKAGE

(TOP VIEW)

1OE

2OE

1B1

1B2

2B1

2DIR

1A1

1A2

2A1

VCCB

1DIR

VCCA

12B2

2A2

GND

FLOAT

SN74AVC4T245

www.ti.com

SCES576G –JUNE 2004–REVISED NOVEMBER 2014

5 Pin Configuration and Functions

Pin Functions

PIN NO. TYPE DESCRIPTION

D, DGV,

NAME RSV

PW, RGY

1A1 4 6 I/O Input/output 1A1. Referenced to VCCA.

1A2 5 7 I/O Input/output 1A2. Referenced to VCCA.

1B1 13 15 I/O Input/output 1B1. Referenced to VCCB.

1B2 12 14 I/O Input/output 1B2. Referenced to VCCB.

1DIR 2 4 I Direction-control input for ‘1’ ports

3-state output-mode enables. Pull OE high to place ‘1’ outputs in 3-state

1OE 15 1 I mode. Referenced to VCCA.

2A1 6 8 I/O Input/output 2A1. Referenced to VCCA.

2A2 7 9 I/O Input/output 2A2. Referenced to VCCA.

2B1 11 13 I/O Input/output 2B1. Referenced to VCCB.

2B2 10 12 I/O Input/output 2B2. Referenced to VCCB.

2DIR 3 5 I Direction-control input for ‘2’ ports

3-state output-mode enables. Pull OE high to place ‘2’ outputs in 3-state

2OE 14 16 I mode. Referenced to VCCA.

GND 8, 9 10, 11 — Ground

VCCA 1 3 — A-port power supply voltage. 1.2 V ≤VCCA ≤3.6 V

VCCB 16 2 — B-port power supply voltage. 1.2 V ≤VCCB ≤3.6 V

Product Folder Links: SN74AVC4T245

SN74AVC4T245

SCES576G –JUNE 2004–REVISED NOVEMBER 2014

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6 Specifications

6.1 Absolute Maximum Ratings(1)

over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT

VCCA Supply voltage range –0.5 4.6 V

VCCB I/O ports (A port) –0.5 4.6

VIInput voltage range(2) I/O ports (B port) –0.5 4.6 V

Control inputs –0.5 4.6

A port –0.5 4.6

Voltage range applied to any output in the high-impedance or

VOV

power-off state(2) B port –0.5 4.6

A port –0.5 VCCA + 0.5

VOVoltage range applied to any output in the high or low state(2)(3) V

B port –0.5 VCCB + 0.5

IIK Input clamp current VI< 0 –50 mA

IOK Output clamp current VO< 0 –50 mA

IOContinuous output current ±50 mA

Continuous current through VCCA, VCCB, or GND ±100 mA

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.

(3) The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.

6.2 Handling Ratings MIN MAX UNIT

Tstg Storage temperature range –65 150 °C

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all 8

pins(1) kV

V(ESD) Electrostatic discharge Charged device model (CDM), per JEDEC specification 1

JESD22-C101, all pins(2)

Machine model (C101) 150 V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

Product Folder Links: SN74AVC4T245

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SCES576G –JUNE 2004–REVISED NOVEMBER 2014

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)(2)(3)

VCCI VCCO MIN MAX UNIT

VCCA Supply voltage 1.2 3.6 V

VCCB Supply voltage 1.2 3.6 V

1.2 V to 1.95 V VCCI × 0.65

High-level

VIH Data inputs(4) 1.95 V to 2.7 V 1.6 V

input voltage 2.7 V to 3.6 V 2

1.2 V to 1.95 V VCCI × 0.35

Low-level

VIL Data inputs(4) 1.95 V to 2.7 V 0.7 V

input voltage 2.7 V to 3.6 V 0.8

1.2 V to 1.95 V VCCA × 0.65

High-level DIR

VIH 1.95 V to 2.7 V 1.6 V

input voltage (referenced to VCCA)(5) 2.7 V to 3.6 V 2

1.2 V to 1.95 V VCCA × 0.35

Low-level DIR

VIL 1.95 V to 2.7 V 0.7 V

input voltage (referenced to VCCA)(5) 2.7 V to 3.6 V 0.8

VIInput voltage 0 3.6 V

Active state 0 VCCO

VOOutput voltage V

3-state 0 3.6

1.2 V –3

1.4 V to 1.6 V –6

IOH High-level output current 1.65 V to 1.95 V –8 mA

2.3 V to 2.7 V –9

3 V to 3.6 V –12

1.1 V to 1.2 V 3

1.4 V to 1.6 V 6

IOL Low-level output current 1.65 V to 1.95 V 8 mA

2.3 V to 2.7 V 9

3 V to 3.6 V 12

Δt/Δv Input transition rise or fall rate 5 ns/V

TAOperating free-air temperature –40 85 °C

(1) VCCI is the VCC associated with the input port.

(2) VCCO is the VCC associated with the output port.

(3) All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs (SCBA004).

(4) For VCCI values not specified in the data sheet, VIH min = VCCI × 0.7 V, VIL max = VCCI × 0.3 V

(5) For VCCI values not specified in the data sheet, VIH min = VCCA × 0.7 V, VIL max = VCCA × 0.3 V

6.4 Thermal Information SN74AVC4T245

THERMAL METRIC(1) D DGV PW RGY RSV UNIT

16 PINS

RθJA Junction-to-ambient thermal resistance 85.5 126.0 112.0 37.5 146.9

RθJC(top) Junction-to-case (top) thermal resistance 46.9 50.8 46.8 54.5 53.6

RθJB Junction-to-board thermal resistance 43.0 57.7 57.1 15.6 75.6 °C/W

ψJT Junction-to-top characterization parameter 13.4 5.7 5.7 0.5 13.5

ψJB Junction-to-board characterization parameter 42.7 57.2 56.5 15.8 75.6

RθJC(bot) Junction-to-case (bottom) thermal resistance — — — 3.5 —

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953).

Product Folder Links: SN74AVC4T245

SN74AVC4T245

SCES576G –JUNE 2004–REVISED NOVEMBER 2014

www.ti.com

6.5 Electrical Characteristics(1)(2)

over recommended operating free-air temperature range (unless otherwise noted)

TA= 25°C –40°C to 85°C

PARAMETER TEST CONDITIONS VCCA VCCB UNIT

MIN TYP MAX MIN MAX

IOH = –100 μA 1.2 V to 3.6 V 1.2 V to 3.6 V VCCO – 0.2

IOH = –3 mA 1.2 V 1.2 V 0.95

IOH = –6 mA 1.4 V 1.4 V 1.05

VOH VI= VIH V

IOH = –8 mA 1.65 V 1.65 V 1.2

IOH = –9 mA 2.3 V 2.3 V 1.75

IOH = –12 mA 3 V 3 V 2.3

IOL = 100 μA 1.2 V to 3.6 V 1.2 V to 3.6 V 0.2

IOL = 3 mA 1.2 V 1.2 V 0.25

IOL = 6 mA 1.4 V 1.4 V 0.35

VOL VI= VIL V

IOL = 8 mA 1.65 V 1.65 V 0.45

IOL = 9 mA 2.3 V 2.3 V 0.55

IOL = 12 mA 3 V 3 V 0.7

Control

IIVI= VCCA or GND 1.2 V to 3.6 V 1.2 V to 3.6 V ±0.025 ±0.25 ±1 μA

inputs 0 V 0 V to 3.6 V ±0.1 ±1 ±5

Ioff A or B port VIor VO= 0 to 3.6 V μA

0 V to 3.6 V 0 V ±0.1 ±1 ±5

VO= VCCO or GND,

IOZ A or B port 3.6 V 3.6 V ±0.5 ±2.5 ±5 μA

VI= VCCI or GND, OE = VIH 1.2 V to 3.6 V 1.2 V to 3.6 V 8

ICCA VI= VCCI or GND, IO= 0 0 V 0 V to 3.6 V –2 μA

0 V to 3.6 V 0 V 8

1.2 V to 3.6 V 1.2 V to 3.6 V 8

ICCB VI= VCCI or GND, IO= 0 0 V 0 V to 3.6 V 8 μA

0 V to 3.6 V 0 V –2

ICCA + ICCB VI= VCCI or GND, IO= 0 1.2 V to 3.6 V 1.2 V to 3.6 V 16 μA

Control

CiVI= 3.3 V or GND 3.3 V 3.3 V 3.5 4.5 pF

inputs

Cio A or B port VO= 3.3 V or GND 3.3 V 3.3 V 6 7 pF

(1) VCCO is the VCC associated with the output port.

(2) VCCI is the VCC associated with the input port.

Product Folder Links: SN74AVC4T245

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SCES576G –JUNE 2004–REVISED NOVEMBER 2014

6.6 Operating Characteristics

TA= 25°C VCCA = VCCA = VCCA = VCCA = VCCA =

TEST VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V

PARAMETER UNIT

CONDITIONS TYP TYP TYP TYP TYP

Outputs 1 1 1 1.5 2

enabled

A to B Outputs 1 1 1 1 1

CL= 0,

disabled

CpdA (1) f = 10 MHz, pF

Outputs tr= tf= 1 ns 12 12.5 13 14 15

enabled

B to A Outputs 1 1 1 1 1

disabled

Outputs 12 12.5 13 14 15

enabled

A to B Outputs 1 1 1 1 1

CL= 0,

disabled

CpdB (1) f = 10 MHz, pF

Outputs tr= tf= 1 ns 1 1 1 1 2

enabled

B to A Outputs 1 1 1 1 1

disabled

(1) Power dissipation capacitance per transceiver

6.7 Switching Characteristics: VCCA = 1.2 V

over recommended operating free-air temperature range, VCCA = 1.2 V (unless otherwise noted) (see Figure 3)

VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V

VCCB = 1.2 V

FROM TO ± 0.1 V ± 0.15 V ± 0.2 V ± 0.3 V

PARAMETER UNIT

(INPUT) (OUTPUT) TYP TYP TYP TYP TYP

tPLH 3.4 2.9 2.7 2.6 2.8

A B ns

tPHL 3.4 2.9 2.7 2.6 2.8

tPLH 3.6 3.1 2.8 2.6 2.6

B A ns

tPHL 3.6 3.1 2.8 2.6 2.6

tPZH 5.6 4.7 4.3 3.9 3.7

OE A ns

tPZL 5.6 4.7 4.3 3.9 3.7

tPZH 5 4.3 3.9 3.6 3.6

OE B ns

tPZL 5 4.3 3.9 3.6 3.6

tPHZ 6.2 5.2 5.2 4.3 4.8

OE A ns

tPLZ 6.2 5.2 5.2 4.3 4.8

tPHZ 5.9 5.1 5 4.7 5.5

OE B ns

tPLZ 5.9 5.1 5 4.7 5.5

Product Folder Links: SN74AVC4T245

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SCES576G –JUNE 2004–REVISED NOVEMBER 2014

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6.8 Switching Characteristics: VCCA = 1.5 V ± 0.1 V

over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 3)

VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V

VCCB = 1.2 V

FROM TO ± 0.1 V ± 0.15 V ± 0.2 V ± 0.3 V

PARAMETER UNIT

(INPUT) (OUTPUT) TYP MIN MAX MIN MAX MIN MAX MIN MAX

tPLH 3.2 0.3 6.3 0.3 5.2 0.4 4.2 0.4 4.2

A B ns

tPHL 3.2 0.3 6.3 0.3 5.2 0.4 4.2 0.4 4.2

tPLH 3.3 0.7 6.3 0.5 6 0.4 5.7 0.3 5.6

B A ns

tPHL 3.3 0.7 6.3 0.5 6 0.4 5.7 0.3 5.6

tPZH 4.9 1.4 9.6 1.1 9.5 0.7 9.4 0.4 9.4

OE A ns

tPZL 4.9 1.4 9.6 1.1 9.5 0.7 9.4 0.4 9.4

tPZH 4.5 1.4 9.6 1.1 7.7 0.9 5.8 0.9 5.6

OE B ns

tPZL 4.5 1.4 9.6 1.1 7.7 0.9 5.8 0.9 5.6

tPHZ 5.6 1.8 10.2 1.5 10.2 1.3 10.2 1.6 10.2

OE A ns

tPLZ 5.6 1.8 10.2 1.5 10.2 1.3 10.2 1.6 10.2

tPHZ 5.2 1.9 10.3 1.9 9.1 1.4 7.4 1.2 7.6

OE B ns

tPLZ 5.2 1.9 10.3 1.9 9.1 1.4 7.4 1.2 7.6

6.9 Switching Characteristics: VCCA = 1.8 V ± 0.15 V

over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 3)

VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V

VCCB = 1.2 V

FROM TO ± 0.1 V ± 0.15 V ± 0.2 V ± 0.3 V

PARAMETER UNIT

(INPUT) (OUTPUT) TYP MIN MAX MIN MAX MIN MAX MIN MAX

tPLH 2.9 0.1 6 0.1 4.9 0.1 3.9 0.3 3.9

A B ns

tPHL 2.9 0.1 6 0.1 4.9 0.1 3.9 0.3 3.9

tPLH 3 0.6 5.3 0.5 4.9 0.3 4.6 0.3 4.5

B A ns

tPHL 3 0.6 5.3 0.5 4.9 0.3 4.6 0.3 4.5

tPZH 4.4 1 7.4 1 7.3 0.6 7.3 0.4 7.2

OE A ns

tPZL 4.4 1 7.4 1 7.3 0.6 7.3 0.4 7.2

tPZH 4.1 1.2 9.2 1 7.4 0.8 5.3 0.8 4.6

OE B ns

tPZL 4.1 1.2 9.2 1 7.4 0.8 5.3 0.8 4.6

tPHZ 5.4 1.6 8.6 1.8 8.7 1.3 8.7 1.6 8.7

OE A ns

tPLZ 5.4 1.6 8.6 1.8 8.7 1.3 8.7 1.6 8.7

tPHZ 5 1.7 9.9 1.6 8.7 1.2 6.9 1 6.9

OE B ns

tPLZ 5 1.7 9.9 1.6 8.7 1.2 6.9 1 6.9

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SCES576G –JUNE 2004–REVISED NOVEMBER 2014

6.10 Switching Characteristics: VCCA = 2.5 V ± 0.2 V

over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 3)

VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V

VCCB = 1.2 V

FROM TO ± 0.1 V ± 0.15 V ± 0.2 V ± 0.3 V

PARAMETER UNIT

(INPUT) (OUTPUT) TYP MIN MAX MIN MAX MIN MAX MIN MAX

tPLH 2.8 0.1 5.7 0.1 4.6 0.2 3.5 0.1 3.6

A B ns

tPHL 2.8 0.1 5.7 0.1 4.6 0.2 3.5 0.1 3.6

tPLH 2.7 0.6 4.2 0.4 3.9 0.2 3.4 0.2 3.3

B A ns

tPHL 2.7 0.6 4.2 0.4 3.9 0.2 3.4 0.2 3.3

tPZH 4 0.7 6.5 0.7 5.2 0.6 4.8 0.4 4.8

OE A ns

tPZL 4 0.7 6.5 0.7 5.2 0.6 4.8 0.4 4.8

tPZH 3.8 0.9 8.8 0.8 7 0.6 4.8 0.6 4

OE B ns

tPZL 3.8 0.9 8.8 0.8 7 0.6 4.8 0.6 4

tPHZ 4.7 1 8.4 1 8.4 1 6.2 1 6.6

OE A ns

tPLZ 4.7 1 8.4 1 8.4 1 6.2 1 6.6

tPHZ 4.5 1.5 9.4 1.3 8.2 1.1 6.2 0.9 5.2

OE B ns

tPLZ 4.5 1.5 9.4 1.3 8.2 1.1 6.2 0.9 5.2

6.11 Switching Characteristics: VCCA = 3.3 V ± 0.3 V

over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 3)

VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V

VCCB = 1.2 V

FROM TO ± 0.1 V ± 0.15 V ± 0.2 V ± 0.3 V

PARAMETER UNIT

(INPUT) (OUTPUT) TYP MIN MAX MIN MAX MIN MAX MIN MAX

tPLH 2.9 0.1 5.6 0.1 4.5 0.1 3.3 0.1 2.9

A B ns

tPHL 2.9 0.1 5.6 0.1 4.5 0.1 3.3 0.1 2.9

tPLH 2.6 0.6 4.2 0.4 3.4 0.2 3 0.1 2.8

B A ns

tPHL 2.6 0.6 4.2 0.4 3.4 0.2 3 0.1 2.8

tPZH 3.8 0.6 8.7 0.6 5.2 0.6 3.8 0.4 3.8

OE A ns

tPZL 3.8 0.6 8.7 0.6 5.2 0.6 3.8 0.4 3.8

tPZH 3.7 0.8 8.7 0.6 6.8 0.5 4.7 0.5 3.8

OE B ns

tPZL 3.7 0.8 8.7 0.6 6.8 0.5 4.7 0.5 3.8

tPHZ 4.8 0.7 9.3 0.7 8.3 0.7 5.6 0.7 6.6

OE A ns

tPLZ 4.8 0.7 9.3 0.7 8.3 0.7 5.6 0.7 6.6

tPHZ 5.3 1.4 9.3 1.2 8.1 1 6.4 0.8 6.2

OE B ns

tPLZ 5.3 1.4 9.3 1.2 8.1 1 6.4 0.8 6.2

Product Folder Links: SN74AVC4T245

0 20 40 60 80 100

I Current (mA)OL

0.4

0.8

1.2

1.6

2.0

2.4

2.8

3.2

3.6

VOL Voltage (V)

-40

°C

0 20 40 60 80 100

I Current (mA)OH

0.4

0.8

1.2

1.6

2.0

2.4

2.8

3.2

3.6

VOH Voltage (V)

-40

°C

SN74AVC4T245

SCES576G –JUNE 2004–REVISED NOVEMBER 2014

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6.12 Typical Characteristics

Figure 1. Low-Level Output Voltage (VOL) Figure 2. High-Level Output Voltage (VOH)

vs Low-Level Current (IOL) vs High-Level Current (IOH)

Product Folder Links: SN74AVC4T245

VOH

VOL

From Output

Under Test

(see Note A)

LOAD CIRCUIT

2×VCCO

Open

GND

tPLH tPHL

Output

Control

(low-level

enabling)

Output

Waveform 1

S1 at 2 ×VCCO

(see Note B)

Output

Waveform 2

S1 at GND

(see Note B)

tPZL

tPZH

tPLZ

tPHZ

VCCA/2VCCA/2

VCCI/2 VCCI/2

VCCI

0 V

VCCO/2 VCCO/2

VOH

VOL

0 V

VCCO/2 VOL + VTP

VCCO/2 VOH − VTP

0 V

VCCI

0 V

VCCI/2 VCCI/2

Input

VCCA

VCCO

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VOLTAGE WAVEFORMS

PULSE DURATION

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

Output

Input

tpd

tPLZ/tPZL

tPHZ/tPZH

Open

2×VCCO

GND

TEST S1

NOTES: A. CLincludes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO= 50 Ω, dv/dt ≥1 V/ns.

D. The outputs are measured one at a time, with one transition per measurement.

E. tPLZ and tPHZ are the same as tdis.

F. tPZL and tPZH are the same as ten.

G. tPLH and tPHL are the same as tpd.

H. VCCI is the VCC associated with the input port.

I. VCCO is the VCC associated with the output port.

1.2 V

1.5 V ±0.1 V

1.8 V ±0.15 V

2.5 V ±0.2 V

3.3 V ±0.3 V

2 kΩ

VCCO RL

0.1 V

0.15 V

0.3 V

VTP

15 pF

SN74AVC4T245

www.ti.com

SCES576G –JUNE 2004–REVISED NOVEMBER 2014

7 Parameter Measurement Information

Figure 3. Load and Circuit and Voltage Waveforms

Product Folder Links: SN74AVC4T245

DIR

SN74AVC4T245

SCES576G –JUNE 2004–REVISED NOVEMBER 2014

www.ti.com

8 Detailed Description

8.1 Overview

The SN74AVC4T245 is a 4-bit, dual-supply noninverting bidirectional voltage level translation device. Ax pins

and control pins (1DIR, 2DIR,1OE, and 2OE) are supported by VCCA, and Bx pins are supported by VCCB. The A

port is able to accept I/O voltages ranging from 1.2 V to 3.6 V, while the B port can accept I/O voltages from

1.2 V to 3.6 V. A high on DIR allows data transmission from Ax to Bx and a low on DIR allows data transmission

from Bx to Ax when OE is set to low. When OE is set to high, both Ax and Bx pins are in the high-impedance

state.

8.2 Functional Block Diagram

Figure 4. Logic Diagram (Positive Logic) for 1/2 of SN74AVC4T245

Product Folder Links: SN74AVC4T245

SN74AVC4T245

www.ti.com

SCES576G –JUNE 2004–REVISED NOVEMBER 2014

8.3 Feature Description

8.3.1 Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2-V to 3.6-V

Power-Supply Range

Both VCCA and VCCB can be supplied at any voltage between 1.2 V and 3.6 V; thus, making the device suitable

for translating between any of the low voltage nodes (1.2 V, 1.8 V, 2.5 V, and 3.3 V).

8.3.2 Supports High Speed Translation

The SN74AVC4T245 device can support high data rate applications. The translated signal data rate can be up to

380 Mbps when the signal is translated from 1.8 V to 3.3 V.

8.3.3 Ioff Supports Partial-Power-Down Mode Operation

Ioff will prevent backflow current by disabling I/O output circuits when device is in partial-power-down mode.

8.4 Device Functional Modes

Table 1. Function Table

(Each 2-Bit Section)(1)

CONTROL INPUTS OUTPUT CIRCUITS OPERATION

OE DIR A PORT B PORT

L L Enabled Hi-Z B data to A bus

L H Hi-Z Enabled A data to B bus

H X Hi-Z Hi-Z Isolation

(1) Input circuits of the data I/Os are always active.

Product Folder Links: SN74AVC4T245

SN74AVC4T245

1OE

1DIR

1A1

1A2

2A1

2A2

1.2 V

Controller

1B1

1B2

2B1

2B2

3.3 V

System

1.2 V

0.1 Cμ 0.1 Cμ 1 µF

3.3 V

GND GND GND

2OE

2DIR

Data Data

CCA CCB

SN74AVC4T245

SCES576G –JUNE 2004–REVISED NOVEMBER 2014

www.ti.com

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

The SN74AVC4T245 device can be used in level-translation applications for interfacing devices or systems

operating at different interface voltages with one another. The SN74AVC4T245 device is ideal for use in

applications where a push-pull driver is connected to the data I/Os. The max data rate can be up to 380 Mbps

when device translates a signal from 1.8 V to 3.3 V.

9.2 Typical Application

Figure 5. Typical Application Diagram

Product Folder Links: SN74AVC4T245

Input (1.2 V)

Output (3.3 V)

SN74AVC4T245

www.ti.com

SCES576G –JUNE 2004–REVISED NOVEMBER 2014

Typical Application (continued)

9.2.1 Design Requirements

For the design example shown in Typical Application, use the parameters listed in Table 2.

Table 2. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE

Input voltage range 1.2 V to 3.6 V

Output voltage range 1.2 V to 3.6 V

9.2.2 Detailed Design Procedure

To begin the design process, determine the following:

• Input voltage range

– Use the supply voltage of the device that is driving the SN74AVC4T245 device to determine the input

voltage range. For a valid logic high, the value must exceed the VIH of the input port. For a valid logic low,

the value must be less than the VIL of the input port.

• Output voltage range

– Use the supply voltage of the device that the SN74AVC4T245 device is driving to determine the output

voltage range.

9.2.3 Application Curves

Figure 6. Translation Up (1.2 V to 3.3 V) at 2.5 MHz

Product Folder Links: SN74AVC4T245

1B11A1

1DIR

2OE

VCCB

2DIR

LEGEND

VIA to Power Plane

VIA to GND Plane (Inner Layer)

Polygonal Copper Pour

From

Controller

Bypass Capacitor

VCCA

GNDGND

2A1

2B2

1A2 1B2

2B1

2A2

VCCA

1OE

VCCB

Bypass Capacitor

From

Controller

System

Controller

From

System

From

System

SN74AVC4T245

VCCA

Keep OE high until VCCA and

VCCB are powered up

SN74AVC4T245

SCES576G –JUNE 2004–REVISED NOVEMBER 2014

www.ti.com

10 Power Supply Recommendations

The SN74AVC4T245 device uses two separate configurable power-supply rails, VCCA and VCCB. VCCA accepts

any supply voltage from 1.2 V to 3.6 V and VCCB accepts any supply voltage from 1.2 V to 3.6 V. The A port and

B port are designed to track VCCA and VCCB respectively allowing for low-voltage bidirectional translation between

any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V and 3.3-V voltage nodes.

The output-enable (OE) input circuit is designed so that it is supplied by VCCA and when the OE input is high, all

outputs are placed in the high-impedance state. To ensure the high-impedance state of the outputs during power

up or power down, the OE input pin must be tied to VCCA through a pullup resistor and must not be enabled until

VCCA and VCCB are fully ramped and stable. The minimum value of the pullup resistor to VCCA is determined by

the current-sinking capability of the driver.

11 Layout

11.1 Layout Guidelines

To ensure reliability of the device, following common printed-circuit board layout guidelines is recommended.

• Bypass capacitors should be used on power supplies.

• Short trace lengths should be used to avoid excessive loading.

• Place pads on the signal paths for loading capacitors or pullup resistors to help adjust rise and fall times of

signals, depending on the system requirements.

11.2 Layout Example

Product Folder Links: SN74AVC4T245

SN74AVC4T245

www.ti.com

SCES576G –JUNE 2004–REVISED NOVEMBER 2014

12 Device and Documentation Support

12.1 Trademarks

All trademarks are the property of their respective owners.

12.2 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

12.3 Glossary

SLYZ022 —TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Product Folder Links: SN74AVC4T245

Reel Width (W1)

REEL DIMENSIONS

Dimension designed to accommodate the component length

Dimension designed to accommodate the component thickness

Overall width of the carrier tape

Pitch between successive cavity centers

Dimension designed to accommodate the component width

TAPE DIMENSIONS

K0 P1

B0 W

Cavity

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Pocket Quadrants

Sprocket Holes

Q1 Q1

Q2 Q2

Q3 Q3Q4 Q4

Reel

Diameter

User Direction of Feed

SN74AVC4T245

SCES576G –JUNE 2004–REVISED NOVEMBER 2014

www.ti.com

13.1 Package Materials Information

13.1.1 Tape and Reel Information

Reel Reel

Package Package A0 B0 K0 P1 W Pin1

Device Pins SPQ Diameter Width W1

Type Drawing (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) (mm)

SN74AVC4T245DGVR TVSOP DGV 16 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1

SN74AVC4T245DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1

SN74AVC4T245PWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1

SN74AVC4T245RGYR VQFN RGY 16 3000 330.0 12.4 3.8 4.3 1.5 8.0 12.0 Q1

SN74AVC4T245RSVR UQFN RSV 16 3000 180.0 12.4 2.1 2.9 0.75 4.0 12.0 Q1

Product Folder Links: SN74AVC4T245

TAPE AND REEL BOX DIMENSIONS

Width (mm)

SN74AVC4T245

www.ti.com

SCES576G –JUNE 2004–REVISED NOVEMBER 2014

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

SN74AVC4T245DGVR TVSOP DGV 16 2000 367.0 367.0 35.0

SN74AVC4T245DR SOIC D 16 2500 333.2 345.9 28.6

SN74AVC4T245PWR TSSOP PW 16 2000 367.0 367.0 35.0

SN74AVC4T245RGYR VQFN RGY 16 3000 367.0 367.0 35.0

SN74AVC4T245RGYR VQFN RGY 16 3000 355.0 350.0 50.0

SN74AVC4T245RSVR UQFN RSV 16 3000 203.0 203.0 35.0

Product Folder Links: SN74AVC4T245

PACKAGE OPTION ADDENDUM

www.ti.com 24-Aug-2018

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

74AVC4T245DGVRE4 ACTIVE TVSOP DGV 16 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 WT245

74AVC4T245RGYRG4 ACTIVE VQFN RGY 16 3000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 WT245

74AVC4T245RSVRG4 ACTIVE UQFN RSV 16 3000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ZWU

HPA00719RSVR ACTIVE UQFN RSV 16 3000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ZWU

SN74AVC4T245D ACTIVE SOIC D 16 40 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AVC4T245

SN74AVC4T245DGVR ACTIVE TVSOP DGV 16 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 WT245

SN74AVC4T245DR ACTIVE SOIC D 16 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AVC4T245

SN74AVC4T245DRE4 ACTIVE SOIC D 16 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AVC4T245

SN74AVC4T245DT ACTIVE SOIC D 16 250 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 AVC4T245

SN74AVC4T245PW ACTIVE TSSOP PW 16 90 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 WT245

SN74AVC4T245PWE4 ACTIVE TSSOP PW 16 90 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 WT245

SN74AVC4T245PWR ACTIVE TSSOP PW 16 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 WT245

SN74AVC4T245PWRE4 ACTIVE TSSOP PW 16 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 WT245

SN74AVC4T245PWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 WT245

SN74AVC4T245PWT ACTIVE TSSOP PW 16 250 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 WT245

SN74AVC4T245PWTE4 ACTIVE TSSOP PW 16 250 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 WT245

SN74AVC4T245PWTG4 ACTIVE TSSOP PW 16 250 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 WT245

PACKAGE OPTION ADDENDUM

www.ti.com 24-Aug-2018

Addendum-Page 2

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

SN74AVC4T245RGYR ACTIVE VQFN RGY 16 3000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 WT245

SN74AVC4T245RSVR ACTIVE UQFN RSV 16 3000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 ZWU

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish

value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF SN74AVC4T245 :

PACKAGE OPTION ADDENDUM

www.ti.com 24-Aug-2018

Addendum-Page 3

•Automotive: SN74AVC4T245-Q1

NOTE: Qualified Version Definitions:

•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

SN74AVC4T245DGVR TVSOP DGV 16 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1

SN74AVC4T245DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1

SN74AVC4T245PWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1

SN74AVC4T245PWT TSSOP PW 16 250 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1

SN74AVC4T245RGYR VQFN RGY 16 3000 330.0 12.4 3.8 4.3 1.5 8.0 12.0 Q1

SN74AVC4T245RSVR UQFN RSV 16 3000 178.0 13.5 2.1 2.9 0.75 4.0 12.0 Q1

SN74AVC4T245RSVR UQFN RSV 16 3000 180.0 12.4 2.1 2.9 0.75 4.0 12.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 6-Jan-2018

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

SN74AVC4T245DGVR TVSOP DGV 16 2000 367.0 367.0 35.0

SN74AVC4T245DR SOIC D 16 2500 333.2 345.9 28.6

SN74AVC4T245PWR TSSOP PW 16 2000 367.0 367.0 35.0

SN74AVC4T245PWT TSSOP PW 16 250 367.0 367.0 35.0

SN74AVC4T245RGYR VQFN RGY 16 3000 355.0 350.0 50.0

SN74AVC4T245RSVR UQFN RSV 16 3000 189.0 185.0 36.0

SN74AVC4T245RSVR UQFN RSV 16 3000 203.0 203.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 6-Jan-2018

Pack Materials-Page 2

MECHANICAL DATA

MPDS006C – FEBRUAR Y 1996 – REVISED AUGUST 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE

24 PINS SHOWN

3,70

3,50 4,90

5,10

DIM

PINS **

4073251/E 08/00

1,20 MAX

Seating Plane

0,05

0,15

0,25

0,50

0,75

0,23

0,13

112

24 13

4,30

4,50

0,16 NOM

Gage Plane

7,90

7,70

382416

4,90

5,103,70

3,50

A MAX

A MIN

6,60

6,20

11,20

11,40

9,60

9,80

0,08

0,07

0,40

0°–8°

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.

D. Falls within JEDEC: 24/48 Pins – MO-153

14/16/20/56 Pins – MO-194

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TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product).

Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications

and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory

requirements in connection with such selection.

Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s non-

compliance with the terms and provisions of this Notice.

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

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Texas Instruments:

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SN74AVC4T245DR SN74AVC4T245DRE4 SN74AVC4T245DT SN74AVC4T245DTE4 SN74AVC4T245PW

SN74AVC4T245PWE4 SN74AVC4T245PWR SN74AVC4T245PWT SN74AVC4T245RGYR 74AVC4T245DGVRG4

74AVC4T245DGVRE4 74AVC4T245RGYRG4 SN74AVC4T245DG4 SN74AVC4T245DRG4 SN74AVC4T245DTG4

SN74AVC4T245PWG4 SN74AVC4T245PWRG4 SN74AVC4T245PWTG4 SN74AVC4T245RSVR

74AVC4T245RSVRG4 HPA00719RSVR