SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
D-Type Flip-Flops in a Single Package With
3-State Bus Driving True Outputs
D
Full Parallel Access for Loading
D
Buffered Control Inputs
D
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic (N)
and Ceramic (J) DIPs
description
These octal D-type edge-triggered flip-flops
feature 3-state outputs designed specifically for
driving highly capacitive or relatively
low-impedance loads. They are particularly
suitable for implementing buffer registers, I/O
ports, bidirectional bus drivers, and working
registers.
On the positive transition of the clock (CLK) input,
the Q outputs are set to the logic levels set up at
the data (D) inputs.
A buffered output-enable (OE) input places the
eight outputs in either a normal logic state (high or
low logic levels) or the high-impedance state. In
the high-impedance state, the outputs neither
load nor drive the bus lines significantly. The
high-impedance state and the increased drive
provide the capability to drive bus lines without
interface or pullup components.
OE does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
The SN54ALS374A and SN54AS374 are characterized for operation over the full military temperature range
of –55°C to 125°C. The SN74ALS374A and SN74AS374 are characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each flip-flop)
INPUTS OUTPUT
OE CLK DQ
L↑H H
L↑LL
LH or L X Q0
H X X Z
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
VCC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
SN54ALS374A, SN54AS374 . . . J P ACKAGE
SN74ALS374A, SN74AS374 . . . DW OR N PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
8D
7D
7Q
6Q
6D
2D
2Q
3Q
3D
4D
SN54ALS374A, SN54AS374 . . . FK PACKAGE
(TOP VIEW)
1D
1Q
OE
5Q
5D 8Q
4Q
GND
CLK VCC
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol†
†This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
C1
OE EN
1
11
CLK
1D
3
1D 4
2D 7
3D 8
4D
5Q
12
6Q
15
7Q
16
8Q
19
13
5D 14
6D 17
7D 18
8D
1Q
2
2Q
5
3Q
6
4Q
9
logic diagram (positive logic)
1D
CLK
1Q
2
11
3
1
1D
OE
C1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to a disabled 3-state output –0.5 V to 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 1): DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions
SN54ALS374A SN74ALS374A
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.7 0.8 V
IOH High-level output current –1 –2.6 mA
IOL Low-level output current 12 24 mA
TAOperating free-air temperature –55 125 0 70 °C
SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54ALS374A SN74ALS374A
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP†MAX MIN TYP†MAX
UNIT
VIK VCC = 4.5 V, II = –18 mA –1.5 –1.5 V
VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC–2 VCC–2
VOH
VCC =45V
IOH = –1 mA 2.4 3.3 V
V
CC =
4
.
5
V
IOH = –2.6 mA 2.4 3.2
VOL
VCC =45V
IOL = 12 mA 0.25 0.4 0.25 0.4
V
V
OL
V
CC =
4
.
5
V
IOL = 24 mA 0.35 0.5
V
IOZH VCC = 5.5 V, VO = 2.7 V 20 20 µA
IOZL VCC = 5.5 V, VO = 0.4 V –20 –20 µA
IIVCC = 5.5 V, VI = 7 V 0.1 0.1 mA
IIH VCC = 5.5 V, VI = 2.7 V 20 20 µA
IIL VCC = 5.5 V, VI = 0.4 V –0.2 –0.2 mA
IO‡VCC = 5.5 V, VO = 2.25 V –20 –112 –30 –112 mA
Outputs high 11 20 11 19
ICC VCC = 5.5 V Outputs low 19 28 19 28 mA
Outputs disabled 20 31 20 31
†All typical values are at VCC = 5 V, TA = 25°C.
‡The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
timing requirements over recommended operating free-air temperature range (unless otherwise
noted)
SN54ALS374A SN74ALS374A
UNIT
MIN MAX MIN MAX
UNIT
fclock Clock frequency 30 35 MHz
twPulse duration CLK high or low 16.5 14 ns
tsu Setup time Data before CLK↑10 10 ns
thHold time Data after CLK↑4 0 ns
switching characteristics over recommended operating conditions (unless otherwise noted
(see Figure 3)
PARAMETER
FROM TO SN54ALS374A SN74ALS374A
UNIT
PARAMETER
(INPUT) (OUTPUT) MIN MAX MIN MAX
UNIT
fmax 30 35 MHz
tPLH
CLK
Q
3 14 3 12
ns
tPHL
CLK
Q
5 17 5 16
ns
tPZH
OE
Q
3 18 3 17
ns
tPZL
OE
Q
5 21 5 18
ns
tPHZ
OE
Q
111 1 10
ns
tPLZ
OE
Q
2 19 2 18
ns
SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions
SN54AS374 SN74AS374
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.7 0.8 V
IOH High-level output current –12 –15 mA
IOL Low-level output current 32 48 mA
TAOperating free-air temperature –55 125 0 70 °C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54AS374 SN74AS374
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP†MAX MIN TYP†MAX
UNIT
VIK VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –2 mA VCC–2 VCC–2
VOH
VCC =45V
IOH = –12 mA 2.4 3.2 V
V
CC =
4
.
5
V
IOH = –15 mA 2.4 3.3
VOL
VCC =45V
IOL = 32 mA 0.29 0.5
V
V
OL
V
CC =
4
.
5
V
IOL = 48 mA 0.34 0.5
V
IOZH VCC = 5.5 V, VO = 2.7 V 50 50 µA
IOZL VCC = 5.5 V, VO = 0.4 V –50 –50 µA
IIVCC = 5.5 V, VI = 7 V 0.1 0.1 mA
IIH VCC = 5.5 V, VI = 2.7 V 20 20 µA
IIL
OE, CLK
VCC =55V
VI=04V
–0.5 –0.5
mA
I
IL Data
V
CC =
5
.
5
V
,
V
I =
0
.
4
V
–3 –2
mA
IO‡VCC = 5.5 V, VO = 2.25 V –30 –112 –30 –112 mA
Outputs high 77 120 77 120
ICC VCC = 5.5 V Outputs low 84 128 84 128 mA
Outputs disabled 84 128 84 128
†All typical values are at VCC = 5 V, TA = 25°C.
‡The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
timing requirements over recommended operating free-air temperature range (unless otherwise
noted)
SN54AS374 SN74AS374
UNIT
MIN MAX MIN MAX
UNIT
fclock Clock frequency 100* 125 MHz
t
CLK high 5.5* 4
ns
t
w
u
u
CLK low 3* 3
ns
tsu Setup time Data before CLK↑3* 2 ns
thHold time Data after CLK↑3* 2 ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended operating conditions (unless otherwise noted)
(see Figure 3)
PARAMETER
FROM TO SN54AS374 SN74AS374
UNIT
PARAMETER
(INPUT) (OUTPUT) MIN MAX MIN MAX
UNIT
fmax 100* 125 MHz
tPLH
CLK
Q
311 3 8
ns
tPHL
CLK
Q
4 11.5 4 9
ns
tPZH
OE
Q
2 7 2 6
ns
tPZL
OE
Q
311 3 10
ns
tPHZ
OE
Q
2 10 2 6
ns
tPLZ
OE
Q
2 7 2 6
ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
X/Y
’ALS139
A
B
G
A
B
G
Output-Enable
Select
Input Clock
Select
Clock
1
2
EN
0
1
2
3
8 8
EN
C
Four SN54ALS374A,
SN74ALS374A,
or ’AS374
8 8
EN
C
8 8
EN
C
8 8
EN
C
8 8
Input Output
Figure 1. Expandable 4-Word by 8-Bit General File Register
SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
EN
C1
1D
SN54ALS374A,
SN74ALS374A,
or ’AS374
EN
C1
Bidirectional
Data Bus 1 Bidirectional
Data Bus 2
Output Enable 1
Clock 1
Output Enable 2
Clock 2
H
H
Clock 1
Clock 2
Bus-Exchange
Clock
1D
Clock Circuit for Bus Exchange
SN54ALS374A,
SN74ALS374A,
or ’AS374
Figure 2. Bidirectional Bus Driver
SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS167C – APRIL 1982 – REVISED NOVEMBER 1999
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
tPHZ
tPLZ
tPHL tPLH
tPZL
tPZH
tPLH tPHL
LOAD CIRCUIT FOR
3-STATE OUTPUTS
From Output
Under Test Test
Point
S1
CL = 50 pF
(see Note A)
7 V
3.5 V
3.5 V
0.3 V
0.3 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
Data
Input
3.5 V
3.5 V
0.3 V
0.3 V
High-Level
Pulse
Low-Level
Pulse
tw
VOLTAGE WAVEFORMS
PULSE DURATIONS
Input
Out-of-Phase
Output
(see Note C)
3.5 V
3.5 V
0.3 V
0.3 V
VOL
VOH
VOH
VOL
Output
Control
W aveform 1
S1 Closed
(see Note B)
W aveform 2
S1 Open
(see Note B) ≈0 V
VOH
VOL
≈3.5 V
In-Phase
Output
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
VCC
Test
Point
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT FOR
OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT FOR
BI-STATE TOTEM-POLE OUTPUTS
From Output
Under Test Test
Point
CL = 50 pF
(see Note A) 500 Ω
500 Ω
500 Ω
500 Ω
VOL + 0.3 V
VOH – 0.3 V
1.3 V
1.3 V1.3 V
1.3 V 1.3 V
1.3 V 1.3 V
1.3 V 1.3 V
1.3 V 1.3 V
1.3 V 1.3 V
1.3 V 1.3 V
1.3 V
1.3 V
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 3. Load Circuits and Voltage Waveforms
PACKAGE OPTION ADDENDUM
www.ti.com 25-Jan-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
5962-9756201Q2A ACTIVE LCCC FK 20 1 TBD Call TI Call TI
5962-9756201QRA ACTIVE CDIP J 20 1 TBD Call TI Call TI
5962-9756201QSA ACTIVE CFP W 20 1 TBD Call TI Call TI
83020022A ACTIVE LCCC FK 20 1 TBD Call TI Call TI
8302002RA ACTIVE CDIP J 20 1 TBD Call TI Call TI
8302002SA ACTIVE CFP W 20 1 TBD Call TI Call TI
JM38510/37204B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
JM38510/37204BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type
M38510/37204B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
M38510/37204BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type
SN54ALS374AJ ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type
SN54AS374J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type
SN74ALS374ADBLE OBSOLETE SSOP DB 20 TBD Call TI Call TI
SN74ALS374ADW ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ALS374ADWE4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ALS374ADWG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ALS374ADWR ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ALS374ADWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ALS374ADWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ALS374AN ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN74ALS374AN3 OBSOLETE PDIP N 20 TBD Call TI Call TI
SN74ALS374ANE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN74ALS374ANSR ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ALS374ANSRE4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 25-Jan-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
SN74ALS374ANSRG4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AS374DW ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AS374DWG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AS374N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN74AS374N3 OBSOLETE PDIP N 20 TBD Call TI Call TI
SN74AS374NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
SN74AS374NSR ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AS374NSRE4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74AS374NSRG4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SNJ54ALS374AFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
SNJ54ALS374AJ ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type
SNJ54ALS374AW ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type
SNJ54AS374FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
SNJ54AS374J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type
SNJ54AS374W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
PACKAGE OPTION ADDENDUM
www.ti.com 25-Jan-2012
Addendum-Page 3
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54ALS374A, SN54AS374, SN74ALS374A, SN74AS374 :
•Catalog: SN74ALS374A, SN74AS374
•Military: SN54ALS374A, SN54AS374
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Military - QML certified for Military and Defense Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74ALS374ADWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
SN74ALS374ANSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1
SN74AS374NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74ALS374ADWR SOIC DW 20 2000 367.0 367.0 45.0
SN74ALS374ANSR SO NS 20 2000 367.0 367.0 45.0
SN74AS374NSR SO NS 20 2000 367.0 367.0 45.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°–ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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