Datasheet
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016 Page 1 of 123
R01DS0168EJ0210
Rev.2.10
Aug 12, 2016
RL78/L13
RENESAS MCU
Integrated LCD controller/driver, True Low Power Platform (as low as 112.5 μA/MHz, and 0.61 μA for RTC + LVD),
1.6 V to 5.5 V operation, 16 to 128 Kbyte Flash, 31 DMIPS at 24 MHz, for All LCD Based Applications
1. OUTLINE
1.1 Features
Ultra-low power consumption technology
• VDD = single power supply voltage of 1.6 to 5.5 V which can
operate a 1.8 V device at a low voltage
• HALT mode
• STOP mode
• SNOOZE mode
RL78 CPU core
• CISC architecture with 3-stage pipeline
• Minimum instruction execution time: Can be changed from high
speed (0.04167 µs: @ 24 MHz operation with high-speed on-
chip oscillator) to ultra-low speed (30.5 µs: @ 32.768 kHz
operation with subsystem clock)
• Address space: 1 MB
• General-purpose registers: (8-bit register × 8) × 4 banks
• On-chip RAM: 1 to 8 KB
Code flash memory
• Code flash memory: 16 to 128 KB
• Block size: 1 KB
• Prohibition of block erase and rewriting (security function)
• On-chip debug function
• Self-programming (with boot swap function/flash shield window
function)
Data flash memory
• Data flash memory: 4 KB
• Back ground operation (BGO): Instructions can be executed
from the program memory while rewriting the data flash memory.
• Number of rewrites: 1,000,000 times (TYP.)
• Voltage of rewrites: VDD = 1.8 to 5.5 V
High-speed on-chip oscillator
• Select from 48 MHz, 24 MHz, 16 MHz, 12 MHz, 8 MHz, 6 MHz,
4 MHz, 3 MHz, 2 MHz, and 1 MHz
• High accuracy: +/-1.0 % (VDD = 1.8 to 5.5 V, TA = -20 to +85°C)
Operating ambient temperature
• TA = -40 to +85°C (A: Consumer applications)
• TA = -40 to +105°C (G: Industrial applications)
Power management and reset function
• On-chip power-on-reset (POR) circuit
• On-chip voltage detector (LVD) (Select interrupt and reset from
14 levels)
DMA (Direct Memory Access) controller
• 4 channels
• Number of clocks during transfer between 8/16-bit SFR and
internal RAM: 2 clocks
Multiplier and divider/multiply-accumulator
• 16 bits × 16 bits = 32 bits (Unsigned or signed)
• 32 bits ÷ 32 bits = 32 bits (Unsigned)
• 16 bits × 16 bits + 32 bits = 32 bits (Unsigned or signed)
Serial interface
• CSI: 2 channels
• UART/UART (LIN-bus supported): 3, 4 channels/1 channel
• I2C/Simplified I2C communication: 1 channel/2 channels
Timer
• 16-bit timer: 8 channels (with remote control output function)
• 16-bit timer KB20 (IH): 1 channel
(IH-only PWM output function)
• 12-bit interval timer: 1 channel
• Real-time clock 2: 1 channel (calendar for 99 years, alarm
function, and clock correction function)
• Watchdog timer: 1 channel (operable with the dedicated low-
speed on- chip oscillator)
A/D converter
• 8/10-bit resolution A/D converter (VDD = 1.6 to 5.5 V)
• Analog input: 9 to 12 channels
• Internal reference voltage (1.45 V) and temperature sensorNote 1
Comparator
• 2 channels
• Operation mode: Comparator high-speed mode, comparator
low-speed mode, or window mode
• External reference voltage and internal reference voltage are
selectable
LCD controller/driver
• Segment signal output: 36 (32)Note 2 to 51 (47)Note 2
• Common signal output: 4 (8)Note 2
• Internal voltage boosting method, capacitor split method, and
external resistance division method are switchable
I/O port
• I/O port: 49 to 65 (N-ch open drain I/O [withstand voltage of 6
V]: 2, N-ch open drain I/O [VDD withstand voltage]: 12 to 18)
• Can be set to N-ch open drain, TTL input buffer, and on-chip
pull-up resistor
• Different potential interface: Can connect to a 1.8/2.5/3 V
device
• On-chip key interrupt function
• On-chip clock output/buzzer output controller
Others
• On-chip BCD (binary-coded decimal) correction circuit
Notes 1. Can be selected only in HS (high-speed main) mode
2. The values in parentheses are the number of signal
outputs when 8 com is used.
Remark The functions mounted depend on the product. See
1.6 Outline of Functions.
* There are differences in specifications between every product.
Please refer to specification for details.
<R>
RL78/L13 1. OUTLINE
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 2 of 123
ROM, RAM capacities
Flash ROM
Data Flash
RAM RL78/L13
64 pins 80 pins
128 KB 4 KB 8 KBNote R5F10WLG R5F10WMG
96 KB 4 KB 6 KB R5F10WLF R5F10WMF
64 KB 4 KB 4 KB R5F10WLE R5F10WME
48 KB 4 KB 2 KB R5F10WLD R5F10WMD
32 KB 4 KB 1.5 KB R5F10WLC R5F10WMC
16 KB 4 KB 1 KB R5F10WLA R5F10WMA
Note This is about 7 KB when the self-programming function and data flash function are used. (For details, see
CHAPTER 3 in the RL78/L13 User’s Manual.)
RL78/L13 1. OUTLINE
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 3 of 123
1.2 List of Part Numbers
Figure 1-1. Part Number, Memory Size, and Package of RL78/L13
Part No. R 5 F 1 0 W L E A x x x F B #30
Package type:
ROM number (Omitted with blank products)
ROM capacity:
RL78/L13 group
Renesas MCU
Renesas semiconductor product
A
: 16 KB
C
: 32 KB
D
: 48 KB
E
: 64 KB
F
: 96 KB
G : 128 KB
Pin count:
L : 64-pin
M : 80-pin
Fields of application:
Memory type:
F : Flash memory
Packaging specification
#30 : Tray (LFQFP, LQFP)
#50 : Embossed Tape (LFQFP, LQFP)
FA : LQFP, 0.65 mm pitch
FB : LFQFP, 0.50 mm pitch
A : Consumer applications, T
A
= −40˚C to +85˚C
G : Industrial applications, T
A
= −40˚C to +105˚C
RL78/L13 1. OUTLINE
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 4 of 123
Pin Count Package Data Flash Fields of
ApplicationNote
Ordering Part Number
64 pins 64-pin plastic LQFP
(12 × 12 mm, 0.65
mm pitch)
Mounted A R5F10WLAAFA#30, R5F10WLAAFA#50, R5F10WLCAFA#30,
R5F10WLCAFA#50, R5F10WLDAFA#30, R5F10WLDAFA#50,
R5F10WLEAFA#30, R5F10WLEAFA#50, R5F10WLFAFA#30,
R5F10WLFAFA#50, R5F10WLGAFA#30, R5F10WLGAFA#50
64-pin plastic LFQFP
(10 × 10 mm, 0.5
mm pitch)
Mounted A
G
R5F10WLAAFB#30, R5F10WLAAFB#50, R5F10WLCAFB#30,
R5F10WLCAFB#50, R5F10WLDAFB#30, R5F10WLDAFB#50,
R5F10WLEAFB#30, R5F10WLEAFB#50, R5F10WLFAFB#30,
R5F10WLFAFB#50, R5F10WLGAFB#30, R5F10WLGAFB#50,
R5F10WLAGFB#30, R5F10WLAGFB#50, R5F10WLCGFB#30,
R5F10WLCGFB#50, R5F10WLDGFB#30, R5F10WLDGFB#50,
R5F10WLEGFB#30, R5F10WLEGFB#50, R5F10WLFGFB#30,
R5F10WLFGFB#50, R5F10WLGGFB#30, R5F10WLGGFB#50
80 pins 80-pin plastic LQFP
(14 × 14 mm, 0.65
mm pitch)
Mounted A R5F10WMAAFA#30, R5F10WMAAFA#50, R5F10WMCAFA#30,
R5F10WMCAFA#50, R5F10WMDAFA#30, R5F10WMDAFA#50,
R5F10WMEAFA#30, R5F10WMEAFA#50, R5F10WMFAFA#30,
R5F10WMFAFA#50, R5F10WMGAFA#30, R5F10WMGAFA#50
80-pin plastic LFQFP
(12 × 12 mm, 0.5
mm pitch)
Mounted A
G
R5F10WMAAFB#30, R5F10WMAAFB#50, R5F10WMCAFB#30,
R5F10WMCAFB#50, R5F10WMDAFB#30, R5F10WMDAFB#50,
R5F10WMEAFB#30, R5F10WMEAFB#50, R5F10WMFAFB#30,
R5F10WMFAFB#50, R5F10WMGAFB#30, R5F10WMGAFB#50,
R5F10WMAGFB#30, R5F10WMAGFB#50, R5F10WMCGFB#30,
R5F10WMCGFB#50, R5F10WMDGFB#30, R5F10WMDGFB#50,
R5F10WMEGFB#30, R5F10WMEGFB#50, R5F10WMFGFB#30,
R5F10WMFGFB#50, R5F10WMGGFB#30, R5F10WMGGFB#50
Note For the fields of application, see Figure 1-1 Part Number, Memory Size, and Package o f RL 78/L13.
Caution The ordering part numbers represent the numbers at the time of publication. For the latest ordering
part numbers, refer to the target product page of the Renesas Electronics website.
RL78/L13 1. OUTLINE
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 5 of 123
1.3 Pin Configuration (Top View)
1.3.1 64-pin products
• 64-pin plastic LQFP (12 × 12 mm, 0.65 mm pitch)
• 64-pin plastic LFQFP (10 × 10 mm, 0.5 mm pitch)
P03/RxD2/SEG46/VCOUT0
P04/TxD2/SEG47/VCOUT1
P05/SCK10/SCL10/SEG48
P06/SI10/RxD1/SDA10/SEG49
P07/SO10/TxD1/(PCLBUZ0)/SEG50
COM0
COM1
COM2
COM3
COM4/SEG0
COM5/SEG1
COM6/SEG2
COM7/SEG3
P52/TI00/TO00/INTP1/SEG6
P53/INTP2/SEG7
P54/TI02/TO02/SEG8
P02/INTP7/PCLBUZ0/SEG45
P01/(TI05)/(TO05)/INTP5/PCLBUZ1/SEG44
P00/SEG43/SO00/TxD0/TOOLTxD
P17/SEG42/SI00/RxD0/TOOLRxD/SDA00
P16/SEG41/SCK00/SCL00
P15/TI07/TO07/SEG40
P14/TI04/TO04/SEG39
P13/ANI25/SEG38
P12/ANI24/SEG37
P11/ANI23/SEG36
P10/ANI22/SEG35
P27/ANI21/SEG34
P26/ANI20/SEG33
P22/ANI16/SEG29
P21/ANI0/AV
REFP
P20/ANI1/AV
REFM
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
P57/INTP6/SEG11
P70/KR0/SEG12
P74/KR4/SEG16/TKBO00
P75/KR5/SEG17/TKBO01-2
P76/KR6/SEG18/TKBO01-1
P77/KR7/SEG19/TKBO01-0
P30/TI03/TO03/SEG20/REMOOUT
P31/INTP3/RTC1HZ/SEG21
P32/TI01/TO01/SEG22
P33/INTP4/SEG23
P125/V
L3
/TI06/TO06
V
L4
V
L2
V
L1
P126/CAPL/(TI04)/(TO04)
P127/CAPH/(TI03)/(TO03)/(REMOOUT)
P45/VREF0
P44/(SCK10)/(SCL10)/IVCMP0
P43/(INTP7)/(SI10)/(RxD1)/(SDA10)/IVCMP1
P42/TI05/TO05/(SO10)/(TxD1)/IVREF1
P40/TOOL0/(TI00)/(TO00)
RESET
P124/XT2/EXCLKS
P123/XT1
P137/INTP0
P122/X2/EXCLK
P121/X1
REGC
V
SS
V
DD
P60/SCLA0/(TI01)/(TO01)
P61/SDAA0/(TI02)/(TO02)
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
RL78/L13
(Top View)
Caution Connect the REGC pin to VSS via a capacitor (0.47 to 1
μ
F).
Remarks 1. For pin identification, see 1.4 Pin Identification.
2. Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection
register (PIOR). See Figure 4-8 Format of Peripheral I/O Redirection Register (PIOR) in the
RL78/L13 User’s Manual.
.
<R>
RL78/L13 1. OUTLINE
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 6 of 123
1.3.2 80-pin products
• 80-pin plastic LQFP (14 × 14 mm, 0.65 mm pitch)
• 80-pin plastic LFQFP (12 × 12 mm, 0.5 mm pitch)
P04/TxD2/SEG47/VCOUT1
P05/SCK10/SCL10/SEG48
P06/SI10/RxD1/SDA10/SEG49
P07/SO10/TxD1/(PCLBUZ0)/SEG50
COM0
COM1
COM2
COM3
COM4/SEG0
COM5/SEG1
COM6/SEG2
COM7/SEG3
P50/SEG4
P51/SEG5
P52/TI00/TO00/INTP1/SEG6
P53/INTP2/SEG7
P54/TI02/TO02/SEG8
P55/INTP5/SEG9
P56/TI06/TO06/SEG10
P57/INTP6/SEG11
P130/(SO00)/(TxD0)/SEG28
P47/(SI00)/(RxD0)/(SDA00)/SEG27
P46/(SCK00)/(SCL00)/SEG26
P45/IVREF0
P44/(SCK10)/(SCL10)/IVCMP0
P43/(INTP7)/(SI10)/(RxD1)/(SDA10)/IVCMP1
P42/TI05/TO05/(SO10)/(TxD1)/IVREF1
P41/(TI07)/(TO07)
P40/TOOL0/(TI00)/(TO00)
RESET
P124/XT2/EXCLKS
P123/XT1
P137/INTP0
P122/X2/EXCLK
P121/X1
REGC
V
SS
V
DD
P60/SCLA0/(TI01)/(TO01)
P61/SDAA0/(TI02)/(TO02)
P03/RxD2/SEG46/VCOUT0
P02/INTP7/PCLBUZ0/SEG45
P01/(TI05)/(TO05)/(INTP5)/PCLBUZ1/SEG44
P00/SEG43/SO00/TxD0/TOOLTxD
P17/SEG42/SI00/RxD0/TOOLRxD/SDA00
P16/SEG41/SCK00/SCL00
P15/TI07/TO07/SEG40
P14/TI04/TO04/SEG39
P13/ANI25/SEG38
P12/ANI24/SEG37
P11/ANI23/SEG36
P10/ANI22/SEG35
P27/ANI21/SEG34
P26/ANI20/SEG33
P25/ANI19/SEG32
P24/ANI18/SEG31
P23/ANI17/SEG30
P22/ANI16/SEG29
P21/ANI0/AV
REFP
P20/ANI1/AV
REFM
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
P70/KR0/SEG12
P71/KR1/SEG13
P72/KR2/SEG14
P73/KR3/SEG15
P74/KR4/SEG16/TKBO00
P75/KR5/SEG17/TKBO01-2
P76/KR6/SEG18/TKBO01-1
P77/KR7/SEG19/TKBO01-0
P30/TI03/TO03/SEG20/REMOOUT
P31/INTP3/RTC1HZ/SEG21
P32/TI01/TO01/SEG22
P33/INTP4/SEG23
P34/RxD3/SEG24
P35/TxD3/SEG25
P125/V
L3
/(TI06)/(TO06)
V
L4
V
L2
V
L1
P126/CAPL/(TI04)/(TO04)
P127/CAPH/(TI03)/(TO03)/(REMOOUT)
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
RL78/L13
(Top View)
Caution Connect the REGC pin to VSS via a capacitor (0.47 to 1
μ
F).
Remarks 1. For pin identification, see 1.4 Pin Identification.
2. Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection
register (PIOR). See Figure 4-8 Format of Peripheral I/O Redirection Register (PIOR) in the
RL78/L13 User’s Manual.
<R>
RL78/L13 1. OUTLINE
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 7 of 123
1.4 Pin Identification
A
NI0, ANI1,
A
NI16 to ANI25: Analog Input
A
VREFM: Analog Reference Voltage
Minus
A
VREFP: Analog Reference Voltage
Plus
CAPH, CAPL: Capacitor for LCD
COM0 to COM7: LCD Common Output
EXCLK: External Clock Input
(Main System Clock)
EXCLKS: External Clock Input
(Subsystem Clock)
INTP0 to INTP7: External Interrupt Input
IVCMP0, IVCMP1: Comparator Input
IVREF0, IVREF1: Comparator Reference Input
KR0 to KR7: Key Return
P00 to P07: Port 0
P10 to P17: Port 1
P20 to P27: Port 2
P30 to P35: Port 3
P40 to P47: Port 4
P50 to P57: Port 5
P60, P61: Port 6
P70 to P77: Port 7
P121 to P127: Port 12
P130, P137: Port 13
PCLBUZ0, PCLBUZ1: Programmable Clock Output/
Buzzer Output
REGC: Regulator Capacitance
REMOOUT: Remote control Output
RESET: Reset
RTC1HZ: Real-time Clock 2 Correction Clock
(1 Hz) Output
RxD0 to RxD3: Receive Data
SCK00, SCK10, SCLA0: Serial Clock Input/Output
SCL00, SCL10: Serial Clock Output
SDAA0, SDA00, SDA10: Serial Data Input/Output
SEG0 to SEG50: LCD Segment Output
SI00, SI10: Serial Data Input
SO00, SO10: Serial Data Output
TI00 to TI07: Timer Input
TO00 to TO07,
TKBO00, TKBO01-0,
TKBO01-1, TKBO01-2: Timer Output
TOOL0: Data Input/Output for Tool
TOOLRxD, TOOLTxD: Data Input/Output for External Device
TxD0 to TxD3: Transmit Data
VCOUT0, VCOUT1: Comparator Output
VDD: Power Supply
VL1 to VL4: LCD Power Supply
VSS: Ground
X1, X2: Crystal Oscillator (Main System Clock)
XT1, XT2: Crystal Oscillator (Subsystem Clock)
RL78/L13 1. OUTLINE
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 8 of 123
1.5 Block Diagram
1.5.1 64-pin products
PORT 1
PORT 2 P20 to P22,
P26, P27
5
PORT 3 P30 to P33
4
PORT 4
PORT 5
P10 to P178
P40, P42 to P455
P52 to P54, P574
VOLTAGE
REGULATOR REGC
INTERRUPT
CONTROL
RAM
POWER ON RESET/
VOLTAGE
DETECTOR
POR/LVD
CONTROL
RESET CONTROL
SYSTEM
CONTROL RESET
X1/P121
X2/EXCLK/P122
HIGH-SPEED
ON-CHIP
OSCILLATOR
ON-CHIP DEBUG
TOOL0/P40
SERIAL ARRAY
UNIT0 (4ch)
UART0
UART1
IIC00
RxD0/P17
TxD0/P00
RxD1/P06(RxD1/P43)
TxD1/P07(TxD0/P42)
SCL00/P16
SDA00/P17
TIMER ARRAY
UNIT0 (8ch)
ch2
TI02/TO02/P54
(TI02/TO02/P61)
ch3
TI03/TO03/P30
(TI03/TO03/P127)
ch0
ch1
ch4
TI04/TO04/P14
(TI04/TO04/P126)
ch5
TI05/TO05/P42
(TI05/TO05/P01)
ch6
TI06/TO06/P125
ch7
3
2
INTP0/P137
INTP3/P31,
INTP4/P33
INTP1/P52,
INTP2/P53,
INTP6/P57
RxD0/P17
CSI10
SCK10/P05(SCK10/P44)
SO10/P07(SO10/P42)
SI10/P06(SI10/P43)
A/D CONVERTER
2ANI0/P21, ANI1/P20
AVREFP/P21
AVREFM/P20
IIC10
SCL10/P05(SCL10/P44)
SDA10/P06(SDA10/P43)
TI07/TO07/P15
BCD
ADJUSTMENT
SO00/P00
SI00/P17
CSI00
VSS TOOLRxD/P17,
TOOLTxD/P00
VDD
SERIAL
INTERFACE IICA0 SCLA0/P60
SDAA0/P61 2
INTP5/P01,
INTP7/P02(INTP7/P43)
MULTIPLIER&
DIVIDER,
MULITIPLY-
ACCUMULATOR
XT1/P123
XT2/EXCLKS/P124
PORT 0 P00 to P07
8
BUZZER OUTPUT PCLBUZ0/P02
(PCLBUZ0/P07),
PCLBUZ1/P01
CLOCK OUTPUT
CONTROL
KEY RETURN
5KR0/P70,
KR4/P74 to KR7/P77
4ANI22/P10 to ANI25/P13
DIRECT MEMORY
ACCESS
CONTROL
PORT 6
PORT 7 P70, P74 to P77
5
P60, P61
2
2
TI01/TO01/P32
(TI01/TO01/P60)
TI00/TO00/P52
(TI00/TO00/P40)
RxD0/P17
3ANI16/P22,
ANI20/P26, ANI21/P27
PORT 12 P121 to P124
4P125 to P127
3
SERIAL ARRAY
UNIT1 (4ch)
RxD2/P03
TxD2/P04
UART2
LINSEL
RL78
CPU
CORE
CODE FLASH MEMORY
DATA FLASH MEMORY
SCK00/P16
CRC WINDOW
WATCHDOG
TIMER
RTC1HZ/P31
REAL-TIME
CLOCK 2
LOW-SPEED
ON-CHIP
OSCILLATOR
12- BIT INTERVAL
TIMER
4
TKBO00/P74, TKBO01-0/P77,
TKBO01-1/P76, TKBO01-2/P75 16-bit TIMER KB20
COMPARATOR
(2ch)
COMPARATOR0
VCOUT0/P03
IVCMP0/P44
IVREF0/P45
COMPARATOR1
VCOUT1/P04
IVCMP1/P43
IVREF1/P42
LCD
CONTROLLER/
DRIVER
COM0 to COM7
36
SEG0 to SEG3, SEG6 to SEG8,
SEG11, SEG12, SEG16 to SEG23,
SEG29, SEG33 to SEG50
8
VL1 to VL4
CAPH
CAPL
RAM SPACE
FOR LCD DATA
PORT 13 P137
Remote Carrier
REMOOUT/P30
(REMOOUT/P127)
Remark Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection
register (PIOR). See Figure 4-8 Format of Peripheral I/O Redirection Register (PIOR) in the RL78/L13
User’s Manual.
RL78/L13 1. OUTLINE
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 9 of 123
1.5.2 80-pin products
PORT 1
PORT 2 P20 to P278
PORT 3 P30 to P35
6
PORT 4
PORT 5
P10 to P178
P40 to P478
P50 to P578
VOLTAGE
REGULATOR REGC
INTERRUPT
CONTROL
RAM
POWER ON RESET/
VOLTAGE
DETECTOR
POR/LVD
CONTROL
RESET CONTROL
SYSTEM
CONTROL RESET
X1/P121
X2/EXCLK/P122
HIGH-SPEED
ON-CHIP
OSCILLATOR
ON-CHIP DEBUG
TOOL0/P40
SERIAL ARRAY
UNIT0 (4ch)
UART0
UART1
IIC00
RxD0/P17(RxD0/P47)
TxD0/P00(TxD0/P130)
RxD1/P06(RxD1/P43)
TxD1/P07(TxD0/P42)
SCL00/P16(SCL00/P46)
SDA00/P17(SDA00/P47)
TIMER ARRAY
UNIT0 (8ch)
ch2
TI02/TO02/P54
(TI02/TO02/P61)
ch3
TI03/TO03/P30
(TI03/TO03/P127)
ch0
ch1
ch4
TI04/TO04/P14
(TI04/TO04/P126)
Remote Carrier
REMOOUT/P30
(REMOOUT/P127)
ch5
TI05/TO05/P42
(TI05/TO05/P01)
ch6
TI06/TO06/P56
(TI06/TO06/P125)
ch7
4
INTP0/P137
INTP3/P31,
INTP4/P33
INTP1/P52,
INTP2/P53,
RxD0/P17 (RxD0/P47)
CSI10
SCK10/P05(SCK10/P44)
SO10/P07(SO10/P42)
SI10/P06(SI10/P43)
A/D CONVERTER
2ANI0/P21, ANI1/P20
AV
REFM
/P20
AV
REFP
/P21
IIC10
SCL10/P05(SCL10/P44)
SDA10/P06(SDA10/P43)
TI07/TO07/P15
(TI07/TO07/P41)
BCD
ADJUSTMENT
SO00/P00(SO00/P130)
SI00/P17(SI00/P47)
CSI00
V
SS
TOOLRxD/P17,
TOOLTxD/P00
V
DD
SERIAL
INTERFACE IICA0 SCLA0/P60
SDAA0/P61 INTP5/P55(INTP5/P01),
INTP6/P57
2
INTP7/P02(INTP7/P43)
MULTIPLIER&
DIVIDER,
MULITIPLY-
ACCUMULATOR
XT1/P123
XT2/EXCLKS/P124
PORT 0 P00 to P07
8
BUZZER OUTPUT PCLBUZ0/P02
(PCLBUZ0/P07),
PCLBUZ1/P01
CLOCK OUTPUT
CONTROL
KEY RETURN
8KR0/P70 to
KR7/P77
4ANI22/P10 to ANI25/P13
DIRECT MEMORY
ACCESS
CONTROL
PORT 6
PORT 7 P70 to P77
8
P60, P61
2
2
TI01/TO01/P32
(TI01/TO01/P60)
TI00/TO00/P52
(TI00/TO00/P40)
RxD0/P17
(RxD0/P47)
6ANI16/P22 to ANI21/P27
PORT 12 P121 to P124
4P125 to P127
3
SERIAL ARRAY
UNIT1 (4ch)
UART3
RxD2/P03
TxD2/P04
RxD3/P34
TxD3/P35
UART2
LINSEL
RL78
CPU
CORE
CODE FLASH MEMORY
DATA FLASH MEMORY
SCK00/P16(SCK00/P46)
CRC WINDOW
WATCHDOG
TIMER
RTC1HZ/P31
REAL-TIME
CLOCK 2
LOW-SPEED
ON-CHIP
OSCILLATOR
12- BIT INTERVAL
TIMER
4
TKBO00/P74, TKBO01-0/P77,
TKBO01-1/P76, TKBO01-2/P75 16-bit TIMER KB20
COMPARATOR
(2ch)
COMPARATOR0
VCOUT0/P03
IVCMP0/P44
IVREF0/P45
COMPARATOR1
VCOUT1/P04
IVCMP1/P43
IVREF1/P42
LCD
CONTROLLER/
DRIVER
COM0 to COM7
51
SEG0 to SEG50
8
V
L1
to V
L4
CAPH
CAPL
RAM SPACE
FOR LCD DATA
PORT 13 P130
P137
Remark Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection
register (PIOR). See Figure 4-8 Format of Peripheral I/O Redirection Register (PIOR) in the RL78/L13
User’s Manual.
RL78/L13 1. OUTLINE
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 10 of 123
1.6 Outline of Functions
(1/2)
Item 64-pin 80-pin
R5F10WLx (x = A, C-G) R5F10WMx (x = A, C-G)
Code flash memory (KB) 16 to 128 16 to 128
Data flash memory (KB) 4 4
RAM (KB) 1 to 8Note 1 1 to 8Note 1
Address space 1 MB
Main system
clock
High-speed system clock X1 (crystal/ceramic) oscillation, external main system clock input (EXCLK)
HS (High-speed main) mode: 1 to 20 MHz (VDD = 2.7 to 5.5 V),
HS (High-speed main) mode: 1 to 16 MHz (VDD = 2.4 to 5.5 V),
LS (Low-speed main) mode: 1 to 8 MHz (VDD = 1.8 to 5.5 V),
LV (Low-voltage main) mode: 1 to 4 MHz (VDD = 1.6 to 5.5 V)
High-speed on-chip
oscillator
HS (High-speed main) mode: 1 to 24 MHz (VDD = 2.7 to 5.5 V),
HS (High-speed main) mode: 1 to 16 MHz (VDD = 2.4 to 5.5 V),
LS (Low-speed main) mode: 1 to 8 MHz (VDD = 1.8 to 5.5 V),
LV (Low-voltage main) mode: 1 to 4 MHz (VDD = 1.6 to 5.5 V)
Clock for 16-bit timer KB20 48 MHz (TYP.): VDD = 2.7 to 5.5 V
Subsystem clock XT1 (crystal) oscillation, external subsystem clock input (EXCLKS)
32.768 kHz (TYP.): VDD = 1.6 to 5.5 V
Low-speed on-chip oscillator 15 kHz (TYP.)
General-purpose register (8-bit register × 8) × 4 banks
Minimum instruction execution time 0.04167
μ
s (High-speed on-chip oscillator: fIH = 24 MHz operation)
0.05
μ
s (High-speed system clock: fMX = 20 MHz operation)
30.5
μ
s (Subsystem clock: fSUB = 32.768 kHz operation)
Instruction set • Data transfer (8/16 bits)
• Adder and subtractor/logical operation (8/16 bits)
• Multiplication (8 bits × 8 bits)
• Rotate, barrel shift, and bit manipulation (Set, reset, test, and Boolean operation), etc.
I/O port Total 49 65
CMOS I/O 42
(N-ch O.D. I/O [VDD withstand voltage]: 12)
58
(N-ch O.D. I/O [VDD withstand voltage]: 18)
CMOS input 5 5
CMOS output − −
N-ch O.D I/O
(withstand voltage: 6 V)
2 2
Timer 16-bit timer TAU 8 channels
16-bit timer KB20 1 channel
Watchdog timer 1 channel
12-bit interval timer (IT) 1 channel
Real-time clock 2 1 channel
RTC2 output 1
• 1 Hz (subsystem clock: fSUB = 32.768 kHz)
Timer output 8 channels (PWM outputs: 7Note 2) (TAU used)
1 channel (timer KB20 used)
Remote control output
function
1 (TAU used)
Notes 1. In the case of the 8 KB, this is about 7 KB when the self-programming function and data flash function are
used.
2. The number of outputs varies depending on the setting of the channels in use and the number of master
channels (see 6.9.3 Operation as mu ltip le PWM output function in the RL78/L13 User’s Manual.).
<R>
RL78/L13 1. OUTLINE
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 11 of 123
(2/2)
Item 64-pin 80-pin
R5F10WLx (x = A, C-G) R5F10WMx (x = A, C-G)
Clock output/buzzer output controller 2
• 2.44 kHz, 4.88 kHz, 9.76 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz
(Main system clock: fMAIN = 20 MHz operation)
• 256 Hz, 512 Hz, 1.024 kHz, 2.048 kHz, 4.096 kHz, 8.192 kHz, 16.384 kHz, 32.768 kHz
(Subsystem clock: fSUB = 32.768 kHz operation)
8/10-bit resolution A/D converter 9 channels 12 channels
Comparator 2 channels
Serial interface [64-pin]
• CSI: 1 channel/UART (UART supporting LIN-bus): 1 channel/simplified I2C: 1 channel
• CSI: 1 channel/UART: 1 channel/simplified I2C: 1 channel
• UART: 1 channel
[80-pin]
• CSI: 1 channel/UART (UART supporting LIN-bus): 1 channel/simplified I2C: 1 channel
• CSI: 1 channel/UART: 1 channel/simplified I2C: 1 channel
• UART: 2 channels
I
2C bus 1 channel
LCD controller/driver Internal voltage boosting method, capacitor split method, and external resistance division
method are switchable.
Segment signal output 36 (32)Note 1 51 (47)Note 1
Common signal output 4 (8)Note 1
Multiplier and divider/multiply-
accumulator
• 16 bits × 16 bits = 32 bits (Unsigned or signed)
• 32 bits ÷ 32 bits = 32 bits (Unsigned)
• 16 bits × 16 bits + 32 bits = 32 bits (Unsigned or signed)
DMA controller 4 channels
Vectored
interrupt sources
Internal 32 35
External 11 11
Key interrupt 5 8
Reset • Reset by RESET pin
• Internal reset by watchdog timer
• Internal reset by power-on-reset
• Internal reset by voltage detector
• Internal reset by illegal instruction executionNote 2
• Internal reset by RAM parity error
• Internal reset by illegal-memory access
Power-on-reset circuit • Power-on-reset: 1.51 V (TYP.)
• Power-down-reset: 1.50 V (TYP.)
Voltage detector • Rising edge: 1.67 V to 4.06 V (14 steps)
• Falling edge: 1.63 V to 3.98 V (14 steps)
On-chip debug function Provided
Power supply voltage VDD = 1.6 to 5.5 V (TA = -40 to +85°C)
VDD = 2.4 to 5.5 V (TA = -40 to +105°C)
Operating ambient temperature Consumer applications: TA = −40 to +85°C
Industrial applications: TA = −40 to +105°C
Notes 1. The values in parentheses are the number of signal outputs when 8 com is used.
2. This reset occurs when instruction code FFH is executed.
This reset does not occur during emulation using an in-circuit emulator or an on-chip debugging emulator.
RL78/L13 2. ELECTRICAL SPECIFICATIONS (TA = −40 to +85°C)
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 12 of 123
2. ELECTRICAL SPECIFICATIONS (TA = −40 to +85°C)
Target products A: Consumer applications; TA = −40 to +85°C
R5F10WLAAFA, R5F10WLCAFA, R5F10WLDAFA,
R5F10WLEAFA, R5F10WLFAFA, R5F10WLGAFA,
R5F10WLAAFB, R5F10WLCAFB, R5F10WLDAFB,
R5F10WLEAFB, R5F10WLFAFB, R5F10WLGAFB,
R5F10WMAAFA, R5F10WMCAFA, R5F10WMDAFA,
R5F10WMEAFA, R5F10WMFAFA, R5F10WMGAFA,
R5F10WMAAFB, R5F10WMCAFB, R5F10WMDAFB,
R5F10WMEAFB, R5F10WMFAFB, R5F10WMGAFB
G: Industrial applications; when using TA = −40 to +105°C specification products at TA = −40 to +85°C
R5F10WLAGFB, R5F10WLCGFB, R5F10WLDGFB,
R5F10WLEGFB, R5F10WLFGFB, R5F10WLGGFB
R5F10WMAGFB, R5F10WMCGFB, R5F10WMDGFB,
R5F10WMEGFB, R5F10WMFGFB, R5F10WMGGFB
Cautions 1. The RL78 microcontrollers have an on-chip debug function, which is provided for development
and evaluation. Do not use the on-chip debug function in products designated for mass
production, because the guaranteed number of rewritable times of the flash memory may be
exceeded when this function is used, and product reliability therefore cannot be guaranteed.
Renesas Electronics is not liable for problems occurring when the on-chip debug function is
used.
2. The pins mounted depend on the product. See 2.1 Port Function to 2.2.1 With functions for
each product in the RL78/L13 User’s Manual.
RL78/L13 2. ELECTRICAL SPECIFICATIONS (TA = −40 to +85°C)
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 13 of 123
2.1 Absolute Maximum Ratings
Absolute Maximum Ratings (1/3)
Parameter Symbol Conditions Ratings Unit
Supply voltage VDD −0.5 to +6.5 V
REGC pin input voltage VIREGC REGC −0.3 to +2.8
and −0.3 to VDD +0.3Note 1
V
Input voltage VI1 P00 to P07, P10 to P17, P20 to P27, P30 to P35,
P40 to P47, P50 to P57, P60, P61, P70 to P77,
P121 to P127, P130, P137
−0.3 to VDD +0.3Note 2 V
VI2 P60 and P61 (N-ch open-drain) −0.3 to +6.5 V
VI3 EXCLK, EXCLKS, RESET −0.3 to VDD +0.3Note 2 V
Output voltage VO1 P00 to P07, P10 to P17, P20 to P27, P30 to P35,
P40 to P47, P50 to P57, P60, P61, P70 to P77,
P121 to P127, P130, P137
−0.3 to VDD +0.3Note 2 V
Analog input voltage VAI1 ANI0, ANI1, ANI16 to ANI26 −0.3 to VDD +0.3
and −0.3 to AVREF(+) +0.3Notes 2, 3
V
Notes 1. Connect the REGC pin to Vss via a capacitor (0.47 to 1
μ
F). This value regulates the absolute
maximum rating of the REGC pin. Do not use this pin with voltage applied to it.
2. Must be 6.5 V or lower.
3. Do not exceed AVREF(+) + 0.3 V in case of A/D conversion target pin.
Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any
parameter. That is, the absolute maximum ratings are rated values at which the product is on the verge
of suffering physical damag e, and th erefore the p roduct mu st be u sed under cond itions that en sure th at
the absolute maximum ratings are n ot exceeded.
Remarks 1. Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the port
pins.
2. AVREF (+): + side reference voltage of the A/D converter.
3. V
SS: Reference voltage
RL78/L13 2. ELECTRICAL SPECIFICATIONS (TA = −40 to +85°C)
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 14 of 123
Absolute Maximum Ratings (2/3)
Parameter Symbol Conditions Ratings Unit
LCD voltage VL1 VL1 voltageNote 1 −0.3 to +2.8 and
−0.3 to VL4 +0.3
V
VL2 VL2 voltageNote 1 −0.3 to VL4 +0.3Note 2 V
VL3 VL3 voltageNote 1 −0.3 to VL4 +0.3Note 2 V
VL4 VL4 voltageNote 1 −0.3 to +6.5 V
VLCAP CAPL, CAPH voltageNote 1 −0.3 to VL4 +0.3Note 2 V
VOUT COM0 to COM7
SEG0 to SEG50
output voltage
External resistance division method −0.3 to VDD +0.3Note 2 V
Capacitor split method −0.3 to VDD +0.3Note 2 V
Internal voltage boosting method −0.3 to VL4 +0.3Note 2 V
Notes 1. This value only indicates the absolute maximum ratings when applying voltage to the VL1, VL2, VL3, and VL4 pins;
it does not mean that applying voltage to these pins is recommended. When using the internal voltage boosting
method or capacitance split method, connect these pins to VSS via a capacitor (0.47
μ
F ± 30%) and connect a
capacitor (0.47
μ
F ± 30%) between the CAPL and CAPH pins.
2. Must be 6.5 V or lower.
Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any
parameter. That is, the absolute maximum ratings are rated values at which the product is on the verge
of suffering physical damag e, and th erefore the p roduct mu st be u sed under cond itions that en sure th at
the absolute maximum ratings are n ot exceeded.
Remark V
SS: Reference voltage
RL78/L13 2. ELECTRICAL SPECIFICATIONS (TA = −40 to +85°C)
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 15 of 123
Absolute Maximum Ratings (3/3)
Parameter Symbol Conditions Ratings Unit
Output current, high IOH1 Per pin P00 to P07, P10 to P17, P22 to P27,
P30 to P35, P40 to P47,
P50 to P57, P60, P61,
P70 to P77, P125 to P127, P130
−40 mA
Total of all pins
−170 mA
P00 to P07, P10 to P17, P22 to P27,
P30 to P35, P40 to P47,
P50 to P57, P60, P61,
P70 to P77, P125 to P127, P130
−170 mA
IOH2 Per pin P20, P21 −0.5 mA
Total of all pins −1 mA
Output current, low IOL1 Per pin P00 to P07, P10 to P17, P22 to P27,
P30 to P35, P40 to P47,
P50 to P57, P60, P61,
P70 to P77, P125 to P127, P130
40 mA
Total of all pins
170 mA
P40 to P47, P130 70 mA
P00 to P07, P10 to P17, P22 to P27,
P30 to P35, P50 to P57,
P60, P61, P70 to P77,
P125 to P127
100 mA
IOL2 Per pin P20, P21 1 mA
Total of all pins 2 mA
Operating ambient
temperature
TA In normal operation mode −40 to +85 °C
In flash memory programming mode
Storage temperature Tstg −65 to +150 °C
Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any
parameter. That is, the absolute maximum ratings are rated values at which the product is on the verge
of suffering physical damag e, and th erefore the p roduct mu st be u sed under cond itions that en sure th at
the absolute maximum ratings are n ot exceeded.
Remark Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the port pins.
<R>
<R>
<R>
<R>
<R>
<R>
<R>
<R>
RL78/L13 2. ELECTRICAL SPECIFICATIONS (TA = −40 to +85°C)
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 16 of 123
2.2 Oscillator Characteristics
2.2.1 X1 and XT1 oscillator characteristics
(TA = −40 to +85°C, 1.6 V ≤ VDD ≤ 5.5 V, V SS = 0 V )
Parameter Resonator Conditions MIN. TYP. MAX. Unit
X1 clock oscillation
frequency (fX)Note
Ceramic resonator/
crystal resonator
2.7 V ≤ VDD ≤ 5.5 V 1.0 20.0 MHz
2.4 V ≤ VDD < 2.7 V 1.0 16.0
1.8 V ≤ VDD < 2.4 V 1.0 8.0
1.6 V ≤ VDD < 1.8 V 1.0 4.0
XT1 clock oscillation
frequency (fXT)Note
Crystal resonator 32 32.768 35 kHz
Note Indicates only permissible oscillator frequency ranges. Refer to AC Characteristics for instruction execution time.
Request evaluation by the manufacturer of the oscillator circuit mounted on a board to check the oscillator
characteristics.
Caution Since the CPU is started by the high-speed on-chip oscillator clock after a reset release, check the X1
clock oscillation stabilization time using the oscillation stabilization time counter status register (OSTC)
by the user. Determine the oscillation stabilization time of the OSTC register and the oscillation
stabilization time select register (OSTS) after sufficiently evaluating the oscillation stabilization time
with the resonator to be used.
Remark When using the X1 oscillator and XT1 oscillator, see 5.4 System Clock Oscillator in the RL78/L13 User’s
Manual.
2.2.2 On-chip oscillator characteristics
(TA = −40 to +85°C, 1.6 V ≤ VDD ≤ 5.5 V, V SS = 0 V )
Parameter Symbol Conditions MIN. TYP. MAX. Unit
High-speed on-chip oscillator
clock frequencyNotes 1, 2
fIH 1 24 MHz
High-speed on-chip oscillator
clock frequency accuracy
−20 to +85°C 1.8 V ≤ VDD ≤ 5.5 V −1.0 +1.0 %
1.6 V ≤ VDD < 1.8 V −5.0 +5.0 %
−40 to −20°C 1.8 V ≤ VDD ≤ 5.5 V −1.5 +1.5 %
1.6 V ≤ VDD < 1.8 V −5.5 +5.5 %
Low-speed on-chip oscillator
clock frequency
fIL 15 kHz
Low-speed on-chip oscillator
clock frequency accuracy
−15 +15 %
Notes 1. The high-speed on-chip oscillator frequency is selected by bits 0 to 4 of the option byte (000C2H/010C2H)
and bits 0 to 2 of the HOCODIV register.
2. This indicates the oscillator characteristics only. Refer to AC Characteristics for the instruction execution
time.
RL78/L13 2. ELECTRICAL SPECIFICATIONS (TA = −40 to +85°C)
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 17 of 123
2.3 DC Characteristics
2.3.1 Pin characteristics
(TA = −40 to +85°C, 1.6 V ≤ VDD ≤ 5.5 V , VSS = 0 V )
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Output current,
highNote 1
IOH1 Per pin for P00 to P07, P10 to P17,
P22 to P27, P30 to P35, P40 to P47,
P50 to P57, P70 to P77, P125 to P127,
P130
1.6 V ≤ VDD ≤ 5.5 V −10.0Note 2 mA
Total of P00 to P07, P10 to P17,
P22 to P27, P30 to P35, P40 to P47,
P50 to P57, P70 to P77, P125 to P127,
P130
(When duty = 70%Note 3)
4.0 V ≤ VDD ≤ 5.5 V
−90.0 mA
2.7 V ≤ VDD < 4.0 V −15.0 mA
1.8 V ≤ VDD < 2.7 V −7.0 mA
1.6 V ≤ VDD < 1.8 V −3.0 mA
IOH2 Per pin for P20 and P21 1.6 V ≤ VDD ≤ 5.5 V −0.1Note 2 mA
Total of all pins
(When duty = 70%Note 3)
1.6 V ≤ VDD ≤ 5.5 V −0.2 mA
Notes 1. Value of the current at which the device operation is guaranteed even if the current flows from the VDD pin
to an output pin
2. Do not exceed the total current value.
3. Output current value under conditions where the duty factor ≤ 70%.
The output current value that has changed to the duty factor > 70% the duty ratio can be calculated with the
following expression (when changing the duty factor from 70% to n%).
• Total output current of pins = (IOH × 0.7)/(n × 0.01)
<Example> Where n = 80% and IOH = −90.0 mA
Total output current of pins = (−90.0 × 0.7)/(80 × 0.01) ≅ −78.75 mA
However, the current that is allowed to flow into one pin does not vary depending on the duty factor. A
current higher than the absolute maximum rating must not flow into one pin.
Caution P00, P04 to P07, P16, P17, P35, P42 to P44, P46, P47, P53 to P56, an d P130 d o n ot out put high level in
N-ch open-drain mode.
Remark Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the port
pins.
<R>
RL78/L13 2. ELECTRICAL SPECIFICATIONS (TA = −40 to +85°C)
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 18 of 123
(TA = −40 to +85°C, 1.6 V ≤ VDD ≤ 5.5 V, V SS = 0 V )
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Output current,
lowNote 1
IOL1 Per pin for P00 to P07, P10 to P17,
P22 to P27, P30 to P35, P40 to P47,
P50 to P57, P70 to P77,
P125 to P127, P130
20.0Note 2 mA
Per pin for P60 and P61 15.0Note 2 mA
Total of P40 to P47, P130
(When duty = 70%Note 3)
4.0 V ≤ VDD ≤ 5.5 V 70.0 mA
2.7 V ≤ VDD < 4.0 V 15.0 mA
1.8 V ≤ VDD < 2.7 V 9.0 mA
1.6 V ≤ VDD < 1.8 V 4.5 mA
Total of P00 to P07, P10 to P17,
P22 to P27,
P30 to P35, P50 to P57, P70 to P77,
P125 to P127
(When duty = 70%Note 3)
4.0 V ≤ VDD ≤ 5.5 V 90.0 mA
2.7 V ≤ VDD < 4.0 V 35.0 mA
1.8 V ≤ VDD < 2.7 V 20.0 mA
1.6 V ≤ VDD < 1.8 V 10.0 mA
Total of all pins
(When duty = 70%Note 3)
160.0 mA
IOL2 Per pin for P20 and P21 0.4Note 2 mA
Total of all pins
(When duty = 70%Note 3)
1.6 V ≤ VDD ≤ 5.5 V 0.8 mA
Notes 1. Value of the current at which the device operation is guaranteed even if the current flows from an output pin
to the VSS pin
2. Do not exceed the total current value.
3. Output current value under conditions where the duty factor ≤ 70%.
The output current value that has changed to the duty factor > 70% the duty ratio can be calculated with the
following expression (when changing the duty factor from 70% to n%).
• Total output current of pins = (IOL × 0.7)/(n × 0.01)
<Example> Where n = 80% and IOL = 70.0 mA
Total output current of pins = (70.0 × 0.7)/(80 × 0.01) ≅ 61.25 mA
However, the current that is allowed to flow into one pin does not vary depending on the duty factor. A
current higher than the absolute maximum rating must not flow into one pin.
Remark Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the port
pins.
<R>
RL78/L13 2. ELECTRICAL SPECIFICATIONS (TA = −40 to +85°C)
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 19 of 123
(TA = −40 to +85°C, 1.6 V ≤ VDD ≤ 5.5 V, V SS = 0 V )
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Input voltage,
high
VIH1 P00 to P07, P10 to P17, P22 to P27,
P30 to P35, P40 to P47, P50 to P57,
P70 to P77, P125 to P127, P130,
P137
Normal input buffer 0.8VDD VDD V
VIH2 P03, P05, P06, P16, P17, P34, P43,
P44, P46, P47, P53, P55
TTL input buffer
4.0 V ≤ VDD ≤ 5.5 V
2.2 VDD V
TTL input buffer
3.3 V ≤ VDD < 4.0 V
2.0 VDD V
TTL input buffer
1.6 V ≤ VDD < 3.3 V
1.5 VDD V
VIH3 P20, P21 0.7VDD VDD V
VIH4 P60, P61 0.7VDD 6.0 V
VIH5 P121 to P124, P137, EXCLK, EXCLKS, RESET 0.8VDD VDD V
Input voltage, low VIL1 P00 to P07, P10 to P17, P22 to P27,
P30 to P35, P40 to P47, P50 to P57,
P70 to P77, P125 to P127, P130,
P137
Normal input buffer 0 0.2VDD V
VIL2 P03, P05, P06, P16, P17, P34, P43,
P44, P46, P47, P53, P55
TTL input buffer
4.0 V ≤ VDD ≤ 5.5 V
0 0.8 V
TTL input buffer
3.3 V ≤ VDD < 4.0 V
0 0.5 V
TTL input buffer
1.6 V ≤ VDD < 3.3 V
0 0.32 V
VIL3 P20, P21 0 0.3VDD V
VIL4 P60, P61 0 0.3VDD V
VIL5 P121 to P124, P137, EXCLK, EXCLKS, RESET 0 0.2VDD V
Caution The maximum value of VIH of pins P00, P04 to P07, P16, P17, P35, P42 to P44, P46, P47, P53 to P56,
and P130 is VDD, even in the N-ch open-drain mode.
Remark Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the port
pins.
RL78/L13 2. ELECTRICAL SPECIFICATIONS (TA = −40 to +85°C)
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 20 of 123
(TA = −40 to +85°C, 1.6 V ≤ VDD ≤ 5.5 V, VSS = 0 V )
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Output voltage,
high
VOH1 P00 to P07, P10 to P17, P22 to P27,
P30 to P35, P40 to P47, P50 to P57,
P70 to P77, P125 to P127, P130
4.0 V ≤ VDD ≤ 5.5 V,
IOH1 = −10.0 mA
VDD − 1.5 V
4.0 V ≤ VDD ≤ 5.5 V,
IOH1 = −3.0 mA
VDD − 0.7 V
2.7 V ≤ VDD ≤ 5.5 V,
IOH1 = −2.0 mA
VDD − 0.6 V
1.8 V ≤ VDD ≤ 5.5 V,
IOH1 = −1.5 mA
VDD − 0.5 V
1.6 V ≤ VDD ≤ 5.5 V,
IOH1 = −1.0 mA
VDD − 0.5 V
VOH2 P20 and P21 1.6 V ≤ VDD ≤ 5.5 V,
IOH2 = −100
μ
A
VDD − 0.5 V
Output voltage,
low
VOL1 P00 to P07, P10 to P17, P22 to P27,
P30 to P35, P40 to P47, P50 to P57,
P70 to P77, P125 to P127, P130
4.0 V ≤ VDD ≤ 5.5 V,
IOL1 = 20 mA
1.3 V
4.0 V ≤ VDD ≤ 5.5 V,
IOL1 = 8.5 mA
0.7 V
2.7 V ≤ VDD ≤ 5.5 V,
IOL1 = 3.0 mA
0.6 V
2.7 V ≤ VDD ≤ 5.5 V,
IOL1 = 1.5 mA
0.4 V
1.8 V ≤ VDD ≤ 5.5 V,
IOL1 = 0.6 mA
0.4 V
1.6 V ≤ VDD < 1.8 V,
IOL1 = 0.3 mA
0.4 V
VOL2 P20 and P21 1.6 V ≤ VDD ≤ 5.5 V,
IOL2 = 400
μ
A
0.4 V
VOL3 P60 and P61
4.0 V ≤ VDD ≤ 5.5 V,
IOL3 = 15.0 mA
2.0 V
4.0 V ≤ VDD ≤ 5.5 V,
IOL3 = 5.0 mA
0.4 V
2.7 V ≤ VDD ≤ 5.5 V,
IOL3 = 3.0 mA
0.4 V
1.8 V ≤ VDD ≤ 5.5 V,
IOL3 = 2.0 mA
0.4 V
1.6 V ≤ VDD < 1.8 V,
IOL3 = 1.0 mA
0.4 V
Caution P00, P04 to P07, P16, P17, P35, P42 to P44, P46, P47, P53 to P56, an d P130 d o n ot out put high level in
N-ch open-drain mode.
Remark Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the port
pins.
RL78/L13 2. ELECTRICAL SPECIFICATIONS (TA = −40 to +85°C)
R01DS0168EJ0210 Rev.2.10
Aug 12, 2016
Page 21 of 123
(TA = −40 to +85°C, 1.6 V ≤ VDD ≤ 5.5 V, V SS = 0 V )
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Input leakage
current, high
ILIH1 P00 to P07, P10 to P17,
P22 to P27, P30 to P35,
P40 to P47, P50 to P57,
P70 to P77, P125 to P127,
P130, P137
VI = VDD 1
μ
A
ILIH2 P20 and P21, RESET VI = VDD 1
μ
A
ILIH3 P121 to P124
(X1, X2, XT1, XT2, EXCLK,
EXCLKS)
VI = VDD In input port mode
and when external
clock is input
1
μ
A
Resonator
connected
10
μ
A
Input leakage
current, low
ILIL1 P00 to P07, P10 to P17,
P22 to P27, P30 to P35,
P40 to P47, P50 to P57,
P70 to P77, P125 to P127,
P130, P137
VI = VSS −1
μ
A
ILIL2 P20 and P21, RESET VI = VSS −1
μ
A
ILIL3 P121 to P124
(X1, X2, XT1, XT2, EXCLK,
EXCLKS)
VI = VSS In input port mode
and when external
clock is input
−1
μ
A
Resonator
connected
−10
μ
A
On-chip pull-up
resistance
RU1 P00 to P07, P10 to P17,
P22 to P27, P30 to P35,
P45 to P47, P50 to P57,
P70 to P77, P125 to P127,
P130
VI = VSS 2.4 V ≤ VDD < 5.5 V 10 20 100 kΩ
1.6 V ≤ VDD < 2.4 V 10 30 100 kΩ
RU2 P40 to P44 VI = VSS 10 20 100 kΩ
Remark Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the port
pins.