CD4081BMJ/883 - NATIONAL SEMICONDUCTOR

CD4071BC,CD4071BM,CD4081BC,CD4081BM

CD4071BM CD4071BC Quad 2-Input OR Buffered B Series Gate CD4081BM CD4081BC

Quad 2-Input AND Buffered B Series Gate

Literature Number: SNOS368A

TL/F/5977

CD4071BM/CD4071BC Quad 2-Input OR Buffered B Series Gate

CD4081BM/CD4081BC Quad 2-Input AND Buffered B Series Gate

February 1988

CD4071BM/CD4071BC

Quad 2-Input OR Buffered B Series Gate

CD4081BM/CD4081BC

Quad 2-Input AND Buffered B Series Gate

General Description

These quad gates are monolithic complementary MOS

(CMOS) integrated circuits constructed with N- and P-chan-

nel enhancement mode transistors. They have equal source

and sink current capabilities and conform to standard B se-

ries output drive. The devices also have buffered outputs

which improve transfer characteristics by providing very

high gain.

All inputs protected against static discharge with diodes to

VDD and VSS.

Features

YLow power TTL Fan out of 2 driving 74L

compatibility or 1 driving 74LS

Y5V–10V–15V parametric ratings

YSymmetrical output characteristics

YMaximum input leakage 1 mA at 15V over full tempera-

ture range

Connection Diagrams

CD4071B Dual-In-Line Package

TL/F/5977–3

Top View

CD4081B Dual-In-Line Package

TL/F/5977– 6

Top View

Order Number CD4071B or CD4081B

C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

Obsolete

Absolute Maximum Ratings (Notes1&2)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales

Office/Distributors for availability and specifications.

Voltage at Any Pin b0.5V to VDD a0.5V

Power Dissipation (PD)

Dual-In-Line 700 mW

Small Outline 500 mW

VDD Range b0.5 VDC to a18 VDC

Storage Temperature (TS)b65§Ctoa

150§C

Lead Temperature (TL)

(Soldering, 10 seconds) 260§C

Operating Conditions

Operating Range (VDD)3V

DC to 15 VDC

Operating Temperature Range (TA)

CD4071BM, CD4081BM b55§Ctoa

125§C

CD4071BC, CD4081BC b40§Ctoa

85§C

DC Electrical Characteristics CD4071BM/CD4081BM (Note 2)

Symbol Parameter Conditions b55§Ca25§Ca125§CUnits

Min Max Min Typ Max Min Max

IDD Quiescent Device VDD e5V 0.25 0.004 0.25 7.5 mA

Current VDD e10V 0.50 0.005 0.50 15 mA

VDD e15V 1.0 0.006 1.0 30 mA

VOL Low Level VDD e5V 0.05 0 0.05 0.05 V

Output Voltage VDD e10V

k1mA 0.05 0 0.05 0.05 V

VDD e15V (0.05 0 0.05 0.05 V

VOH High Level VDD e5V 4.95 4.95 5 4.95 V

Output Voltage VDD e10V

k1mA 9.95 9.95 10 9.95 V

VDD e15V (14.95 14.95 15 14.95 V

VIL Low Level VDD e5V, VOe0.5V 1.5 2 1.5 1.5 V

Input Voltage VDD e10V, VOe1.0V 3.0 4 3.0 3.0 V

VDD e15V, VOe1.5V 4.0 6 4.0 4.0 V

VIH High Level VDD e5V, VOe4.5V 3.5 3.5 3 3.5 V

Input Voltage VDD e10V, VOe9.0V 7.0 7.0 6 7.0 V

VDD e15V, VOe13.5V 11.0 11.0 9 11.0 V

IOL Low Level Output VDD e5V, VOe0.4V 0.64 0.51 0.88 0.36 mA

Current VDD e10V, VOe0.5V 1.6 1.3 2.25 0.9 mA

(Note 3) VDD e15V, VOe1.5V 4.2 3.4 8.8 2.4 mA

IOH High Level Output VDD e5V, VOe4.6V b0.64 b0.51 b0.88 b0.36 mA

Current VDD e10V, VOe9.5V b1.6 b1.3 b2.25 b0.9 mA

(Note 3) VDD e15V, VOe13.5V b4.2 b3.4 b8.8 b2.4 mA

IIN Input Current VDD e15V, VIN e0V b0.10 b10b5b0.10 b1.0 mA

VDD e15V, VIN e15V 0.10 10b50.10 1.0 mA

Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’

they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device

operation.

Note 2: All voltages measured with respect to VSS unless otherwise specified.

Note 3: IOH and IOL are tested one output at a time.

Obsolete

DC Electrical Characteristics CD4071BC/CD4081BC (Note 2)

Symbol Parameter Conditions b40§Ca25§Ca85§CUnits

Min Max Min Typ Max Min Max

IDD Quiescent Device VDD e5V 1 0.004 1 7.5 mA

Current VDD e10V 2 0.005 2 15 mA

VDD e15V 4 0.006 4 30 mA

VOL Low Level VDD e5V 0.05 0 0.05 0.05 V

Output Voltage VDD e10V

k1mA 0.05 0 0.05 0.05 V

VDD e15V (0.05 0 0.05 0.05 V

VOH High Level VDD e5V 4.95 4.95 5 4.95 V

Output Voltage VDD e10V

k1mA 9.95 9.95 10 9.95 V

VDD e15V (14.95 14.95 15 14.95 V

VIL Low Level VDD e5V, VOe0.5V 1.5 2 1.5 1.5 V

Input Voltage VDD e10V, VOe1.0V 3.0 4 3.0 3.0 V

VDD e15V, VOe1.5V 4.0 6 4.0 4.0 V

VIH High Level VDD e5V, VOe4.5V 3.5 3.5 3 3.5 V

Input Voltage VDD e10V, VOe9.0V 7.0 7.0 6 7.0 V

VDD e15V, VOe13.5V 11.0 11.0 9 11.0 V

IOL Low Level Output VDD e5V, VOe0.4V 0.52 0.44 0.88 0.36 mA

Current VDD e10V, VOe0.5V 1.3 1.1 2.25 0.9 mA

(Note 3) VDD e15V, VOe1.5V 3.6 3.0 8.8 2.4 mA

IOH High Level Output VDD e5V, VOe4.6V b0.52 b0.44 b0.88 b0.36 mA

Current VDD e10V, VOe9.5V b1.3 b1.1 b2.25 b0.9 mA

(Note 3) VDD e15V, VOe13.5V b3.6 b3.0 b8.8 b2.4 mA

IIN Input Current VDD e15V, VIN e0V b0.30 b10b5b0.30 b1.0 mA

VDD e15V, VIN e15V 0.30 10b50.30 1.0 mA

AC Electrical Characteristics*CD4071BC/CD4071BM

TAe25§C, Input tr;t

fe20 ns, CLe50 pF, RLe200 kX, Typical temperature coefficient is 0.3%/§C

Symbol Parameter Conditions Typ Max Units

tPHL Propagation Delay Time, VDD e5V 100 250 ns

High-to-Low Level VDD e10V 40 100 ns

VDD e15V 30 70 ns

tPLH Propagation Delay Time, VDD e5V 90 250 ns

Low-to-High Level VDD e10V 40 100 ns

VDD e15V 30 70 ns

tTHL,t

TLH Transition Time VDD e5V 90 200 ns

VDD e10V 50 100 ns

VDD e15V 40 80 ns

CIN Average Input Capacitance Any Input 5 7.5 pF

CPD Power Dissipation Capacity Any Gate 18 pF

*AC Parameters are guaranteed by DC correlated testing.

Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’

they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device

operation.

Note 2: All voltages measured with respect to VSS unless otherwise specified.

Note 3: IOH and IOL are tested one output at a time.

Obsolete

AC Electrical Characteristics*CD4081BC/CD4081BM

TAe25§C, Input tr;t

fe20 ns, CLe50 pF, RLe200 kX, Typical temperature coefficient is 0.3%/§C

Symbol Parameter Conditions Typ Max Units

tPHL Propagation Delay Time, VDD e5V 100 250 ns

High-to-Low Level VDD e10V 40 100 ns

VDD e15V 30 70 ns

tPLH Propagation Delay Time, VDD e5V 120 250 ns

Low-to-High Level VDD e10V 50 100 ns

VDD e15V 35 70 ns

tTHL,t

TLH Transition Time VDD e5V 90 200 ns

VDD e10V 50 100 ns

VDD e15V 40 80 ns

CIN Average Input Capacitance Any Input 5 7.5 pF

CPD Power Dissipation Capacity Any Gate 18 pF

*AC Parameters are guaranteed by DC correlated testing.

Typical Performance Characteristics

TL/F/5977– 7

FIGURE 1. Typical Transfer

Characteristics

TL/F/5977– 8

FIGURE 2. Typical Transfer

Characteristics

TL/F/5977– 9

FIGURE 3. Typical Transfer

Characteristics

TL/F/5977– 10

FIGURE 4. Typical Transfer

Characteristics

TL/F/5977– 11

FIGURE 5

TL/F/5977– 12

FIGURE 6

Obsolete

Typical Performance Characteristics (Continued)

TL/F/5977– 13

FIGURE 7

TL/F/5977– 14

FIGURE 8

TL/F/5977– 15

FIGURE 9

TL/F/5977– 16

FIGURE 10 TL/F/5977– 17

FIGURE 11

TL/F/5977– 18

FIGURE 12

TL/F/5977– 19

FIGURE 13

TL/F/5977– 20

FIGURE 14

Obsolete

Schematic Diagrams

CD4071B

TL/F/5977– 1

TL/F/5977– 2

(/4 of device shown

JeAaB

Logical ‘‘1’’ eHigh

Logical ‘‘0’’ eLow

*All inputs protected by standard

CMOS protection circuit.

CD4081B

TL/F/5977– 4

TL/F/5977– 5

(/4 of device shown

JeA#B

Logical ‘‘1’’ eHigh

Logical ‘‘0’’ eLow

*All inputs protected by standard

CMOS protection circuit.

Obsolete

Physical Dimensions inches (millimeters)

Ceramic Dual-In-Line Package (J)

Order Number CD4071BMJ, CD4071BCJ

CD4081BMJ or CD4081BCJ

NS Package Number J14A

Obsolete

CD4071BM/CD4071BC Quad 2-Input OR Buffered B Series Gate

CD4081BM/CD4081BC Quad 2-Input AND Buffered B Series Gate

Physical Dimensions inches (millimeters) (Continued)

Molded Dual-In-Line Package (N)

Order Number CD4071BMN, CD4071BCN

CD4081BMN or CD4081BCN

NS Package Number N14A

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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL

SEMICONDUCTOR CORPORATION. As used herein:

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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

Obsolete

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