TLE42744
Low Dropout Linear Voltage Regulator
Data Sheet, Rev. 1.1, January 2010
Automotive Power
TLE42744
Type Package Marking
TLE42744DV50 PG-TO252-3 42744V5
TLE42744GV50 PG-TO263-3 42744V5
TLE42744EV50 PG-SSOP-14 exposed pad 42744V5
TLE42744DV33 PG-TO252-3 42744V33
TLE42744GV33 PG-TO263-3 42744V33
TLE42744GSV33 PG-SOT223-4 42744V33
Data Sheet 2 Rev. 1.1, 2010-01-13
PG-TO252-3
PG-TO263-3
PG-SSOP-14 exposed pad
PG-SOT223-4
Low Dropout Linear Voltage Regulator
1Overview
Features
Very Low Current Consumption
Output Voltages 5 V and 3.3 V ±2%
Output Current up to 400 mA
Very Low Dropout Voltage
Output Current Limitation
Reverse Polarity Protection
Overtemperature Shutdown
Wide Temperature Range
From -40 °C up to 150 °C
Green Product (RoHS compliant)
AEC Qualified
Description
The TLE42744 is a monolithic integrated low dropout voltage regulator for load currents up to 400 mA. An input
voltage up to 40 V is regulated to VQ,nom = 5 V / 3.3 V with a precision of ±2%. The device is designed for the harsh
environment of automotive applications. Therefore it is protected against overload, short circuit and
overtemperature conditions by the implemented output current limitation and the overtemperature shutdown
circuit. The TLE42744 can be also used in all other applications requiring a stabilized 5 V / 3.3 V voltage.
Due to its very low quiescent current the TLE42744 is dedicated for use in applications permanently connected to
VBAT.
Data Sheet 3 Rev. 1.1, 2010-01-13
TLE42744
Block Diagram
2 Block Diagram
Figure 1 Block Diagram
Ι
AEB01959
GND
Q
Bandgap
Reference
Control
Amplifier
Sensor
Temperature
Buffer
Saturation
Control and
Protection
Circuit
TLE42744
Pin Configuration
Data Sheet 4 Rev. 1.1, 2010-01-13
3 Pin Configuration
3.1 Pin Assignment PG-TO252-3, PG-TO263-3 and PG-SOT223-4
Figure 2 Pin Configuration (top view)
3.2 Pin Definitions and Functions PG-TO252-3, PG-TO263-3and PG-SOT223-4
Pin No. Symbol Function
1IInput
block to ground directly at the IC with a ceramic capacitor
2GNDGround
internally connected to heat slug
3QOutput
block to ground with a capacitor close to the IC terminals, respecting the values given
for its capacitance and ESR in “Functional Range” on Page 7
Heat Slug / 4 Heat Slug
internally connected to GND;
connect to GND and heatsink area
AEP02561
13
ΙQ
GND
GND
Ι
Q
AEP02281
PinConfig_PG-SOT223-
4 .vsd
123
4
IGND
GND
Q
Data Sheet 5 Rev. 1.1, 2010-01-13
TLE42744
Pin Configuration
3.3 Pin Assignment PG-SSOP-14 exposed pad
Figure 3 Pin Configuration (top view)
3.4 Pin Definitions and Functions PG-SSOP-14 exposed pad
Pin No. Symbol Function
1, 2, 3, 5, 6, 7 n.c. not connected
can be open or connected to GND
4GNDGround
8, 10, 11, 12,
14
n.c. not connected
can be open or connected to GND
9QOutput
block to ground with a capacitor close to the IC terminals, respecting the values given
for its capacitance and ESR in “Functional Range” on Page 7
13 I Input
block to ground directly at the IC with a ceramic capacitor
Pad Exposed Pad
connect to GND and heatsink area
QF
QF
4
QF
QF
QF
,
QF
QF
QF
QF
*1'
QF
QF





7/(B3,1&21),*B6623
69*
TLE42744
General Product Characteristics
Data Sheet 6 Rev. 1.1, 2010-01-13
4 General Product Characteristics
4.1 Absolute Maximum Ratings
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Absolute Maximum Ratings1)
Tj= -40 °C to 150 °C; all voltages with respect to ground, (unless otherwise specified)
1) not subject to production test, specified by design
Pos. Parameter Symbol Limit Values Unit Test Condition
Min. Max.
Input I
4.1.1 Voltage VI-42 45 V
Output Q
4.1.2 Voltage VQ-1 40 V
Temperature
4.1.3 Junction temperature Tj-40 150 °C–
4.1.4 Storage temperature Tstg -50 150 °C–
ESD Susceptibility
4.1.5 ESD Absorption VESD,HBM -4 4 kV Human Body Model
(HBM)2)
2) ESD susceptibility Human Body Model “HBM” according to AEC-Q100-002 - JESD22-A114
4.1.6 VESD,CDM -1000 1000 V Charge Device
Model (CDM)3) at all
pins
3) ESD susceptibility Charged Device Model “CDM” according to ESDA STM5.3.1
Data Sheet 7 Rev. 1.1, 2010-01-13
TLE42744
General Product Characteristics
4.2 Functional Range
Note: Within the functional or operating range, the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the Electrical Characteristics table.
4.3 Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go
to www.jedec.org.
Pos. Parameter Symbol Limit Values Unit Remarks
Min. Max.
4.2.1 Input voltage VI5.5 40 V TLE42744DV50,
TLE42744GV50,
TLE42744EV50
4.2.2 Input voltage VI4.7 40 V TLE42744GV33,
TLE42744DV33,
TLE42744GSV33
4.2.3 Output Capacitor’s
Requirements for Stability
CQ22 µF 1)
1) the minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%
4.2.4 ESR(CQ)–32)
2) relevant ESR value at f=10kHz
4.2.5 Junction temperature Tj-40 150 °C–
Pos. Parameter Symbol Limit Values Unit Conditions
Min. Typ. Max.
TLE42744DV50, TLE42744DV33 (PG-TO252-3)
4.3.1 Junction to Case1) RthJC 3.6 K/W measured to heat
slug
4.3.2 Junction to Ambient1) RthJA –27–K/W
2)
4.3.3 115 K/W footprint only3)
4.3.4 52 K/W 300 mm² heatsink
area3)
4.3.5 40 K/W 600 mm² heatsink
area3)
TLE42744GV50, TLE42744GV33 (PG-TO263-3)
4.3.6 Junction to Case1) RthJC 3.6 K/W measured to heat
slug
4.3.7 Junction to Ambient1) RthJA –22 2)
4.3.8 74 K/W footprint only3)
4.3.9 42 K/W 300 mm² heatsink
area3)
4.3.10 34 K/W 600 mm² heatsink
area3)
TLE42744
General Product Characteristics
Data Sheet 8 Rev. 1.1, 2010-01-13
TLE42744EV50 (PG-SSOP-14 exposed pad)
4.3.11 Junction to Case1) RthJC 7 K/W measured to
exposed pad
4.3.12 Junction to Ambient1) RthJA –43–K/W
2)
4.3.13 120 K/W footprint only3)
4.3.14 59 K/W 300 mm² heatsink
area3)
4.3.15 49 K/W 600 mm² heatsink
area3)
TLE42744GSV33 (PG-SOT223-4)
4.3.16 Junction to Case1) RthJC 17 K/W measured to heat
slug
4.3.17 Junction to Ambient1) RthJA –54–K/W
2)
4.3.18 139 K/W footprint only3)
4.3.19 73 K/W 300 mm² heatsink
area3)
4.3.20 64 K/W 600 mm² heatsink
area3)
1) Not subject to production test, specified by design.
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
3) Specified RthJA value is according to Jedec JESD 51-3 at natural convection on FR4 1s0p board; The Product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70µm Cu).
Pos. Parameter Symbol Limit Values Unit Conditions
Min. Typ. Max.
Data Sheet 9 Rev. 1.1, 2010-01-13
TLE42744
Electrical Characteristics
5 Electrical Characteristics
5.1 Electrical Characteristics Voltage Regulator
Electrical Characteristics
VI =13.5 V; Tj= -40 °C to 150 °C; all voltages with respect to ground (unless otherwise specified)
Pos. Parameter Symbol Limit Values Unit Measuring Condition
Min. Typ. Max.
Output Q
5.1.1 Output Voltage VQ4.9 5.0 5.1 V TLE42744DV50,
TLE42744GV50,
TLE42744EV50
5mA<IQ<400mA
6V<VI<28V
5.1.2 Output Voltage VQ4.9 5.0 5.1 V TLE42744DV50,
TLE42744GV50,
TLE42744EV50
5mA<IQ<200 mA
6V<VI<40V
5.1.3 Output Voltage VQ3.23 3.3 3.37 V TLE42744GV33,
TLE42744DV33,
TLE42744GSV33;
5mA<IQ<400mA
4.7 V < VI<28V
5.1.4 Output Voltage VQ3.23 3.3 3.37 V TLE42744GV33,
TLE42744DV33,
TLE42744GSV33;
5mA<IQ<200 mA
4.7 V < VI<40V
5.1.5 Dropout Voltage Vdr 250 500 mV TLE42744DV50,
TLE42744GV50,
TLE42744EV50
IQ=250mA
Vdr =VIVQ
1)
5.1.6 Load Regulation VQ, lo 20 50 mV TLE42744DV50,
TLE42744GV50,
TLE42744EV50;
IQ= 5 mA to 400 mA
VI=6V
5.1.7 Load Regulation VQ, lo 40 70 mV TLE42744GV33,
TLE42744DV33,
TLE42744GSV33;
IQ= 5 mA to 300 mA
5.1.8 Line Regulation VQ, li 1025mVVl= 12 V to 32 V
IQ=5mA
5.1.9 Output Current Limitation IQ400 600 1100 mA 1)
5.1.10 Power Supply Ripple Rejection2) PSRR –60–dBfr=100Hz; Vr=0.5Vpp
TLE42744
Electrical Characteristics
Data Sheet 10 Rev. 1.1, 2010-01-13
5.1.11 Temperature Output Voltage Drift2) –0.5–mV/K
5.1.12 Overtemperature Shutdown
Threshold
Tj,sd 151 200 °C Tj increasing2)
5.1.13 Overtemperature Shutdown
Threshold Hysteresis
Tj,sdh –25–°CTj decreasing2)
Current Consumption
5.1.14 Quiescent Current
Iq=IIIQ
Iq–100220µAIQ=1mA
5.1.15 Current Consumption
Iq=IIIQ
Iq–815mAIQ=250mA
5.1.16 Iq 15 25 mA TLE42744DV50,
TLE42744GV50,
TLE42744EV50;
IQ=400mA
5.1.17 20 30 mA TLE42744GV33,
TLE42744DV33,
TLE42744GSV33;
IQ=400mA
1) Measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5 V.
2) not subject to production test, specified by design
Electrical Characteristics
VI =13.5 V; Tj= -40 °C to 150 °C; all voltages with respect to ground (unless otherwise specified)
Pos. Parameter Symbol Limit Values Unit Measuring Condition
Min. Typ. Max.
dVQ
dT
-----------
Data Sheet 11 Rev. 1.1, 2010-01-13
TLE42744
Electrical Characteristics
5.2 Typical Performance Characteristics Voltage Regulator
Current Consumption Iq versus
Output Current IQ
Current Consumption Iq versus
Low Output Current IQ
Output Voltage Variation
VQ versus
Junction Temperature TJ
Dropout Voltage Vdr versus
Output Current IQ (5 V versions only)
01_IQ_IQ.VSD
0
2
4
6
8
10
12
14
16
0 100 200 300 400
I
Q
[mA]
I
q
[mA]
VI
= 13.5 V
Tj
= 25 °C
02_IQ_IQLOW.VSD
0
0,2
0,4
0,6
0,8
1
1,2
1,4
0 20406080100
IQ
[mA]
Iq
[mA]
V
I
= 13.5 V
T
j
= 25 °C
03_VQ_TJ.VSD
-0,5
-0,4
-0,3
-0,2
-0,1
0
0,1
0,2
0,3
0,4
0,5
-40 0 40 80 120
Tj
[°C]
VQ
[%]
I
Q
= 5 mA
V
I
= 13.5 V
150
04_VDR_IQ.VSD
0
50
100
150
200
250
300
350
400
450
500
0 100 200 300 400
I
Q
[mA]
V
DR
[mV]
T
j
= 150 °C
T
j
= 25 °C
T
j
= -40 °C
TLE42744
Electrical Characteristics
Data Sheet 12 Rev. 1.1, 2010-01-13
Dropout Voltage Vdr versus
Junction Temperature (5 V versions only)
Maximum Output Current IQ versus
Input Voltage VI
Region Of Stability: Output Capacitor’s ESR
ESR(CQ) versus Output Current IQ
05_VDR_TJ.VSD
0
50
100
150
200
250
300
350
400
450
500
-40 0 40 80 120 160
T
j
[°C]
V
DR
[mV]
I
Q
= 400 mA
I
Q
= 100 mA
I
Q
= 10 mA
0 6 _ IQM AX_ VI.VSD
0
100
200
300
400
500
600
700
800
900
010203040
V
I
[V]
I
Q,max
[mA]
V
Q
= V
Q,nom
- 100 mV
T
j
= -40 °C
T
j
= 25 °C
T
j
= 150 °C
07_ESR_IQ.VSD
0,01
0,1
1
10
0 100 200 300 400
I
Q
[mA]
ESR(C
Q
)
[]
C
Q
= 22 µF
V
I
= 13.5 V
Stable
Region
Unstable
Region
Data Sheet 13 Rev. 1.1, 2010-01-13
TLE42744
Package Outlines
6 Package Outlines
Figure 4 PG-TO252-3
5.4 ±0.1
-0.10
6.5 +0.15
A
±0.5
9.9
6.22
-0.2
1
±0.1
±0.15
0.8
0.15
±0.1
MAX.
per side 0.75
2.28
4.57
+0.08
-0.04
0.9
2.3 -0.10
+0.05
B
MIN.0.51
±0.1
1
+0.08
-0.04
0.5
0...0.15
B
A0.25 M0.1
All metal surfaces tin plated, except area of cut.
3 x
TLE42744
Package Outlines
Data Sheet 14 Rev. 1.1, 2010-01-13
Figure 5 PG-TO263-3
BA0.25
M
0.1
Typical
±0.2
GPT09362
10
8.5
1)
7.55
1)
(15)
±0.2
9.25
±0.3
1
0...0.15
5.08
2.54
0.75
±0.1
1.05
±0.1
1.27
4.4
B
0.5
±0.1
±0.3
2.7
4.7
±0.5
0.05
1)
0.1
All metal surfaces: tin plated, except area of cut.
2.4
Metal surface min. x=7.25, y=6.9
A
0...0.3
B
8˚ MAX.
Data Sheet 15 Rev. 1.1, 2010-01-13
TLE42744
Package Outlines
Figure 6 PG-SSOP-14 exposed pad
PG-SSOP-14-1,-2,-3-PO V02
17
14 8
14
17
8
14x
0.25
±0.05 2)
M
0.15 DC A-B
0.65 C
Stand Off
0 ... 0.1
(1.45)
1.7 MAX.
0.08 C
A
B
4.9
±0.11)
A-BC0.1 2x
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion
Bottom View
±0.2
3
±0.2
2.65
0.2
±0.2
D6
M
D 8x
0.64
±0.25
3.9
±0.11)
0.35 x 45˚
0.1 CD
+0.06
0.19
8
˚
MAX.
Index Marking
Exposed
Diepad
TLE42744
Package Outlines
Data Sheet 16 Rev. 1.1, 2010-01-13
Figure 7 PG-SOT223-4
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
SOT223-PO V04
123
3
4
±0.1
±0.04
0.5 MIN.
0.28
0.1 MAX.
6.5±0.2
A
4.6
2.3
0.7 ±0.1
0.25 MA
1.6±0.1
7
±0.3
B0.25 M
±0.2
3.5
B
0...10˚
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages.Dimensions in mm
Data Sheet 17 Rev. 1.1, 2010-01-13
TLE42744
Revision History
7 Revision History
Revision Date Changes
1.1 2010-01-13 Updated Version Data Sheet:
version TLE42744EV50 in PG-SSOP-14 exposed pad and all related description
added;
3.3V versions TLE42744GV33 in PG-TO263-3, TLE42744DV33 in PG-TO252-3
and TLE42744GSV33 in PG-SOT223-4 and all related description added
1.0 2009-01-14 Initial Version final Data Sheet
Edition 2010-01-13
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2010 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.