LM101AJAN
Operational Amplifiers
General Description
The LM101A is a general purpose operational amplifier
which features improved performance over industry stan-
dards such as the LM709. Advanced processing techniques
make possible an order of magnitude reduction in input
currents, and a redesign of the biasing circuitry reduces the
temperature drift of input current. Improved specifications
include:
•Offset voltage 3 mV maximum over temperature
•Input current 100 nA maximum over temperature
•Offset current 20 nA maximum over temperature
•Guaranteed drift characteristics
•Offsets guaranteed over entire common mode and sup-
ply voltage ranges
•Slew rate of 10V/µs as a summing amplifier
This amplifier offers many features which make its appli-
cation nearly foolproof: overload protection on the input
and output, no latch-up when the common mode range is
exceeded, and freedom from oscillations and compensa-
tion with a single 30 pF capacitor. It has advantages over
internally compensated amplifiers in that the frequency
compensation can be tailored to the particular applica-
tion. For example, in low frequency circuits it can be
overcompensated for increased stability margin. Or the
compensation can be optimized to give more than a
factor of ten improvement in high frequency performance
for most applications.
In addition, the device provides better accuracy and
lower noise in high impedance circuitry. The low input
currents also make it particularly well suited for long
interval integrators or timers, sample and hold circuits
and low frequency waveform generators. Further, replac-
ing circuits where matched transistor pairs buffer the
inputs of conventional IC op amps, it can give lower offset
voltage and a drift at a lower cost.
Features
nOffset voltage 3 mV maximum over temperature
nInput current 100 nA maximum over temperature
nOffset current 20 nA maximum over temperature
nGuaranteed drift characteristics
nOffsets guaranteed over entire common mode and
supply voltage ranges
nSlew rate of 10 V/µS as a summing amplifier
Ordering Information
NS Part Number SMD Part Number NS Package Number Package Description
JL101ABGA JM38510/10103BGA H08C 8LD Metal Can
JL101ABPA JM38510/10103BPA J08A 8LD CERDIP
JL101ABHA JM38510/10103BHA W10A 10LD CERPACK
JL101ABCA JM38510/10103BCA J14A 14LD CERDIP
JL101ASGA JM38510/10103SGA H08C 8LD Metal Can
JL101ASPA JM38510/10103SPA J08A 8LD CERDIP
January 2006
LM101AJAN Operational Amplifiers
© 2006 National Semiconductor Corporation DS201296 www.national.com
Connection Diagrams (Continued)
(Top View)
Dual-In-Line Package
(Top View)
Ceramic Flatpack Package
20129603
See NS Package Number J14A
20129640
See NS Package Number W10A
Fast AC/DC Converter
20129633
Note 1: Feedforward compensation can be used to make a fast full wave rectifier without a filter.
LM101AJAN
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Absolute Maximum Ratings (Note 2)
Supply Voltage ±22V
Differential Input Voltage ±30V
Input Voltage (Note 3) ±15V
Output Short Circuit Duration Continuous
Operating Ambient Temp. Range −55˚C ≤T
A
≤+125˚C
T
J
Max 150˚C
Power Dissipation at T
A
= 25˚C (Note 4)
H-Package
(Still Air) 750 mW
(500 LF / Min Air Flow) 1,200 mW
J8-Package
(Still Air) 1,000 mW
(500 LF / Min Air Flow) 1,500 mW
J14-Package
(Still Air) 1,200mW
(500 LF / Min Air Flow) 2,000mW
W-Package
(Still Air) 500mW
(500 LF / Min Air Flow) 800mW
Thermal Resistance
θ
JA
H-Package
(Still Air) 165˚C/W
(500 LF / Min Air Flow) 89˚C/W
J8-Package
(Still Air) 128˚C/W
(500 LF / Min Air Flow) 75˚C/W
J14-Package
(Still Air) 98˚C/W
(500 LF / Min Air Flow) 59˚C/W
W-Package
(Still Air) 233˚C/W
(500 LF / Min Air Flow) 155˚C/W
θ
JC
(Typical)
H-Package 39˚C/W
J8-Package 26˚C/W
J14-Package 24˚C/W
W-Package 26˚C/W
Storage Temperature Range −65˚C ≤T
A
≤+150˚C
Lead Temperature (Soldering, 10 sec.) 300˚C
ESD Tolerance (Note 5) 3000V
LM101AJAN
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Quality Conformance Inspection
Mil-Std-883, Method 5005 - Group A
Subgroup Description Temp (˚C)
1 Static tests at 25
2 Static tests at 125
3 Static tests at -55
4 Dynamic tests at 25
5 Dynamic tests at 125
6 Dynamic tests at -55
7 Functional tests at 25
8A Functional tests at 125
8B Functional tests at -55
9 Switching tests at 25
10 Switching tests at 125
11 Switching tests at -55
LM101A JAN Electrical Characteristics
DC Parameters
The following conditions apply to all parameters, unless otherwise specified
V
CC
=±20V, V
CM
= 0V, R
S
=50Ω
Symbol Parameters Conditions Notes Min Max Unit Sub-
groups
V
IO
Input Offset Voltage +V
CC
= 35V, -V
CC
= -5V,
V
CM
= -15V
-2.0 +2.0 mV 1
-3.0 +3.0 mV 2, 3
+V
CC
= 5V, -V
CC
= -35V,
V
CM
= +15V
-2.0 +2.0 mV 1
-3.0 +3.0 mV 2, 3
V
CM
= 0V -2.0 +2.0 mV 1
-3.0 +3.0 mV 2, 3
+V
CC
= 5V, -V
CC
= -5V,
V
CM
=0V
-2.0 +2.0 mV 1
-3.0 +3.0 mV 2, 3
I
IO
Input Offset Current +V
CC
= 35V, -V
CC
= -5V,
V
CM
= -15V, R
S
= 100KΩ
-10 +10 nA 1, 2
-20 +20 nA 3
+V
CC
= 5V, -V
CC
= -35V,
V
CM
= +15V, R
S
= 100KΩ
-10 +10 nA 1, 2
-20 +20 nA 3
V
CM
= 0V, R
S
= 100KΩ-10 +10 nA 1, 2
-20 +20 nA 3
+V
CC
= 5V, -V
CC
= -5V,
V
CM
= 0V, R
S
= 100KΩ
-10 +10 nA 1, 2
-20 +20 nA 3
±I
IB
Input Bias Current +V
CC
= 35V, -V
CC
= -5V,
V
CM
= -15V, R
S
= 100KΩ
-0.1 75 nA 1, 2
-0.1 100 nA 3
+V
CC
= 5V, -V
CC
= -35V,
V
CM
= +15V, R
S
= 100KΩ
-0.1 75 nA 1, 2
-0.1 100 nA 3
V
CM
= 0V, R
S
= 100KΩ-0.1 75 nA 1, 2
-0.1 100 nA 3
+V
CC
= 5V, -V
CC
= -5V,
V
CM
= 0V, R
S
= 100KΩ
-0.1 75 nA 1, 2
-0.1 100 nA 3
+PSRR Power Supply Rejection Ratio +V
CC
= 10V, -V
CC
= -20V -50 +50 µV/V 1
-100 +100 µV/V 2, 3
-PSRR Power Supply Rejection Ratio +V
CC
= 20V, -V
CC
= -10V -50 +50 µV/V 1
-100 +100 µV/V 2, 3
LM101AJAN
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LM101A JAN Electrical Characteristics (Continued)
DC Parameters (Continued)
The following conditions apply to all parameters, unless otherwise specified
V
CC
=±20V, V
CM
= 0V, R
S
=50Ω
Symbol Parameters Conditions Notes Min Max Unit Sub-
groups
CMRR Common Mode Rejection Ratio V
CC
=±35V to ±5V,
V
CM
=±15V 80 dB 1, 2, 3
+V
IO
Adj Adjustment for Input Offset
Voltage 4.0 mV 1, 2, 3
-V
IO
Adj Adjustment for Input Offset
Voltage -4.0 mV 1, 2, 3
+I
OS
Output Short Circuit Current +V
CC
= 15V, -V
CC
= -15V,
t≤25mS, V
CM
= -15V -60 mA 1, 2, 3
-I
OS
Output Short Circuit Current +V
CC
= 15V, -V
CC
= -15V,
t≤25mS, V
CM
= +15V +60 mA 1, 2, 3
I
CC
Power Supply Current +V
CC
= 15V, -V
CC
= -15V 3.0 mA 1
2.32 mA 2
3.5 mA 3
∆V
IO
/∆T Temperature Coefficient of
Input Offset Voltage
-55˚C ≤T
A
≤+25˚C (Note 6) -18 +18 µV/˚C 2
+25˚C ≤T
A
≤+125˚C (Note 6) -15 +15 µV/˚C 3
∆I
IO
/∆T Temperature Coefficient of
Input Offset Current
-55˚C ≤T
A
≤+25˚C (Note 6) -200 +200 pA/˚C 2
+25˚C ≤T
A
≤+125˚C (Note 6) -100 +100 pA/˚C 3
-A
VS
Large Signal (Open Loop)
Voltage Gain
R
L
=2KΩ,V
O
= -15V (Note 7) 50 V/mV 4
(Note 7) 25 V/mV 5, 6
R
L
= 10KΩ,V
O
= -15V (Note 7) 50 V/mV 4
(Note 7) 25 V/mV 5, 6
+A
VS
Large Signal (Open Loop)
Voltage Gain
R
L
=2KΩ,V
O
= +15V (Note 7) 50 V/mV 4
(Note 7) 25 V/mV 5, 6
R
L
= 10KΩ,V
O
= +15V (Note 7) 50 V/mV 4
(Note 7) 25 V/mV 5, 6
A
VS
Large Signal (Open Loop)
Voltage Gain
V
CC
=±5V, R
L
=2KΩ,
V
O
=±2V (Note 7) 10 V/mV 4, 5, 6
V
CC
=±5V, R
L
= 10KΩ,
V
O
=±2V (Note 7) 10 V/mV 4, 5, 6
+V
OP
Output Voltage Swing R
L
= 10KΩ,V
CM
= -20V +16 V 4, 5, 6
R
L
=2KΩ,V
CM
= -20V +15 V 4, 5, 6
-V
OP
Output Voltage Swing R
L
= 10KΩ,V
CM
= 20V -16 V 4, 5, 6
R
L
=2KΩ,V
CM
= 20V -15 V 4, 5, 6
AC Parameters
The following conditions apply to all parameters, unless otherwise specified
V
CC
=±20V, V
CM
= 0V, R
S
=50Ω
Symbol Parameter Conditions Notes Min Max Units Sub-
groups
+SR Slew Rate A
V
=1,V
I
= -5V to +5V 0.3 V/µS 7
-SR Slew Rate A
V
=1,V
I
= +5V to -5V 0.3 V/µS 7
TR
TR
Rise Time A
V
=1,V
I
= 50mV 800 nS 7
TR
OS
Overshoot A
V
=1,V
I
= 50mV 25 % 7
NI
BB
Noise Broadband BW = 10Hz to 5KHz, R
S
=0Ω15 µV
RMS
7
NI
PC
Noise Popcorn BW = 10Hz to 5KHz,
R
S
= 100KΩ80 µV
PK
7
LM101AJAN
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LM101A JAN Electrical Characteristics (Continued)
DC Parameters: Drift Values
The following conditions apply to all parameters, unless otherwise specified
V
CC
=±20V, V
CM
= 0V, R
S
=50Ω
Delta calculations performed on JAN S devices at group B, Subgroup 5 only.
Symbol Parameter Conditions Notes Min Max Units Sub-
groups
V
IO
Input Offset Voltage V
CM
= 0V -0.5 0.5 mV 1
±I
IB
Input Bias Current V
CM
= 0V, R
S
= 100KΩ-7.5 7.5 nA 1
Notes
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is
intended to be functional, but do no guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed
test conditions.
Note 3: For supply voltages less than ±15V, the absolute maximum input voltage is equal to the supply voltage.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package junction
to ambient thermal resistance), and TA(ambient temperature). The maximum allowable power dissipation at any temperature is PDmax =(T
Jmax −T
A)/θJA or the
number given in the Absolute Maximum Ratings, whichever is lower.
Note 5: Human body model, 100 pF discharged through 1.5 kΩ.
Note 6: Calculated parameter
Note 7: Datalog reading of K = V/mV.
Note 8: Pin connections shown are for 8-pin packages.
LM101AJAN
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Typical Performance Characteristics LM101A
Input Voltage Range Output Swing
20129641
20129642
Voltage Gain
20129643
Supply Current Voltage Gain
20129647 20129648
LM101AJAN
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Typical Performance Characteristics LM101A (Continued)
Maximum Power Dissipation
Input Current,
LM101A
20129649 20129650
Current Limiting Input Noise Voltage
20129651
20129652
Input Noise Current Common Mode Rejection
20129653 20129654
LM101AJAN
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Typical Performance Characteristics LM101A (Continued)
Power Supply Rejection
Closed Loop Output
Impedance
20129655
20129656
LM101AJAN
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Typical Performance Characteristics for Various Compensation Circuits
(Note 8)
Single Pole Compensation Two Pole Compensation
20129608
CS=30pF
20129612
CS=30pF
C2=10C1
Feedforward Compensation
Open Loop Frequency
Response
20129616
fo= 3 MHz
20129609
Open Loop Frequency
Response
Open Loop Frequency
Response
20129613 20129617
LM101AJAN
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Typical Performance Characteristics for Various Compensation Circuits
(Note 8) (Continued)
Large Signal Frequency
Response
Large Signal Frequency
Response
20129610 20129614
Large Signal Frequency
Response
Voltage Follower Pulse
Response
20129618 20129611
Voltage Follower Pulse
Response Inverter Pulse Response
20129615 20129619
LM101AJAN
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Typical Applications (Note 8)
Variable Capacitance Multiplier
20129620
Simulated Inductor
20129621
L.R1 R2 C1
RS=R2
RP=R1
Fast Inverting Amplifier
with High Input Impedance
20129622
Inverting Amplifier
with Balancing Circuit
20129623
†May be zero or equal to parallel combination of R1 and R2 for minimum
offset.
Sine Wave Oscillator
20129624
fo=10kHz
Integrator with Bias Current Compensation
20129625
*Adjust for zero integrator drift. Current drift typically 0.1 nA/˚C over −55˚C
to +125˚C temperature range.
LM101AJAN
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Although the LM101A is designed for trouble free operation,
experience has indicated that it is wise to observe certain
precautions given below to protect the devices from abnor-
mal operating conditions. It might be pointed out that the
advice given here is applicable to practically any IC op amp,
although the exact reason why may differ with different de-
vices.
When driving either input from a low-impedance source, a
limiting resistor should be placed in series with the input lead
to limit the peak instantaneous output current of the source
to something less than 100 mA. This is especially important
when the inputs go outside a piece of equipment where they
could accidentally be connected to high voltage sources.
Large capacitors on the input (greater than 0.1 µF) should be
treated as a low source impedance and isolated with a
resistor. Low impedance sources do not cause a problem
unless their output voltage exceeds the supply voltage. How-
ever, the supplies go to zero when they are turned off, so the
isolation is usually needed.
The output circuitry is protected against damage from shorts
to ground. However, when the amplifier output is connected
to a test point, it should be isolated by a limiting resistor, as
test points frequently get shorted to bad places. Further,
when the amplifier drives a load external to the equipment, it
is also advisable to use some sort of limiting resistance to
preclude mishaps.
Precautions should be taken to insure that the power sup-
plies for the integrated circuit never become
reversed — even under transient conditions. With reverse
voltages greater than 1V, the IC will conduct excessive cur-
rent, fusing internal aluminum interconnects. If there is a
possibility of this happening, clamp diodes with a high peak
current rating should be installed on the supply lines. Rever-
sal of the voltage between V
+
and V
−
will always cause a
problem, although reversals with respect to ground may also
give difficulties in many circuits.
The minimum values given for the frequency compensation
capacitor are stable only for source resistances less than
10 kΩ, stray capacitances on the summing junction less than
5 pF and capacitive loads smaller than 100 pF. If any of
these conditions are not met, it becomes necessary to over-
compensate the amplifier with a larger compensation capaci-
tor. Alternately, lead capacitors can be used in the feedback
network to negate the effect of stray capacitance and large
feedback resistors or an RC network can be added to isolate
capacitive loads.
Although the LM101A is relatively unaffected by supply by-
passing, this cannot be ignored altogether. Generally it is
necessary to bypass the supplies to ground at least once on
every circuit card, and more bypass points may be required
if more than five amplifiers are used. When feed-forward
compensation is employed, however, it is advisable to by-
pass the supply leads of each amplifier with low inductance
capacitors because of the higher frequencies involved.
Typical Applications (Note 8)
Standard Compensation and
Offset Balancing Circuit
20129629
Fast Voltage Follower
20129631
Power Bandwidth: 15 kHz
Slew Rate: 1V/µs
Fast Summing Amplifier
20129630
Power Bandwidth: 250 kHz
Small Signal Bandwiidth: 3.5 MHz
Slew Rate: 10V/µs
LM101AJAN
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Typical Applications (Note 8) (Continued)
Instrumentation Amplifier
20129634
R1 = R4; R2 = R3
*,†Matching determines CMRR.
Integrator with Bias Current Compensation
20129635
*Adjust for zero integrator drift. Current drift typically 0.1 nA/˚C over 0˚C to
+70˚C temperature range.
Voltage Comparator for Driving RTL Logic or High
Current Driver
20129637
LM101AJAN
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Revision History Section
Date
Released
Revision Section Originator Changes
01/05/06 A New Release to corporate format L. Lytle 1 MDS datasheets converted into one Corp.
datasheet format. MJLM101A-X Rev 1A0
datasheet will be archived.
LM101AJAN
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Physical Dimensions inches (millimeters) unless otherwise noted
Metal Can Package (H)
NS Package Number H08C
Ceramic Dual-In-Line Package (J)
NS Package Number J08A
LM101AJAN
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Ceramic Dual-In-Line Package (J)
NS Package Number J14A
Ceramic Flatpack Package (W)
NS Package Number W10A
LM101AJAN
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Notes
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and whose failure to perform when
properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result
in a significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.
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LM101AJAN Operational Amplifiers
