30 V, Low Noise, Rail-to-Rail I/O, Low Power Operational Amplifiers ADA4084-2/ADA4084-4 Data Sheet PIN CONFIGURATIONS Rail-to-rail input/output Low power: 0.625 mA typical per amplifier at 15 V Gain bandwidth product: 15.9 MHz at AV =100 typical Unity-gain crossover: 9.9 MHz typical -3 dB closed-loop bandwidth: 13.9 MHz typical at 15 V Low offset voltage: 100 V maximum (SOIC) Unity-gain stable High slew rate: 4.6 V/s typical Low noise: 3.9 nV/Hz typical at 1 kHz ADA4084-2 OUT A 1 8 V+ -IN A 2 7 OUT B +IN A 3 6 -IN B V- 4 5 +IN B TOP VIEW (Not to Scale) NOTES 1. FOR THE LFCSP PACKAGE THE EXPOSED PAD MUST BE CONNECTED TO V-. 08237-001 FEATURES Figure 1. 8-Lead MSOP (RM), 8-Lead SOIC (R), 8-Lead LFCSP (CP) Battery-powered instrumentation High-side and low-side sensing Power supply control and protection Telecommunications DAC output amplifiers ADC input buffers OUT A 1 6 9 -IN C GENERAL DESCRIPTION OUT B 7 8 OUT C 13 -IN D +IN A 3 12 +IN D V+ 4 ADA4084-4 -IN B The ability to swing rail-to-rail at both the input and output enables designers to build multistage filters in single-supply systems and to maintain high signal-to-noise ratios. The ADA4084-2 and ADA4084-4 are specified over the industrial temperature range of -40C to +125C. The dual ADA4084-2 is available in the 8-lead SOIC, MSOP, and LFCSP surface-mount packages, and the ADA4084-4 is offered in the 14-lead TSSOP and 16-lead LFCSP. The ADA4084-2 and ADA4084-4 are members of a growing series of high voltage, low noise op amps offered by Analog Devices, Inc., (see Table 1). 13 NIC 14 OUT D 16 NIC 15 OUT A -IN A 1 12 -IN D ADA4084-4 TOP VIEW V+ 3 11 +IN D 10 V- +IN C -IN C 8 9 OUT C 7 +IN B 4 NOTES 1. NIC = NOT INTERNALLY CONNECTED. 2. FOR THE LFCSP PACKAGE THE EXPOSED PAD MUST BE CONNECTED TO V-. 08237-103 +IN A 2 -IN B 5 Other applications for these amplifiers include portable telecommunications equipment, power supply control and protection, and use as amplifiers or buffers for transducers with wide output ranges. Sensors requiring a rail-to-rail input amplifier include Hall effect, piezoelectric, and resistive transducers. Figure 2. 14-Lead TSSOP (RU) OUT B 6 These amplifiers are well suited for single-supply applications requiring both ac and precision dc performance. The combination of wide bandwidth, low noise, and precision makes the ADA4084-2 and ADA4084-4 useful in a wide variety of applications, including filters and instrumentation. 11 V- 10 +IN C +IN B 5 The ADA4084-2 (dual) and ADA4084-4 (quad) are single-supply, 10 MHz bandwidth amplifiers featuring rail-to-rail inputs and outputs. They are guaranteed to operate from 3 V to 30 V (or 1.5 V to 15 V). Rev. D 14 OUT D 2 -IN A 08237-102 APPLICATIONS Figure 3. 16-Lead LFCSP (CP) For a more complete selection table of low input voltage noise amplifiers, see the AN-940 Application Note, Low Noise Amplifier Selection Guide for Optimal Noise Performance, available at www.analog.com. Table 1. Low Noise Op Amps Voltage Noise 1.1 nV/Hz 1.8 nV/Hz 2.8 nV/Hz Rail-to-Rail Output 2.8 nV/Hz 3.2 nV/Hz 3.9 nV/Hz Rail-to-Rail Input/Output Single AD8597 ADA4004-1 AD8675 AD8671 OP27/OP37 Dual AD8599 ADA4004-2 AD8676 AD8672 Quad ADA4084-2 ADA4084-4 ADA4004-4 AD8674 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 (c)2011-2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com Powered by TCPDF (www.tcpdf.org) IMPORTANT LINKS for the ADA4084-2_4084-4* Last content update 12/03/2013 04:11 pm SIMILAR PRODUCTS & PARAMETRIC SELECTION TABLES ADA4077-2: available as a dual channel version in two grades offering lower offset and drift with higher linearity within the Input Voltage Range for dual supply applications. ADA4500-2: offers similar speed and precision in a high linearity, zero-crossover, 5V Op Amp. DESIGN COLLABORATION COMMUNITY Collaborate Online with the ADI support team and other designers about select ADI products. Follow us on Twitter: www.twitter.com/ADI_News Like us on Facebook: www.facebook.com/AnalogDevicesInc ADA4096-2 a lower power, 30V, rail-to-rail input/output Op Amp. Find Similar Products By Operating Parameters SAR ADC & Driver Quick-Match Guide DESIGN SUPPORT Submit your support request here: Linear and Data Converters Embedded Processing and DSP Telephone our Customer Interaction Centers toll free: DOCUMENTATION AN-940: Low Noise Amplifier Selection Guide for Optimal Noise Performance AN-849: Using Op Amps as Comparators Op Amp Applications Handbook MT-054: Precision Op Amps MT-052: Op Amp Noise Figure: Don't Be Mislead MT-048: Op Amp Noise Relationships: 1/f Noise, RMS Noise, and Equivalent Noise Bandwidth MT-047: Op Amp Noise MT-035: Op Amp Inputs, Outputs, Single-Supply, and Rail-to-Rail Issues DESIGN TOOLS, MODELS, DRIVERS & SOFTWARE OpAmp Error Budget Calculator ADIsimOpAmpTM Analog Bridge Wizard ADA4084 SPICE Macro Model Americas: Europe: China: India: Russia: 1-800-262-5643 00800-266-822-82 4006-100-006 1800-419-0108 8-800-555-45-90 Quality and Reliability Lead(Pb)-Free Data SAMPLE & BUY ADA4084-2 ADA4084-4 View Price & Packaging Request Evaluation Board Request Samples Check Inventory & Purchase Find Local Distributors EVALUATION KITS & SYMBOLS & FOOTPRINTS View the Evaluation Boards and Kits page for the ADA4084-2 View the Evaluation Boards and Kits page for the ADA4084-4 Symbols and Footprints for the ADA4084-2 Symbols and Footprints for the ADA4084-4 * This page was dynamically generated by Analog Devices, Inc. and inserted into this data sheet. Note: Dynamic changes to the content on this page (labeled 'Important Links') does not constitute a change to the revision number of the product data sheet. This content may be frequently modified. ADA4084-2/ADA4084-4 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 15 V Characteristics ................................................................ 17 Applications ....................................................................................... 1 Applications Information .............................................................. 23 General Description ......................................................................... 1 Functional Description .............................................................. 23 Pin Configurations ........................................................................... 1 Start-Up Characteristics ............................................................ 24 Revision History ............................................................................... 2 Input Protection ......................................................................... 24 Specifications..................................................................................... 3 Output Phase Reversal ............................................................... 24 Electrical Characteristics ............................................................. 3 Absolute Maximum Ratings ............................................................ 6 Designing Low Noise Circuits in Single-Supply Applications ................................................................................ 25 Thermal Resistance ...................................................................... 6 Comparator Operation .............................................................. 25 ESD Caution .................................................................................. 6 Outline Dimensions ....................................................................... 26 Typical Performance Characteristics ............................................. 7 Ordering Guide .......................................................................... 28 1.5 V Characteristics.................................................................. 7 5 V Characteristics ................................................................... 12 REVISION HISTORY 11/13--Rev. C to Rev. D Added 14-Lead TSSOP and 16-Lead LFCSP Packages ............................................................................... Universal Added ADA4804-4 ............................................................. Universal Change to Features Section and Applications Section ................ 1 Added Figure 2 and Figure 3; Renumbered Sequentially ........... 1 Changes to Table 2 ............................................................................ 3 Changes to Table 3 ............................................................................ 4 Changes to Table 4 ............................................................................ 5 Changes to Table 5 and Table 6 ....................................................... 6 Changes to Typical Performance Characteristics Section ........... 7 Added Figure 101 ........................................................................... 27 Added Figure 102; Changes to Ordering Guide ......................... 28 4/13--Rev. B to Rev. C Changes to Figure 48 Caption....................................................... 15 Updated Outline Dimensions ....................................................... 25 6/12--Rev. A to Rev. B Added LFCSP Package ....................................................... Universal Changes to Figure 1 .......................................................................... 1 Changes to Output Voltage High Parameter, Table 4 .................. 5 Added Figure 5 and Figure 7, Renumbered Sequentially ........... 7 Added Figure 30 and Figure 32 .................................................... 12 Added Figure 55 and Figure 57 .................................................... 17 Added Startup Characteristics Section ........................................ 23 Moved Figure 78 ............................................................................. 23 Changes to Output Phase Reversal Section and Comparator Operation Section........................................................................... 24 Updated Outline Dimensions ....................................................... 25 Changes to Ordering Guide .......................................................... 26 2/12--Rev. 0 to Rev. A Changes to Data Sheet Title .............................................................1 Changes to Voltage Range in General Description .......................1 Changes to Supply Current/Amplifier Parameter, Table 2 ..........3 Changes to Common-Mode Rejection Ratio Parameter, Table 3 ..4 Changes to Common-Mode Rejection Ratio Parameter, Table 4 ..5 Changes to Figure 2 ...........................................................................6 Changes to Figure 24...................................................................... 10 Changes to Figure 32...................................................................... 12 Changes to Figure 47...................................................................... 14 Changes to Figure 55...................................................................... 16 Changes to Figure 62...................................................................... 17 Changes to Figure 73...................................................................... 20 10/11--Revision 0: Initial Version Rev. D | Page 2 of 28 Data Sheet ADA4084-2/ADA4084-4 SPECIFICATIONS ELECTRICAL CHARACTERISTICS VSY = 3 V, VCM =1.5 V, TA = 25C, unless otherwise noted. Table 2. Parameter INPUT CHARACTERISTICS Offset Voltage Symbol Test Conditions/Comments VOS SOIC package -40C TA +125C MSOP, TSSOP packages -40C TA +125C ADA4084-2 LFCSP package -40C TA +125C -40C TA +125C TA = 25C ADA4084-4 LFCSP package Offset Voltage Drift Offset Voltage Matching VOS/T Input Bias Current IB Min Typ Max Unit 20 100 200 130 250 200 300 1.75 150 200 250 400 25 50 3 V V V V V V V/C V V nA nA nA nA V dB dB dB dB k||pF M||pF 50 80 0.5 140 -40C TA +125C Input Offset Current IOS 5 -40C TA +125C Input Voltage Range Common-Mode Rejection Ratio CMRR Large Signal Voltage Gain AVO Input Impedance, Differential Input Impedance, Common Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Unity-Gain Crossover Phase Margin -3 dB Closed-Loop Bandwidth Settling Time Total Harmonic Distortion Plus Noise NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density VCM = 0 V to 3 V -40C TA +125C RL = 2 k, 0.5 V VO 2.5 V RL = 2 k, -40C TA +125C 0 64 60 100 97 88 104 100||1.1 80||2.9 VOH VOL ISC ZOUT PSRR RL = 10 k to VCM -40C TA +125C RL = 2 k to VCM -40C TA +125C RL = 10 k to VCM -40C TA +125C RL = 2 k to VCM -40C TA +125C 2.9 2.8 2.85 2.7 2.9 10 20 20 40 30 50 -17/+10 0.1 f = 1 kHz, A = +1 VSY = 1.25 V to 1.75 V -40C TA +125C IO = 0 mA -40C TA +125C 100 90 SR GBP UGC M -3 dB tS THD + N RL = 2 k VIN = 5 mV p-p, RL = 10 k, AV = 100 VIN = 5 mV p-p, RL = 10 k, AV = 1 2.0 en p-p en in ISY 2.95 110 0.565 0.650 0.950 V V V V mV mV mV mV mA dB dB mA mA AV = 1, VIN = 5 mV p-p AV = 10, VIN = 2V p-p; 0.1% VIN = 300 mV rms, RL = 2 k, f = 1 kHz 2.6 15.4 8.08 86 12.3 4 0.009 V/s MHz MHz Degrees MHz s % 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz 0.14 3.9 0.55 V p-p nV/Hz pA/Hz Rev. D | Page 3 of 28 ADA4084-2/ADA4084-4 Data Sheet VSY = 5.0 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 3. Parameter INPUT CHARACTERISTICS Offset Voltage Symbol Conditions VOS SOIC package -40C TA +125C MSOP, TSSOP packages -40C TA +125C ADA4084-2 LFCSP package -40C TA +125C -40C TA +125C TA = 25C ADA4084-4 LFCSP package Offset Voltage Drift Offset Voltage Matching VOS/T Input Bias Current IB Min Typ Max Unit 30 100 250 130 250 200 300 1.75 150 200 250 400 25 50 +5 V V V V V V V/C V V nA nA nA nA V dB dB dB dB dB k||pF M||pF 60 90 0.5 140 -40C TA +125C Input Offset Current IOS 5 -40C TA +125C Input Voltage Range Common-Mode Rejection Ratio CMRR Large Signal Voltage Gain AVO Input Impedance, Differential Input Impedance, Common Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Unity-Gain Crossover Phase Margin -3 dB Closed-Loop Bandwidth Settling Time Total Harmonic Distortion Plus Noise NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density VCM = 4 V, -40C TA +125C VCM = 5 V VCM = 5 V-40C TA +125C RL = 2 k, -4 V VO 4 V RL = 2 k, -40C TA +125C -5 106 76 70 108 103 124 112 100||1.1 200||2.5 VOH VOL ISC ZOUT PSRR RL = 10 k to VCM -40C TA +125C RL = 2 k to VCM -40C TA +125C RL = 10 k to VCM -40C TA +125C RL = 2 k to VCM -40C TA +125C 4.9 4.8 4.8 4.7 -4.95 110 105 SR GBP UGC M -3 dB tS THD + N RL = 2 k to VCM VIN = 5 mV p-p, RL = 10 k, AV = 100 VIN = 5 mV p-p, RL = 10 k, AV = 1 2.4 en p-p en in 0.1 Hz to 10 Hz f = 1 kHz Rev. D | Page 4 of 28 -4.9 -4.8 -4.8 -4.7 -24/+17 0.1 f = 1 kHz, A = +1 AV = 1, VIN = 5 mV p-p AV = 10, VIN = 8V p-p; 0.1% VIN = 2 V rms, RL = 2 k, f = 1 kHz 4.85 -4.95 VSY = 2 V to 18 V -40C TA +125C IO = 0 mA -40C TA +125C ISY 4.95 120 0.595 0.700 1.00 V V V V V V V V mA dB dB mA mA 3.7 15.9 9.6 85 13.9 4 0.003 V/s MHz MHz Degrees MHz s % 0.14 3.9 0.55 V p-p nV/Hz pA/Hz Data Sheet ADA4084-2/ADA4084-4 VSY = 15.0 V, VCM = 0 V, TA = 25C, unless otherwise noted. Table 4. Parameter INPUT CHARACTERISTICS Offset Voltage Symbol Conditions VOS SOIC package -40C TA +125C MSOP, TSSOP packages -40C TA +125C ADA4084-2 LFCSP package -40C TA +125C Offset Voltage Drift Offset Voltage Matching VOS/T Input Bias Current IB Min Typ Max Unit 40 100 200 130 250 200 300 1.75 150 200 250 400 25 50 +15 V V V V V V V/C V V nA nA nA nA V dB dB dB dB dB k||pF M||pF 70 100 0.5 TA = 25C ADA4084-4 LFCSP package 140 -40C TA +125C Input Offset Current IOS 5 -40C TA +125C Input Voltage Range Common-Mode Rejection Ratio CMRR Large Signal Voltage Gain AVO Input Impedance, Differential Input Impedance, Common Mode OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Unity-Gain Crossover Phase Margin -3 dB Closed-Loop Bandwidth Settling Time Total Harmonic Distortion Plus Noise NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density VCM = 14 V, -40C TA +125C VCM = 15 V VCM = 15 V,-40C TA +125C RL = 2 k, -13.5 V VO +13.5 V -40C TA +125C -15 106 85 80 110 105 124 117 100||1.1 200||2.5 VOH VOL ISC ZOUT PSRR RL = 10 k to VCM -40C TA +125C RL = 2 k to VCM -40C TA +125C RL = 10 k to VCM -40C TA +125C RL = 2 k to VCM -40C TA +125C 14.85 14.8 14.5 14.0 -14.9 110 105 SR GBP UGC M -3 dB tS THD + N RL = 2 k VIN = 5 mV p-p, RL = 10 k, AV = 100 VIN = 5 mV p-p, RL = 10 k, AV = 1 2.4 en p-p en in 0.1 Hz to 10 Hz f = 1 kHz Rev. D | Page 5 of 28 -14.9 -14.8 -14.80 -14.7 30 0.1 f = 1 kHz, A = +1 AV = 1, VIN = 5 mV p-p AV = 10, VIN = 10V p-p; 0.1% VIN = 5 V rms, RL = 2 k, f = 1 kHz 14.6 -14.95 VSY = 2 V to 18 V -40C TA +125C IO = 0 mA -40C TA +125C ISY 14.9 120 0.625 0.750 1.050 V V V V V V V V mA dB dB mA mA 4.6 15.9 9.9 86 13.9 4 0.003 V/s MHz MHz Degrees MHz s % 0.1 3.9 0.55 V p-p nV/Hz pA/Hz ADA4084-2/ADA4084-4 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 5. THERMAL RESISTANCE Parameter Supply Voltage Input Voltage Differential Input Voltage1 Output Short-Circuit Duration to GND Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering 60 sec) ESD Human Body Model2 Machine Model3 Field-Induced Charged-Device Model (FICDM)4 Rating 18 V V- VIN V+ 0.6 V Indefinite -65C to +150C -40C to +125C -65C to +150C 300C JA is specified for the device soldered on a 4-layer JEDEC standard printed circuit board (PCB) with zero airflow. Table 6. Thermal Resistance Package Type 8-Lead SOIC-N (R-8) 8-Lead MSOP (RM-8) 8-Lead LFCSP1, 3 (CP-8-12) 14-Lead TSSOP (RU-14) 16-Lead LFCSP (CP-16-26)2, 3 4.5 kV 1.25 kV 200 V JA 121 142 84 112 55 JC 43 45 40 43 30 1 Values are based on 4-layer (2S2P) JEDEC standard PCB, with four thermal vias. Exposed pad soldered to PCB. Values are based on 4-layer (2S2P) JEDEC standard PCB, with nine thermal vias. Exposed pad soldered to PCB. 3 JC measured on top of package. 2 1 For input differential voltages greater than 0.6 V, limit the input current to less than 5 mA to prevent degradation or destruction of the input devices. 2 Applicable standard: MIL-STD-883, Method 3015.7. 3 Applicable standard: JESD22-A115-A (ESD machine model standard of JEDEC). 4 Applicable standard: JESD22-C101-C (ESD FICDM standard of JEDEC). ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. VCC R4 R3 R6 Q24 D2 Q1 Q23 D1 Q2 MIRROR D100 Q4 D101 FOLDED CASCADE Q3 VOUT R7 C2 Q13 D5 VBIAS D4 R5 Q18 C1 R2 Q21 Figure 4. Simplified Schematic Rev. D | Page 6 of 28 D20 VEE 08237-002 Q19 R1 Unit C/W C/W C/W C/W C/W Data Sheet ADA4084-2/ADA4084-4 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25C, unless otherwise noted. 1.5 V CHARACTERISTICS 50 80 60 40 40 30 20 VSY = 1.5V TA = 25C RL = -40C TA +125C 10 20 -75 -50 -25 0 50 25 75 100 VOS (V) 0 08237-003 0 -100 0 45 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Figure 8. TCVOS Distribution, SOIC, MSOP, and TSSOP 30 VSY = 1.5V TA = 25C RL = VSY = 1.5V TA = 25C RL = -40C TA +125C 25 NUMBER OF AMPLIFIERS 40 NUMBER OF AMPLIFIERS 0.4 TCVOS (V/C) Figure 5. Input Offset Voltage Distribution, SOIC 50 0.2 08237-005 NUMBER OF AMPLIFIERS 100 60 VSY = 1.5V TA = 25C RL = NUMBER OF AMPLIFIERS 120 35 30 25 20 15 20 15 10 10 5 -50 -25 0 25 50 75 100 VOS (V) 0 0 0.4 0.6 0.8 1.0 1.2 1.4 2.0 500 VSY = 1.5V TA = 25C RL = INPUT OFFSET VOLTAGE (V) 400 150 100 50 300 200 100 0 -100 -200 -300 VSY = 1.5V TA = 25C RL = -100 -50 0 50 100 VOS (V) 08237-081 -400 -150 1.8 Figure 9. TCVOS Distribution, LFCSP 200 0 -200 1.6 TCVOS (V/C) Figure 6. Input Offset Voltage Distribution, MSOP and TSSOP NUMBER OF AMPLIFIERS 0.2 Figure 7. Input Offset Voltage Distribution, ADA4084-2 LFCSP -500 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 2.75 3.00 COMMON-MODE VOLTAGE (V) Figure 10. Input Offset Voltage vs. Common-Mode Voltage Rev. D | Page 7 of 28 08237-006 -75 08237-004 0 -100 08237-082 5 ADA4084-2/ADA4084-4 Data Sheet 100 VSY = 1.5V TA = 25C VSY = 1.5V 1000 50 25 100 VDO (mV) INPUT OFFSET VOLTAGE (V) 75 0 -25 (V+) - VOH 10 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C) 1 0.001 08237-108 -100 -50 0.01 0.1 1 08237-009 -75 10 SOURCE CURRENT (mA) Figure 14. Dropout Voltage vs. Source Current Figure 11. Input Offset Voltage vs. Temperature -50 VSY = 1.5V TA = 25C 1000 IB+ 10 VOL - (V-) -200 VSY = 1.5V VCM = 0V RL = -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) 1 0.001 0.1 1 Figure 15. Dropout Voltage vs. Sink Current 120 VSY = 1.5V VSY = 1.5V TA = 25C RL = 10k 100 400 270 225 80 180 60 135 40 90 20 45 0 0 GAIN (dB) 200 TA = +125C 0 TA = +85C -200 TA = +25C -400 TA = -40C -45 -20 -600 -1.5 -1.0 -0.5 0 0.5 1.0 VCM (V) 1.5 08237-008 INPUT BIAS (nA) 10 SINK CURRENT (mA) Figure 12. Input Bias Current vs. Temperature 600 0.01 Figure 13. Input Bias Current vs. VCM and Temperature -40 0.1 1 10 100 1k 10k -90 100k FREQUENCY (kHz) Figure 16. Open-Loop Gain and Phase vs. Frequency Rev. D | Page 8 of 28 PHASE (Degrees) -25 08237-007 -250 -40 08237-010 IB- 08237-011 -150 100 VDO (mV) INPUT BIAS (nA) -100 Data Sheet ADA4084-2/ADA4084-4 60 120 VSY = 1.5V TA = 25C 50 100 AV = +100 40 VSY = 1.5V TA = 25C 110 90 CMRR (dB) GAIN (dB) 30 AV = +10 20 10 70 60 50 AV = +1 0 80 40 -10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) 20 10 08237-012 -20 10 100 10k 100k 1M 10M 100M FREQUENCY (Hz) Figure 17. Closed-Loop Gain vs. Frequency 1000 1k 08237-015 30 Figure 20. CMRR vs. Frequency 1.5 VSY = 1.5V TA = 25C AV = +10 100 1.0 AV = +100 VOLTAGE (V) ZOUT () 0.5 10 AV = +1 1 0 -0.5 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) -1.5 08237-013 0 10 12 14 16 18 16 18 60 VOLTAGE (mV) 40 80 60 PSRR- 40 20 20 0 -20 -40 PSRR+ 0 VSY = 1.5V TA = 25C RL = 2k CL = 100pF -60 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M 08237-014 PSRR (dB) 8 80 100 -20 10 6 Figure 21. Large Signal Transient Response VSY = 1.5V TA = 25C 120 4 TIME (s) Figure 18. Output Impedance vs. Frequency 140 2 Figure 19. PSRR vs. Frequency -80 0 2 4 6 8 10 12 14 TIME (s) Figure 22. Small Signal Transient Response Rev. D | Page 9 of 28 08237-017 0.01 10 VSY = 1.5V TA = 25C RL = 2k CL = 100pF -1.0 08237-016 0.10 ADA4084-2/ADA4084-4 Data Sheet 2 0.08 60 INPUT 0 80 0.06 0.02 -4 OUTPUT -6 0 -8 -0.02 VOLTAGE (V) VOLTAGE (V) VOLTAGE NOISE (nV) 40 0.04 -2 20 0 -20 -40 -60 -0.04 1 3 2 4 5 6 7 8 9 TIME (s) 0 1 -20 CHANNEL SEPARATION (dB) VOLTAGE NOISE DENSITY (nV/Hz) 0 4 1k 10k FREQUENCY (Hz) 7 8 9 100k VCC - - + 10V p-p VEE 2k 2k -60 10 1k + VEE CH B, CH C, CH D -80 -100 -120 -140 -160 100 1k 10k 100k FREQUENCY (Hz) Figure 24. Voltage Noise Density Figure 27. Channel Separation 1 VSY = 1.5V VIN = 100mV p-p RL = 2k TA = 25C 50 6 VCC CH A 08237-019 1 60 5 10k VSY = 1.5V TA = 25C VIN = 1V p-p -40 VSY = 1.5V TA = 25C 100 4 Figure 26. Voltage Noise, 0.1 Hz to 10 Hz 10 10 3 TIME (Seconds) Figure 23. Settling Time 1 2 08237-022 0 VSY = 1.5V TA = 25C -80 08237-018 -10 -1 08237-021 VSY = 1.5V TA = 25C VSY = 1.5V TA = 25C RL = 10k VIN AT 1kHz OS+ THD + N (%) 30 20 0.01 OS- 0.001 0 1 10 100 1000 CAPACITANCE (pF) 0.0001 0.001 0.01 0.1 AMPLITUDE (VRMS) Figure 28. THD + N vs. Amplitude Figure 25. Overshoot vs. Load Capacitance Rev. D | Page 10 of 28 1 08237-125 10 08237-020 OVERSHOOT (%) 0.1 40 Data Sheet 0.01 ADA4084-2/ADA4084-4 VSY = 1.5 V VSY = 1.5V TA = 25C VIN = 300mVRMS 500kHz FILTER VIN 1 RL = 2k THD + N (%) CH1 AMPL 200mV RL = 10k VOUT 0.1 1 10 100 FREQUENCY (kHz) CH1 100mV CH2 500mV -84mV VSY = 1.5 V VSY = 1.5V TA = 25C 1.5 A CH1 Figure 31. Positive Overload Recovery Figure 29. THD + N vs. Frequency 2.0 M2s T 10.2% 1.0 CH1 AMPL 200mV VIN 1 0.5 OUTPUT 2 0 -0.5 INPUT -1.0 VOUT -2.0 0 100 200 300 400 500 600 700 TIME (s) 800 900 1000 Figure 30. No Phase Reversal CH1 100mV CH2 500mV M2s T 10.4% A CH1 Figure 32. Negative Overload Recovery Rev. D | Page 11 of 28 44mV 08237-129 -1.5 08237-025 VOLTAGE (V) 08237-128 0.001 0.01 08237-126 2 ADA4084-2/ADA4084-4 Data Sheet 5 V CHARACTERISTICS NUMBER OF AMPLIFIERS 100 50 VSY = 5V TA = 25C RL = VSY = 5V RL = -40C TA +125C 45 40 NUMBER OF AMPLIFIERS 120 80 60 40 35 30 25 20 15 10 20 -50 -25 0 25 50 75 100 VOS (V) 08237-026 -75 0 0 0.8 1.0 1.2 35 VSY = 5V TA = 25C RL = 1.4 1.6 1.8 2.0 VSY = 5V RL = -40C TA +125C 30 40 30 20 10 25 20 15 10 -50 -25 0 25 50 75 100 VOS (V) 0 08237-027 -75 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 TCVOS (V/C) Figure 34. Input Offset Voltage Distribution, MSOP 08237-084 5 0 -100 Figure 37. TCVOS Distribution, ADA4084-2 LFCSP 250 600 VSY = 5V TA = 25C RL = VSY = 5V TA = 25C RL = 500 400 INPUT OFFSET VOLTAGE (V) 200 150 100 50 300 200 100 0 -100 -200 -300 -400 -150 -100 -50 0 50 100 VOS (V) Figure 35. Input Offset Voltage Distribution, ADA4084-2 LFCSP -600 -5 -4 -3 -2 -1 0 1 2 3 4 COMMON-MODE VOLTAGE (V) Figure 38. Input Offset Voltage vs. Common-Mode Voltage Rev. D | Page 12 of 28 5 08237-029 -500 0 -200 08237-080 NUMBER OF AMPLIFIERS 0.6 Figure 36. TCVOS Distribution, SOIC and MSOP NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS 50 0.4 TCVOS (V/C) Figure 33. Input Offset Voltage Distribution, SOIC 60 0.2 08237-028 5 0 -100 Data Sheet 100 ADA4084-2/ADA4084-4 VSY = 5V 1000 VSY = 5V TA = 25C 50 25 100 VDO (mV) INPUT OFFSET VOLTAGE (V) 75 0 -25 (V+) - VOH 10 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C) 1 0.001 08237-133 -100 -50 0.1 1 10 SOURCE CURRENT (mA) Figure 42. Dropout Voltage vs. Source Current Figure 39. Input Offset Voltage vs. Temperature -50 0.01 08237-032 -75 VSY = 5V VCM = 0V RL = 1000 VSY = 5V TA = 25C 100 VDO (mV) INPUT BIAS (nA) -100 IB+ -150 IB- VOL - (V-) 10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) 1 0.001 0.1 1 Figure 43. Dropout Voltage vs. Sink Current 120 800 10 SINK CURRENT (mA) Figure 40. Input Bias Current vs. Temperature VSY = 5V TA = 25C RL = 10k VSY = 5V 270 225 600 100 400 80 180 60 135 40 90 20 45 0 0 TA = +85C TA = +125C GAIN (dB) 200 0 -200 TA = +25C -400 TA = -40C -45 -20 -600 -800 -5 -4 -3 -2 -1 0 1 2 3 4 VCM (V) 5 08237-031 INPUT BIAS (nA) 0.01 -40 0.1 Figure 41. Input Bias Current vs. VCM and Temperature 1 10 100 1k 10k -90 100k FREQUENCY (kHz) Figure 44. Open-Loop Gain and Phase vs. Frequency Rev. D | Page 13 of 28 PHASE (Degrees) -10 08237-034 -25 08237-030 -250 -40 08237-033 -200 ADA4084-2/ADA4084-4 Data Sheet 60 120 VSY = 5V TA = 25C 50 100 AV = +100 40 VSY = 5V TA = 25C 110 90 CMRR (dB) GAIN (dB) 30 AV = +10 20 10 70 60 50 AV = +1 0 80 40 -10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) 20 10 08237-035 -20 10 100 10k 100k 1M 100M 10M FREQUENCY (Hz) Figure 45. Closed-Loop Gain vs. Frequency 1000 1k 08237-038 30 Figure 48. CMRR vs. Frequency 5 VSY = 5V TA = 25C 4 100 3 AV = +10 VOLTAGE (V) ZOUT () 2 10 AV = +1 AV = +100 1 1 0 -1 -2 -3 VSY = 5V TA = 25C RL = 2k CL = 100pF -4 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) -5 08237-036 0 10 12 14 16 18 9 10 60 40 VOLTAGE (mV) 80 60 PSRR- 40 20 20 0 -20 -40 PSRR+ VSY = 5V TA = 25C RL = 2k CL = 100pF -60 0 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M 08237-037 PSRR (dB) 8 80 100 -20 10 6 Figure 49. Large Signal Transient Response VSY = 5V TA = 25C 120 4 TIME (s) Figure 46. Output Impedance vs. Frequency 140 2 -80 0 1 2 3 4 5 6 7 8 TIME (s) Figure 50. Small Signal Transient Response Figure 47. PSRR vs. Frequency Rev. D | Page 14 of 28 08237-040 0.01 10 08237-039 0.10 Data Sheet ADA4084-2/ADA4084-4 VSY = 5V TA = 25C 5 0.16 80 0.12 60 0.04 OUTPUT VOLTAGE NOISE (nV) -5 40 VOLTAGE (V) 0.08 20 0 -10 0 -15 -0.04 -20 -0.08 -60 -0.12 -80 4 2 6 8 10 12 14 16 -40 18 TIME (s) 0 1 0 CHANNEL SEPARATION (dB) 4 1 1k 10k FREQUENCY (Hz) 7 100k VCC 9 10V p-p - + + VEE 2k 2k 10 1k VEE CH B, CH C, CH D -80 -100 -120 -140 -160 100 1k 10k 100k FREQUENCY (Hz) Figure 55. Channel Separation 1 VSY = 5V VIN = 100mV p-p RL = 2k TA = 25C 8 VCC -60 Figure 52. Voltage Noise Density 50 6 - CH A VSY = 5V TA = 25C 60 5 10k VSY = 5V TA = 25C VIN = 5V p-p -40 08237-042 VOLTAGE NOISE DENSITY (nV/Hz) -20 100 4 Figure 54. Voltage Noise, 0.1 Hz to 10 Hz 10 10 3 TIME (Seconds) Figure 51. Settling Time 1 2 08237-045 0 -20 08237-041 -25 -2 VSY = 5V TA = 25C RL = 10k VIN AT 1kHz OS+ 0.1 THD + N (%) 40 30 20 0.01 OS- 0.001 0 1 10 100 1000 CAPACITANCE (pF) 0.0001 0.001 0.01 0.1 AMPLITUDE (VRMS) Figure 56. THD + N vs. Amplitude Figure 53. Overshoot vs. Load Capacitance Rev. D | Page 15 of 28 1 08237-150 10 08237-043 OVERSHOOT (%) VOLTAGE (V) INPUT 0 VSY = 5V TA = 25C 08237-044 10 ADA4084-2/ADA4084-4 1 Data Sheet VSY = 5V VSY = 5V TA = 25C VIN = 2VRMS 500kHz FILTER VIN 1 THD + N (%) 0.1 CH1 AMPL 202mV RL = 2k 0.01 RL = 10k 0.001 VOUT 1 0.1 10 100 FREQUENCY (kHz) CH1 100mV CH2 2V M1s T 10.2% A CH1 -84mV 08237-153 0.0001 0.01 08237-151 2 Figure 59. Positive Overload Recovery Figure 57. THD + N vs. Frequency 6 VSY = 5V VSY = 5V TA = 25C 4 1 2 0 OUTPUT -2 INPUT VOUT -6 0 100 200 300 400 500 600 700 TIME (s) 800 900 1000 Figure 58. No Phase Reversal CH1 100mV CH2 2V M2s T 10.4% A CH1 44.0mV Figure 60. Negative Overload Recovery Rev. D | Page 16 of 28 08237-154 -4 08237-048 VOLTAGE (V) CH1 AMPL 200mV VIN 2 Data Sheet ADA4084-2/ADA4084-4 15 V CHARACTERISTICS 100 90 60 VSY = 15V TA = 25C RL = 50 NUMBER OF AMPLIFIERS 80 NUMBER OF AMPLIFIERS VSY = 15V RL = -40C TA +125C 70 60 50 40 30 20 40 30 20 10 -75 -50 -25 0 25 50 75 100 VOS (V) 0 08237-049 0 -100 0 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Figure 64. TCVOS Distribution, SOIC and MSOP VSY = 15V TA = 25C RL = VSY = 15V RL = -40C TA +125C 25 NUMBER OF AMPLIFIERS 50 40 30 20 20 15 10 -75 -50 -25 0 25 50 75 100 VOS (V) 0 08237-050 0 -100 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 TCVOS (V/C) Figure 62. Input Offset Voltage Distribution, MSOP 08237-085 5 10 Figure 65. TCVOS Distribution, ADA4084-2 LFCSP 600 VSY = 15V 500 T = 25C A RL = 400 INPUT OFFSET VOLTAGE (V) VSY = 15V TA = 25C RL = 150 100 50 300 200 100 0 -100 -200 -300 -400 -150 -100 -50 0 50 100 VOS (V) 08237-079 -500 0 -200 -600 -15 -10 -5 0 5 10 COMMON-MODE VOLTAGE (V) Figure 66. Input Offset Voltage vs. Common-Mode Voltage Figure 63. Input Offset Voltage Distribution, ADA4084-2 LFCSP Rev. D | Page 17 of 28 15 08237-052 NUMBER OF AMPLIFIERS 0.6 30 60 NUMBER OF AMPLIFIERS 0.4 TCVOS (V/C) Figure 61. Input Offset Voltage Distribution, SOIC 200 0.2 08237-051 10 ADA4084-2/ADA4084-4 100 Data Sheet VSY = 15V 10000 50 1000 25 VDO (mV) 0 100 -25 (V+) - VOH 10 -50 -75 -25 0 25 50 75 100 125 150 TEMPERATURE (C) 1 0.001 08237-165 -100 -50 VSY = 15V TA = 25C 0.01 0.1 1 08237-055 INPUT OFFSET VOLTAGE (V) 75 10 SOURCE CURRENT (mA) Figure 70. Dropout Voltage vs. Source Current Figure 67. Input Offset Voltage vs. Temperature -50 10000 VSY = 15V TA = 25C IB+ -100 100 -200 VSY = 15V VCM = 0V RL = -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) 1 0.001 0.01 0.1 1 Figure 71. Dropout Voltage vs. Sink Current Figure 68. Input Bias Current vs. Temperature 120 100 270 VSY = 15V TA = 25C RL = 10k 225 80 180 60 135 40 90 20 45 0 0 VSY = 15V TA = +125C GAIN (dB) TA = +85C 0 TA = +25C -400 TA = -40C -800 -45 -20 -1200 -15 -10 -5 0 5 10 VCM (V) 15 08237-054 INPUT BIAS (nA) 800 400 10 SINK CURRENT (mA) -40 100 Figure 69. Input Bias Current vs. VCM and Temperature 1k 10k 100k 1M 10M -90 100M FREQUENCY (Hz) Figure 72. Open-Loop Gain and Phase vs. Frequency Rev. D | Page 18 of 28 PHASE (Degrees) -25 08237-053 -250 -40 1200 VOL - (V-) 10 08237-056 IB- 08237-057 -150 VDO (mV) INPUT BIAS (nA) 1000 Data Sheet 60 50 ADA4084-2/ADA4084-4 120 VSY = 15V TA = 25C 110 AV = +100 100 40 VSY = 15V TA = 25C 90 20 CMRR (dB) GAIN (dB) 30 AV = +10 10 0 80 70 60 50 AV = +1 40 -10 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) 20 10 100 1k 10k 100k 1M 100M 10M FREQUENCY (Hz) Figure 73. Closed-Loop Gain vs. Frequency 08237-061 100 08237-058 -20 10 30 Figure 76. CMRR vs. Frequency 15 1000 10 100 AV = +10 VOLTAGE (V) ZOUT () 5 10 AV = +100 1 0 -5 AV = +1 VSY = 15V TA = 25C RL = 2k CL = 100pF -10 VSY = 15V TA = 25C 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) -15 08237-059 0 20 24 28 32 36 60 40 VOLTAGE (mV) 80 60 PSRR- 40 20 PSRR+ 20 0 -20 -40 0 VSY = 15V TA = 25C RL = 2k CL = 100pF -60 100 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M 08237-060 PSRR (dB) 16 80 100 -20 10 12 Figure 77. Large Signal Transient Response VSY = 15V TA = 25C 120 8 TIME (s) Figure 74. Output Impedance vs. Frequency 140 4 Figure 75. PSRR vs. Frequency -80 0 1 2 3 4 5 6 7 8 TIME (s) Figure 78. Small Signal Transient Response Rev. D | Page 19 of 28 9 10 08237-063 0.01 10 08237-062 0.1 ADA4084-2/ADA4084-4 Data Sheet 10 0.20 60 0.15 5 40 -5 0.05 OUTPUT -10 0 -15 -0.05 -20 VOLTAGE NOISE (nV) 0.10 VOLTAGE (V) 0 20 0 -20 -40 -0.10 6 8 10 12 14 16 -0.15 18 -60 TIME (s) 0 2 Figure 79. Settling Time 0 CHANNEL SEPARATION (dB) 4 1k 10k FREQUENCY (Hz) 100k VCC -40 VCC - - + + VEE 10V p-p CH A -60 2k 2k VEE CH B, CH C, CH D -100 -120 -140 1k 10k 100k FREQUENCY (Hz) Figure 83. Channel Separation 1 VSY = 15V VIN = 100mV p-p RL = 2k TA = 25C 1k -80 Figure 80. Voltage Noise Density 60 10k VSY = 15V TA = 25C VIN = 10V p-p -180 100 08237-065 1 70 10 -160 VSY = 15V TA = 25C 100 8 VSY = 15V RL = 10k VIN AT 1kHz OS+ 0.1 THD + N (%) 50 40 30 20 OS- 0.01 0.001 0 1 10 100 1000 CAPACITANCE (pF) 08237-066 10 0.0001 0.001 0.01 0.1 1 AMPLITUDE (VRMS) Figure 84. THD + N vs. Amplitude Figure 81. Overshoot vs. Load Capacitance Rev. D | Page 20 of 28 10 08237-175 VOLTAGE NOISE DENSITY (nV/Hz) -20 10 6 Figure 82. Voltage Noise 0.1 Hz to 10 Hz 10 1 4 TIME (Seconds) 08237-068 4 2 08237-064 0 08237-067 VSY = 15V TA = 25C VSY = 15V TA = 25C -25 -2 OVERSHOOT (%) VOLTAGE (V) INPUT Data Sheet 1 ADA4084-2/ADA4084-4 VSY = 15V TA = 25C VIN = 5VRMS 500kHz FILTER VIN 1 THD + N (%) 0.1 CH1 AMPL 202mV VOUT RL = 2k 0.01 RL = 10k 0.001 2 10 100 FREQUENCY (kHz) CH1 100mV CH2 5V Figure 85. THD + N vs. Frequency 20 M1s T 10.2% -84mV Figure 87. Positive Overload Recovery VSY = 15V TA = 25C 15 A CH1 VSY = 15V 10 1 5 CH1 AMPL 200mV VIN 2 0 OUTPUT -5 INPUT -10 VOUT -20 0 100 200 300 400 500 600 700 TIME (s) 800 900 1000 CH1 100mV CH2 5V M2s T 10.4% A CH1 44mV Figure 88. Negative Overload Recovery Figure 86. No Phase Reversal Rev. D | Page 21 of 28 08237-179 -15 08237-071 VOLTAGE (V) 08237-178 1 0.1 08237-176 VSY = 15V 0.0001 0.01 ADA4084-2/ADA4084-4 Data Sheet 1000 150 900 140 +125C 130 +85C 700 PSRR (dB) +25C -40C 500 400 110 90 300 80 200 70 60 TA = 25C RL = 0 0 4 8 12 16 20 24 28 32 36 VSY (V) 140 VCM = 14V 120 VCM = 4V 80 VCM = 1.5V 60 40 -25 0 25 50 75 100 TEMPERATURE (C) 125 150 08237-180 20 0 -50 50 -50 -25 0 25 50 75 100 TEMPERATURE (C) Figure 91. PSRR vs. Temperature Figure 89. Supply Current vs. Supply Voltage 100 VSY = 1.25V TO 1.75V VCM = 0 100 Figure 90. CMRR vs. Temperature Rev. D | Page 22 of 28 125 150 08237-181 600 100 CMRR (dB) VSY = 2V TO 18V VCM = 0 120 08237-072 ISY/AMPLIFIER (A) 800 Data Sheet ADA4084-2/ADA4084-4 APPLICATIONS INFORMATION FUNCTIONAL DESCRIPTION The ADA4084-2/ADA4084-4 devices are precision single-supply, rail-to-rail operational amplifiers. Intended for portable instrumentation, the ADA4084-2/ADA4084-4 devices combine the attributes of precision, wide bandwidth, and low noise, making them an ideal choice in single-supply applications that require both ac and precision dc performance. Other low supply voltage applications for which the ADA4084-2/ADA4084-4 devices are well suited are active filters, audio microphone preamplifiers, power supply control, and telecommunications. To combine all of these attributes with rail-to-rail input/output operation, novel circuit design techniques are used. R4 R3 therefore, important that the effective source impedances that are connected to the ADA4084-2/ADA4084-4 inputs be balanced for optimum dc and ac performance. To achieve rail-to-rail output, the ADA4084-2/ADA4084-4 output stage design employs a unique topology for both sourcing and sinking current. This circuit topology is shown in Figure 93. The output stage is voltage-driven from the second gain stage. The signal path through the output stage is inverting; that is, for positive input signals, Q13 provides the base current drive to Q19 so that it conducts (sinks) current. For negative input signals, the signal path via Q18 mirror Q24 provides the base current drive for Q23 to conduct (source) current. Both transistors provide output current until they are forced into saturation. VCC R6 D2 Q1 D1 Q2 Q24 Q23 D100 Q4 D101 Q3 MIRROR VOUT D5 D4 R7 C2 Q13 R1 R2 08237-073 VBIAS R5 Q18 C1 Q19 For example, Figure 92 illustrates a simplified equivalent circuit for the input stage of the ADA4084-2/ADA4084-4. It comprises a PNP differential pair, Q1 and Q2, and an NPN differential pair, Q3 and Q4, operating concurrently. Diode D100 and Diode D101 serve to clamp the applied differential input voltage to the ADA4084-2/ADA4084-4, thereby protecting the input transistors against Zener breakdown of the emitter-base junctions. Input stage voltage gains are kept low for input rail-to-rail operation. The two pairs of differential output voltages are connected to the second stage of the ADA4084-2/ADA4084-4, which is a modified compound folded cascade gain stage. It is also in the second gain stage that the two pairs of differential output voltages are combined into a single-ended output signal voltage used to drive the output stage. Q21 D20 VEE 08237-074 Figure 92. Equivalent Input Circuit Figure 93. Equivalent Output Circuit Thus, the saturation voltage of the output transistors sets the limit on the ADA4084-2/ADA4084-4 maximum output voltage swing. Output short-circuit current limiting is determined by the maximum signal current into the base of Q13 from the second gain stage. The output stage also exhibits voltage gain. This is accomplished by the use of common-emitter amplifiers, and, as a result, the voltage gain of the output stage (thus, the openloop gain of the device) exhibits a dependence on the total load resistance at the output of the ADA4084-2/ADA4084-4. A key issue in the input stage is the behavior of the input bias currents over the input common-mode voltage range. Input bias currents in the ADA4084-2/ADA4084-4 are the arithmetic sum of the base currents in Q1 and Q4 and in Q2 and Q3. As a result of this design approach, the input bias currents in the ADA4084-2/ ADA4084-4 not only exhibit different amplitudes; they also exhibit different polarities. This effect is best illustrated by Figure 12, Figure 13, Figure 40, Figure 41, Figure 68, and Figure 69. It is, Rev. D | Page 23 of 28 ADA4084-2/ADA4084-4 Data Sheet START-UP CHARACTERISTICS R2 INPUT PROTECTION As with any semiconductor device, if conditions exist where the applied input voltages to the device exceed either supply voltage, the input overvoltage I-to-V characteristic of the device must be considered. When an overvoltage occurs, the amplifier may be damaged, depending on the magnitude of the applied voltage and the magnitude of the fault current. The D1, D2, D4, and D5 diodes conduct when the input commonmode voltage exceeds either supply pin by a diode drop. This diode drop voltage varies with temperature and is in the range of 0.3 V to 0.8 V. As shown in the simplified equivalent input circuit of Figure 92, the ADA4084-2/ADA4084-4 do not have any internal current limiting resistors; thus, fault currents can quickly rise to damaging levels. This input current is not inherently damaging to the device, provided that it is limited to 5 mA or less. If a fault condition causes more than 5 mA to flow, add an external series resistor at the expense of additional thermal noise. Figure 94 shows a typical noninverting configuration for an overvoltage protected amplifier, where the series resistance, RS, is chosen, such that RS = VIN ( MAX ) - VSUPPLY 5 mA For example, a 1 k resistor protects the ADA4084-2/ADA4084-4 against input signals up to 5 V above and below the supplies. Note that the thermal noise of a 1 k resistor at room temperature is 4 nV/Hz, which exceeds the voltage noise of the ADA4084-2/ADA4084-4. For other configurations in which both inputs are used, protect each input against abuse with a series resistor. To ensure optimum dc and ac performance, balance the source impedance levels. 1/2 ADA4084-2/ ADA4084-4 VIN VOUT R1 08237-075 The ADA4084-2/ADA4084-4 are specified to operate from 3 V to 30 V (1.5 V to 15 V) under nominal power supplies. During power-up as the supply voltage increases from 0 V to the nominal power supply voltage, the supply current (ISY) increases as well, to the point at which it stabilizes and the amplifier is ready to operate. The stabilization varies with temperature, as shown in Figure 89. For example, at -40C, it requires a higher voltage and stabilizes at a lower supply current than at hot temperatures. At hot temperatures, it requires a lower voltage but stabilizes at a higher current. In all cases, the ADA4084-2/ADA4084-4 are specified to start up and operate at a minimum of 3 V under all temperature conditions. Figure 94. Resistance in Series with Input Limits Overvoltage Currents to Safe Values To protect the Q1/Q2 and Q3/Q4 pairs from large differential voltages that may result in Zener breakdown of the emitter-base junction, D100 and D101 are connected between the two inputs. This precludes operation as a comparator. For a more complete description, see the MT-035 Tutorial, Op Amp Inputs, Outputs, Single-Supply, and Rail-to-Rail Issues; the MT-083 Tutorial, Comparators; the MT-084 Tutorial, Using Op Amps As Comparators; and the AN-849 Application Note, Using Op Amps as Comparators, at www.analog.com. OUTPUT PHASE REVERSAL Some operational amplifiers designed for single-supply operation exhibit an output voltage phase reversal when their inputs are driven beyond their useful common-mode range. Typically, for single-supply bipolar op amps, the negative supply determines the lower limit of their common-mode range. With these devices, external clamping diodes, with the anode connected to ground and the cathode to the inputs, prevent input signal excursions from exceeding the negative supply of the device (that is, GND), preventing a condition that causes the output voltage to change phase. JFET input amplifiers can also exhibit phase reversal, and, if so, a series input resistor is usually required to prevent it. The ADA4084-2/ADA4084-4 are free from reasonable input voltage range restrictions, provided that input voltages no greater than the supply voltages are applied (see Figure 30, Figure 58, and Figure 86). Although device output does not change phase, large currents can flow through the input protection diodes. Therefore, apply the technique recommended in the Input Protection section to those applications where the likelihood of input voltages exceeding the supply voltages is high. Rev. D | Page 24 of 28 Data Sheet ADA4084-2/ADA4084-4 DESIGNING LOW NOISE CIRCUITS IN SINGLESUPPLY APPLICATIONS In single-supply applications, devices like the ADA4084-2/ ADA4084-4 extend the dynamic range of the application through the use of rail-to-rail operation. Referring to the op amp noise model circuit configuration illustrated in Figure 95, the expression for the total equivalent input noise voltage of an amplifier for a source resistance level, RS, is given by R S ) 2 ] + (e nOA ) 2 , units in V Hz where: RS = 2R, the effective, or equivalent, circuit source resistance. (enR)2 is the source resistance thermal noise voltage power (4kTR). k is the Boltzmann's constant, 1.38 x 10-23 J/K. T is the ambient temperature in Kelvin of the circuit, 273.15 + TA (C). (inOA)2 is the op amp equivalent input noise current spectral power (1 Hz bandwidth). (enOA)2 is the op amp equivalent input noise voltage spectral power (1 Hz bandwidth). NOISELESS R inOA enR NOISELESS inOA IDEAL NOISELESS OP AMP RS = 2R 08237-076 R enOA enR Figure 95. Op Amp Noise Circuit Model Used to Determine Total Circuit Equivalent Input Noise Voltage and Noise Figure As a design aid, Figure 96 shows the equivalent thermal noise of the ADA4084-2/ADA4084-4 vs. the total source resistance. Note that for source resistance less than 1 k, the equivalent input noise voltage of the ADA4084-2/ADA4084-4 is dominant. FREQUENCY = 1kHz TA = 25C Signal levels in the application invariably increase to maximize circuit SNR, which is not an option in low voltage, single-supply applications. Therefore, to achieve optimum circuit SNR in single-supply applications, choose an operational amplifier with the lowest equivalent input noise voltage, along with source resistance levels that are consistent with maintaining low total circuit noise. COMPARATOR OPERATION Although op amps are quite different from comparators, occasionally an unused section of a dual or a quad op amp can be used as a comparator; however, this is not recommended for any rail-to-rail output op amps. For rail-to-rail output op amps, the output stage is generally a ratioed current mirror with bipolar or MOSFET transistors. With the device operating open loop, the second stage increases the current drive to the ratioed mirror to close the loop. However, the loop cannot close, which results in an increase in supply current. With the op amp configured as a comparator, the supply current can be significantly higher (see Figure 97). Configure an unused section as a voltage follower with the noninverting input connected to a voltage within the input voltage range. The ADA4084-2/ADA4084-4 have unique second stage and output stage designs that greatly reduce the excess supply current when the op amp is operating open loop. 800 COMPARATOR OUTPUT LOW SUPPLY CURRENT (A) 700 ADA4084-2/ADA4084-4 TOTAL EQUIVALENT NOISE 10 RESISTOR THERMAL NOISE ONLY 1 100 08237-077 EQUIVALENT THERMAL NOISE (nV/ Hz) 100 Noise figure is generally used for RF and microwave circuit analysis in a 50 system. This is not very useful for op amp circuits where the input and output impedances can vary greatly. For a more complete description of noise figure, see the MT-052 Tutorial, Op Amp Noise Figure: Don't be Mislead, available at www.analog.com. 1k 10k 600 BUFFER COMPARATOR OUTPUT HIGH 500 400 300 200 100 TA = 25C RL = 100k 0 TOTAL SOURCE RESISTANCE, RS () 0 Figure 96. Equivalent Thermal Noise vs. Total Source Resistance 4 8 12 16 20 24 28 VSY (V) Figure 97. Supply Current vs. Supply Voltage Rev. D | Page 25 of 28 32 36 08237-078 e nT = 2 [(e nR ) 2 + (inOA x Because circuit SNR is the critical parameter in the final analysis, the noise behavior of a circuit is sometimes expressed in terms of its noise figure, NF. The noise figure is defined as the ratio of the signal-to-noise output of a circuit to its signal-to-noise input. Data Sheet ADA4084-2/ADA4084-4 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 3.20 3.00 2.80 5.15 4.90 4.65 5 1 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 0.85 0.75 15 MAX 1.10 MAX 6 0 0.40 0.25 0.80 0.55 0.40 0.23 0.09 10-07-2009-B 0.15 0.05 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 98. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 5.00 (0.1968) 4.80 (0.1890) 1 5 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE 6.20 (0.2441) 5.80 (0.2284) 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 99. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) Rev. D | Page 26 of 28 012407-A 8 4.00 (0.1574) 3.80 (0.1497) Data Sheet ADA4084-2/ADA4084-4 3.10 3.00 SQ 2.90 0.50 BSC 8 5 1.70 1.60 SQ 1.50 EXPOSED PAD 0.50 0.40 0.30 BOTTOM VIEW 0.80 0.75 0.70 SEATING PLANE 1 4 TOP VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.203 REF 0.30 0.25 0.20 0.20 MIN PIN 1 INDICATOR (R 0.15) FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. 02-05-2013-B PIN 1 INDEX AREA COMPLIANT TO JEDEC STANDARDS MO-229-WEED Figure 100. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD] 3 mm x 3 mm Body, Very Very Thin, Dual Lead (CP-8-12) Dimensions shown in millimeters 5.10 5.00 4.90 14 8 4.50 4.40 4.30 6.40 BSC 1 7 PIN 1 0.65 BSC 1.20 MAX 0.15 0.05 COPLANARITY 0.10 0.30 0.19 0.20 0.09 SEATING PLANE 8 0 COMPLIANT TO JEDEC STANDARDS MO-153-AB-1 Figure 101. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters Rev. D | Page 27 of 28 0.75 0.60 0.45 061908-A 1.05 1.00 0.80 ADA4084-2/ADA4084-4 Data Sheet PIN 1 INDICATOR 0.35 0.30 0.25 0.65 BSC PIN 1 INDICATOR 16 13 1 12 EXPOSED PAD 2.60 2.50 SQ 2.40 9 TOP VIEW 0.80 0.75 0.70 0.50 0.40 0.30 4 8 BOTTOM VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF SEATING PLANE 5 FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-WGGC. 042709-A 4.10 4.00 SQ 3.90 Figure 102. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 4 mm x 4 mm Body, Very Very Thin Quad (CP-16-26) Dimensions shown in millimeters ORDERING GUIDE Model 1 ADA4084-2ARMZ ADA4084-2ARMZ-R7 ADA4084-2ARMZ-RL ADA4084-2ARZ ADA4084-2ARZ-R7 ADA4084-2ARZ-RL ADA4084-2ACPZ-R7 ADA4084-2ACPZ-RL ADA4084-4ACPZ-R7 ADA4084-4ACPZ-RL ADA4084-4RUZ ADA4084-4RUZ-RL 1 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Lead Frame Chip Scale Package [LFCSP_WD] 8-Lead Lead Frame Chip Scale Package [LFCSP_WD] 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 14-Lead Thin Shrink Small Outline Package [TSSOP] 14-Lead Thin Shrink Small Outline Package [TSSOP] Z = RoHS Compliant Part. (c)2011-2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08237-0-11/13(D) Rev. D | Page 28 of 28 Package Option RM-8 RM-8 RM-8 R-8 R-8 R-8 CP-8-12 CP-8-12 CP-16-26 CP-16-26 RU-14 RU-14 Branding A2Q A2Q A2Q A2Q A2Q Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Analog Devices Inc.: ADA4084-2ARMZ ADA4084-2ARMZ-R7 ADA4084-2ARZ ADA4084-2ARZ-R7 ADA4084-2ACPZ-R7 ADA40842ACPZ-RL ADA4084-2ARMZ-RL ADA4084-2ARZ-RL ADA4084-4ARUZ ADA4084-4ARUZ-RL ADA4084-4ACPZ-RL ADA4084-4ACPZ-R7