DRB PACKAGE
TLC7701, TLC7725, TLC7703
TLC7733, TLC7705
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SLVS087M DECEMBER 1994REVISED MARCH 2012
Micropower Supply Voltage Supervisors
Check for Samples: TLC7701, TLC7725, TLC7703 ,TLC7733, TLC7705
1FEATURES
Power-On Reset Generator
Automatic Reset Generation After Voltage
Drop
Precision Voltage Sensor
Temperature-Compensated Voltage Reference
Programmable Delay Time by External
Capacitor
Supply Voltage Range . . . 2 V to 6 V
Defined RESET Output from VDD 1 V
Power-Down Control Support for Static RAM
With Battery Backup
Maximum Supply Current of 16 µA
Power Saving Totem-Pole Outputs
Temperature Range . . . Up to –55°C to 125°C
APPLICATIONS
Medical Imaging
DESCRIPTION
The TLC77xx family of micropower supply voltage
supervisors provide reset control, primarily in
microcomputer and microprocessor systems.
During power-on, RESET is asserted when VDD
reaches 1 V. After minimum VDD (2 V) is
established, the circuit monitors SENSE voltage and
keeps the reset outputs active as long as SENSE
voltage (VI(SENSE)) remains below the threshold
voltage. An internal timer delays return of the output
to the inactive state to ensure proper system reset.
The delay time, td, is determined by an external
capacitor:
td= 2.1 × 104× CT
Where
CTis in farads
tdis in seconds
SPACER
Except for the TLC7701, which can be customized with two external resistors, each supervisor has a fixed sense
threshold voltage set by an internal voltage divider. When SENSE voltage drops below the threshold voltage, the
outputs become active and stay in that state until SENSE voltage returns above threshold voltage and the delay
time, td, has expired.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright © 1994–2012, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TLC7701, TLC7725, TLC7703
TLC7733, TLC7705
SLVS087M DECEMBER 1994REVISED MARCH 2012
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION (CONTINUED)
In addition to the power-on-reset and undervoltage-supervisor function, the TLC77xx adds power-down control
support for static RAM. When CONTROL is tied to GND, RESET will act as active high. The voltage monitor
contains additional logic intended for control of static memories with battery backup during power failure. By
driving the chip select (CS) of the memory circuit with the RESET output of the TLC77xx and with the CONTROL
driven by the memory bank select signal (CSH1) of the microprocessor (see Figure 10), the memory circuit is
automatically disabled during a power loss. (In this application the TLC77xx power has to be supplied by the
battery.)
The TLC77xxI is characterized for operation over a temperature range of –40°C to 85°C; the TLC77xxQ is
characterized for operation over a temperature range of –40°C to 125°C; and the TLC77xxM is characterized for
operation over the full Military temperature range of –55°C to 125°C.
The 3x3 mm DRB package is also available as a non-magnetic package for medical imaging application.
AVAILABLE OPTIONS
PACKAGED DEVICES
THRESHOLD THIN SHRINK
CHIP CERAMIC CERAMIC SMALL OUTLINE
VOLTAGE
TAPLASTIC DIP
SMALL CARRIER DIP DUAL SMALL OUTLINE NO LEAD
(V) OUTLINE (D)(1) (P) (DRB)
(FK) (JG) FLATPACK (U) (PW)(2)
1.1 TCLC7701ID TCLC7701IP TCLC7701IPWR
2.25 TLC7725ID TLC7725IP TLC7725IPWR
2.63 TLC7703ID TLC7703IP TLC7703IPWR
–40°C to
85°C 2.93 TLC7733ID TLC7733IP TLC7733IPWR
4.55 TLC7705ID TLC7705IP TLC7705IPWR
1.1 TLC7701IDBR TLC7701IDRBT-NM
1.1 TLC7701QD TLC7701QP TLC7701QPWR
2.25 TLC7725QD TLC7725QP TLC7725QPWR
–40°C to 2.63 TLC7703QD TLC7703QP TLC7703QPWR
125°C 2.93 TLC7733QD TLC7733QP TLC7733QPWR
4.55 TLC7705QD TLC7705QP TLC7705QPWR
2.93
–55°C to
125°C 4.55
(1) The D package is available taped and reeled. Add the suffix R to the device type when ordering (e.g., TLC7705QDR).
(2) The PW package is only available left-end taped and reeled (indicated by the R suffix on the device type; e.g., TLC7705QPWR).
Table 1. FUNCTION TABLE
CONT RESIN VI(SENSE)>VIT+ RESE RESET
ROL T
L L False H L
L L True H L
L H False H L
L H True L(1) H(1)
H L False H L
H L True H L
H H False H L
H H True H H(1)
(1) RESET and RESET states shown are valid for t > td.
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TLC7701, TLC7725, TLC7703
TLC7733, TLC7705
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SLVS087M DECEMBER 1994REVISED MARCH 2012
LOGIC SYMBOL
(1) This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
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TLC7701, TLC7725, TLC7703
TLC7733, TLC7705
SLVS087M DECEMBER 1994REVISED MARCH 2012
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FUNCTIONAL BLOCK DIAGRAM
TIMING DIAGRAM
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SLVS087M DECEMBER 1994REVISED MARCH 2012
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted) VALUE UNIT
VDD Supply voltage(2) 7 V
Input voltage range, CONTROL, RESIN, SENSE(2) –0.3 to 7 V
IOL Maximum low output current 10 mA
IOH Maximum high output current, –10 mA
IIK Input clamp current, (VI < 0 or VI > VDD) ±10 mA
IOK Output clamp current, (VO 0 or VO > VDD) ±10 mA
Continuous total power dissipation See Dissipation Rating Table
TL77xxI –40 to 84 °C
Operating free-air
TATL77xxQ –40 to 125 °C
temperature range TL77xxM –55 to 125 °C
Tstg Storage temperature range –65 to 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to GND.
DISSIPATION RATINGS
TA25°C DERATING FACTOR TA= 85°C TA= 125°C
PACKAGE POWER RATING ABOVE TA= 25°C POWER RATING POWER RATING
D 725 mW 5.8 mW/°C 377 mW 145 mW
DRB
FK 1375 mW 11.0 mW/°C 715 mW 275 mW
JG 1050 mW 8.4 mW/°C 546 mW 210 mW
P 1000 mW 8.0 mW/°C 520 mW 200 mW
PW 525 mW 4.2 mW/°C 273 mW 105 mW
U 700 mW 5.5 mW/°C 370 mW 150 mW
RECOMMENDED OPERATING CONDITIONS
at specified temperature range MIN MAX UNIT
VDD Supply voltage 2 6 V
VIInput voltage 0 VDD V
VIH High-level input voltage at RESIN and CONTROL(1) 0.7×VDD V
VIL Low-level input voltage at RESIN and CONTROL(1) 0.2×VDD V
IOH High-level output current –2 mA
IOL Low-level output current 2 mA
Δt/ΔV input transition rise and fall rate at RESIN and CONTROL 100 ns/ V
TLC77xxI –40 85
Operating free-air
TATLC77xxQ –40 125 °C
temperature range TLC77xxM –55 125
(1) To ensure a low supply current, VIL should be kept <0.3 V and VIH > VDD 0.3 V.
Copyright © 1994–2012, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): TLC7701, TLC7725, TLC7703 TLC7733, TLC7705
TLC7701, TLC7725, TLC7703
TLC7733, TLC7705
SLVS087M DECEMBER 1994REVISED MARCH 2012
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ELECTRICAL CHARACTERISTICS
over recommended operating conditions(1) (unless otherwise noted) TLC77xx
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX
VDD = 2 V 1.8
IOH = –20 µA VDD = 2.7 V 2.5
High-level output
VOH V
voltage VDD = 4.5 V 4.3
IOH = 2 –mA VDD = 4.5 V 3.7
VDD = 2 V 0.2
IOL = 20 µA VDD = 2.7 V 0.2
Low-Level output
VOL V
voltage VDD = 4.5 V 0.2
IOL = 2 mA VDD = 4.5 V 0.5
TCLC7701 1.04 1.1 1.16
TLC7725 2.18 2.25 2.32
Negative-going input threshold voltage,
VIT– TLC7703 VDD = 2 V to 6 V 2.56 2.63 2.70 mV
SENSE(2)
TLC7733 2.86 2.93 3
TLC7705 4.47 4.55 4.63
TCLC7701 30
TLC7725
Vhus Hysteresis voltage, SENSE TLC7703 VDD = 2 V to 6 V mV
70
TLC7733
TLC7705
Vres Power-up reset voltage(3) IOL = 20 µA 1 V
RESIN VI= 0 V to VDD 2
CONTROL VI= VDD 7 15
IIInput current µA
SENSE VI= 5 V 5 10
SENSE, TLC7701 only VI= 5 V 2
RESIN = VDD, SENSE = VDD VITmax + 0.2 V,
IDD Supply current 9 16 µA
CONTROL = 0 V, Outputs open
VDD = 5 V, VCT = 0,
IDD(d) Supply current during tdRESIN = VDD, SENSE = VDD, 120 150 µA
CONTROL = 0 V, Outputs open
CIInput capacitance, SENSE VI= 0 V to VDD 50 pF
(1) All characteristics are measured with CT= 0.1 µF.
(2) To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 mF) should be connected near the supply terminals.
(3) The lowest supply voltage at which RESET becomes active. The symbol Vres is not currently listed within EIA or JEDEC standards for
semiconductor symbology. Rise time of VDD15 µs/V.
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SLVS087M DECEMBER 1994REVISED MARCH 2012
ELECTRICAL CHARACTERISTICS
over recommended operating conditions(1) (unless otherwise noted) TLC77xxM
PARAMETER TEST CONDITIONS UNIT
MIN TYP(2) MAX
TA= 25°C 1.8
VDD = 2 V V
TA= –55°C to 125°C 1.7
TA= 25°C 2.5
IOH = –20 µA VDD = 2.7 V V
TA= –55°C to 125°C 2.3
High-level output
VOH voltage TA= 25°C 4.3
VDD = 4.5 V V
TA= –55°C to 125°C 4.2
TA= 25°C 3.7
IOH = –2 µA VDD = 4.5 V V
TA= –55°C to 125°C 3.6
TA= 25°C 0.2
VDD = 2 V V
TA= –55°C to 125°C 0.2
TA= 25°C 0.2
IOL = –20 µA VDD = 2.7 V V
TA= –55°C to 125°C 0.2
Low-level output
VOL voltage TA= 25°C 0.2
VDD = 4.5 V V
TA= –55°C to 125°C 0.2
IOL = 2 mA TA= 25°C 0.5
VDD = 4.5 V V
TA= –55°C to 125°C 0.5
TLC7733 2.86 2.93 3.1
Negative-going input threshold
VIT– VDD = 2 V to 6 V V
voltage, SENSE (3) TLC7705 4.3 4.5 4.8
Vhys Hysteresis voltage, SENSE VDD = 2 V to 6 V 70 mV
Vres Power-up reset voltage(2) IOL = 20 µA 1 V
RESIN VI= 0 V to VDD 2
CONTROL VI= VDD 7 15
IIInput current µA
SENSE VI= 5 V 5 10
SENSE, TLC7701 only VI= 5 V 2
RESIN = VDD,
SENSE = VDD VITmax + 0.2 V
IDD Supply current 9 16 µA
CONTROL = 0 V,
Outputs open
TLC7733 VCT = 0 , VDD = 3.3 V 250
RESIN = VDD,120 150
IDD(d) Supply current during tdCONTROL = 0 V, µA
TLC7705 VDD = 5 V
SENSE = VDD,
Outputs open
CIInput capacitance, SENSE VI= 0 V to VDD 50 pF
(1) All characteristics are measured with CT= 0.1 µF.
(2) Typical values apply at TA= 25°C.
(3) To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 mF) should be connected near the supply terminals.
Copyright © 1994–2012, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): TLC7701, TLC7725, TLC7703 TLC7733, TLC7705
TLC7701, TLC7725, TLC7703
TLC7733, TLC7705
SLVS087M DECEMBER 1994REVISED MARCH 2012
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SWITCHING CHARACTERISTICS
at VDD = 5 V, RL= 2 kΩ, CL= 50 pF, TA= 25°C (unless otherwise noted)
MEASURED TLC77xx
PARAMETER TEST CONDITIONS UNIT
FROM TO MIN TYP MAX
(INPUT) (OUTPUT)
RESET RESIN = 0.7 × VDD,
tdDelay time VI(SENSE) VIT+ and CONTROL = 0.2 × VDD, CT= 100 nF, 1.1 2.1 4.2 ms
RESET TA= Full range, See timing diagram
Propagation delay time, low-
tPLH 20
to-high-level output RESET
Propagation delay time, high-
tPHL 5
VIH = VIT+max + 0.2 V, VIL = VIT-min 0.2 V,
to-low-level output SENSE RESIN = 0.7 × VDD, CONTROL = 0.2 × VDD, µs
Propagation delay time, low- CT = NC(1)
tPLH 5
to-high-level output RESET
Propagation delay time, high-
tPHL 20
to-low-level output
Propagation delay time, low-
tPLH 20 µs
to-high-level output RESET
Propagation delay time, high- VIH = 0.7 × VDD, VIL = 0.2 × VDD,
tPHL 40
to-low-level output SENSE = VIT+max + 0.2 V,
RESIN ns
CONTROL = 0.2 × VDD,
Propagation delay time, low-
tPLH 45
CT = NC(1)
to-high-level output RESET
Propagation delay time, high-
tPHL 20 µs
to-low-level output
Propagation delay time, low-
tPLH 38 ns
VIH = 0.7 × VDD, VIL = 0.2 × VDD,
to-high-level output CONTROL RESET SENSE = VIT+max + 0.2 V, RESIN = 0.7 × VDD,
Propagation delay time, high- CT = NC(1)
tPHL 38 ns
to-low-level output
Low-level minimum pulse SENSE VIH = VIT+max + 0.2 V, VIL = VIT-min –0.2 V,
duration to switch RESET RESIN VIL = 0.2 × VDD, VIH = 0.7 × VDD
and RESET
trRise time RESET 10% to 90%
and
tfFall time 90% to 10%
RESET
(1) NC = No capacitor, and includes up to 100-pF probe and jig capacitance.
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SLVS087M DECEMBER 1994REVISED MARCH 2012
SWITCHING CHARACTERISTICS
at VDD = 5 V, RL= 2 kΩ, CL= 50 pF, TA= 25°C (unless otherwise noted)
MEASURED TLC77xxM
PARAMETER TEST CONDITIONS TAUNIT
FROM TO MIN TYP MAX
(INPUT) (OUTPUT)
RESET RESIN = 2.7 V, CONTROL = 0.4 V,
tdDelay time VI(SENSE) VIT+ and Full range 1.1 2.1 4.2 ms
CT= 100 nF, See timing diagram
RESET
25°C 20
VIH = VIT+max + 0.2 V,
RESET µs
Propagation delay Full range 24
VIL = VIT-min - 0.2 V,
tPLH time, low-to-high-level SENSE RESIN = 2.7 V, CONTROL = 0.4 V, 25°C 5
output RESET µs
CT = NC(1) Full range 7
25°C 5
VIH = VIT+max + 0.2 V,
RESET µs
Propagation delay Full range 7
VIL = VIT-min - 0.2 V,
tPHL time, high-to-low-level SENSE RESIN = 2.7 V, CONTROL = 0.4 V, 25°C 20
output RESET µs
CT = NC(1) Full range 24
25°C 20
VIH = 2.7 V, VIL = 0.4 V,
RESET µs
Propagation delay Full range 24
SENSE = VIT+max + 0.2 V,
tPLH time, low-to-high-level RESIN CONTROL = 0.4 V, 25°C 45
output RESET ns
CT = NC(1) Full range 65
25°C 40
VIH = 2.7 V, VIL = 0.4 V,
RESET ns
Propagation delay Full range 60
SENSE = VIT+max + 0.2 V,
tPHL time, high-to-low-level RESIN CONTROL = 0.4 V, 25°C 20
output RESET µs
CT = NC(1) Full range 24
Propagation delay 25°C 38
tPLH time, low-to-high-level ns
VIH = 2.7 V, VIL = 0.4 V, Full range 58
output SENSE = VIT+max + 0.2 V,
CONTROL RESET RESIN = 2.7 V,
Propagation delay 25°C 38
CT = NC(1)
tPHL time, high-to-low-level ns
Full Range 58
output
VIH = VIT+max + 0.2 V,
SENSE 3
Low-level minimum VIL = VIT-min - 0.2 V Full range µs
pulse duration RESIN VIL = 0.4 V, VIH = 2.7 V 1
trRise time RESET 10% to 90% 8
and Full range ns/V
tfFall time 90% to 10% 4
RESET
(1) NC = No capacitor, and includes up to 100-pF probe and jig capacitance.
Copyright © 1994–2012, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): TLC7701, TLC7725, TLC7703 TLC7733, TLC7705
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TLC7733, TLC7705
SLVS087M DECEMBER 1994REVISED MARCH 2012
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PARAMETER MEASUREMENT INFORMATION
Figure 1. RESET and RESET Output Configurations
Figure 2. Input Pulse Definition Waveforms
10 Submit Documentation Feedback Copyright © 1994–2012, Texas Instruments Incorporated
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SLVS087M DECEMBER 1994REVISED MARCH 2012
TYPICAL CHARACTERISTICS
NORMALIZED INPUT THRESHOLD VOLTAGE SUPPLY CURRENT
vs vs
TEMPERATURE SUPPLY VOLTAGE
Figure 3. Figure 4.
HIGH-LEVEL OUTPUT VOLTAGE LOW-LEVEL OUTPUT VOLTAGE
vs vs
HIGH-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT CURRENT
Figure 5. Figure 6.
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SLVS087M DECEMBER 1994REVISED MARCH 2012
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TYPICAL CHARACTERISTICS (continued)
INPUT CURRENT MINIMUM PULSE DURATION AT SENSE
vs vs
INPUT VOLTAGE AT SENSE SENSE THRESHOLD OVERDRIVE
Figure 7. Figure 8.
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SLVS087M DECEMBER 1994REVISED MARCH 2012
APPLICATION INFORMATION
Figure 9. Reset Controller in a Microcomputer System
Figure 10. Data Retention During Power Down Using Static CMOS RAMs
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TLC7733, TLC7705
SLVS087M DECEMBER 1994REVISED MARCH 2012
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Changes from Revision L (February 2003) to Revision M Page
Updated the DRB package Pin Out dimensions and Ordering Information. ........................................................................ 1
14 Submit Documentation Feedback Copyright © 1994–2012, Texas Instruments Incorporated
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PACKAGE OPTION ADDENDUM
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Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
5962-9750901Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9750901Q2A
TLC7733
MFKB
5962-9750901QPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 9750901QPA
TLC7733M
5962-9751301Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9751301Q2A
TLC7705
MFKB
5962-9751301QHA ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 9751301QHA
TLC7705M
5962-9751301QPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 9751301QPA
TLC7705M
TLC7701ID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 C7701I
TLC7701IDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 C7701I
TLC7701IDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 C7701I
TLC7701IDRBT-NM ACTIVE SON DRB 8 250 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR -40 to 125 7701N
TLC7701IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 C7701I
TLC7701IP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 TLC7701IP
TLC7701IPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 TLC7701IP
TLC7701IPW ACTIVE TSSOP PW 8 150 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 Y7701
TLC7701IPWG4 ACTIVE TSSOP PW 8 150 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 Y7701
TLC7701IPWLE OBSOLETE TSSOP PW 8 TBD Call TI Call TI -40 to 85
TLC7701IPWR ACTIVE TSSOP PW 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 Y7701
PACKAGE OPTION ADDENDUM
www.ti.com 31-Oct-2013
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TLC7701IPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 Y7701
TLC7701QD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 C7701Q
TLC7701QDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 C7701Q
TLC7701QDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 C7701Q
TLC7701QDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 C7701Q
TLC7701QP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLC7701QP
TLC7701QPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 125 TLC7701QP
TLC7701QPW ACTIVE TSSOP PW 8 150 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TD701
TLC7701QPWG4 ACTIVE TSSOP PW 8 150 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TD701
TLC7701QPWLE PREVIEW TSSOP PW 8 TBD Call TI Call TI -40 to 125
TLC7701QPWR ACTIVE TSSOP PW 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TD701
TLC7701QPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 TD701
TLC7703-W ACTIVE WAFERSALE YS 0 TBD Call TI Call TI
TLC7703ID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 C7703I
TLC7703IDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 C7703I
TLC7703IDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 C7703I
TLC7703IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 C7703I
TLC7703IP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 TLC7703IP