DATA SH EET
Product specification
Supersedes data of 2001 Aug 24 2004 Jan 28
INTEGRATED CIRCUITS
TDA1519C
22 W BTL or 2 11 W
stereo power amplifier
2004 Jan 28 2
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
FEATURES
Requires very few externa l components fo r Bridge-Tied
Load (BTL) operation
Stereo or BTL application
High output powe r
Low offset voltag e at ou tput (important for BTL
applications)
Fixed gain
Good ripple rejection
Mute/standby switch
Load dump protec tion
AC and DC short-circuit safe to ground and VP
Thermally protected
Reverse polarity safe
Capability to handle high energy on outputs (VP=0V)
No switch-on/switch-off plop s
Protected again st ele ctro static discharge
Low thermal resist a nce
Identical inputs (inverting and non-inverting)
Pin compatible with TDA151 9B (TD A15 19 C and
TDA1519CSP).
GENERAL DESCRIPTION
The TDA1519C is an integrated class-B dual outp ut
amplifier in a 9-lead plastic single in-line power package or
20-lead heatsink small outline packa g e.
For the TDA1519CTH (S OT418-3), the heatsink is
positioned on top of the package, which allows an external
heatsink to be mounted on top. The heatsink of the
TDA1519CTD (SOT397-1) is facing the PCB, allowing the
heatsink to be soldered onto the copper are a of the PCB.
ORDERING INFORMATION
TYPE NUMBER PACKAGE
NAME DESCRIPTION VERSION
TDA1519C SIL9P plastic single in-line power package; 9 leads SOT131-2
TDA1519CSP SMS9P plastic surface mounted single in-line power package; 9 leads SOT354-1
TDA1519CTD HSOP20 plastic, heatsink small outline package; 20 leads SOT397-1
TDA1519CTH HSOP20 plastic, heatsink small outline package; 20 leads; low stand-off height SOT418-3
2004 Jan 28 3
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply
VPsupply voltage operating 6.0 14.4 17.5 V
non-operating 30 V
load dump protected 45 V
IORM repetitive peak output current 4A
Iq(tot) total quiescent current 40 80 mA
Istb standby current 0.1 100 A
Isw(on) switch-on current 40 A
Inputs
Ziinput impedance BTL 25 k
stereo 50 k
Stereo application
Pooutput power THD = 10 %
RL=46W
RL=211 W
cs channel separation 40 dB
Vn(o)(rms) noise output voltage (RMS value) 150 V
BTL application
Pooutput power THD = 10 %; RL=422 W
SVRR supply voltage ripple rejection RS=0
fi=100Hz 34 dB
fi=1to10kHz 48 dB
VOODC output offset voltage 250 mV
Tjjunction temperature 150 C
2004 Jan 28 4
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
BLOCK DIAGRAM
mgl491
60
kW
input
reference
voltage power
ground
(substrate)
+
+
-
5
signal
ground
2 7
9
6
183
W
18.1 kW
3
TDA1519C
TDA1519CSP
15 kW
15 kW
VA
VA
C
m
mute switch
power stage
60
kW
standby
reference
voltage
mute
reference
voltage
1
NINV
RR
INV
OUT2
M/SS
OUT1
GND1 GND2V
P
4
8
183
W
18.1 kW
VA
C
m
mute switch
power stage
+
-
mute
switch
standby
switch
×
1
V
P
Fig.1 Block diagram.
The pin numbers refer to the TDA1519C and TDA1519CSP only, for TDA1519CTD and TDA1519CTH se e Figs 3 and 4.
2004 Jan 28 5
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
PINNING
SYMBOL PIN DESCRIPTION
TDA1519C;
TDA1519CSP TDA1519CTD TDA1519CTH
NINV 1 19 19 non-inverting input
GND1 2 20 20 ground 1 (signal)
RR 3 1 1 supply voltage ripple rejection
OUT1 4 3 3 output 1
GND2 5 5 5 ground 2 (substrate)
OUT2 6 8 8 output 2
VP7 10 10 positive supply voltage
M/SS 8 11 11 mute/standby switch input
INV 9 12 12 inverting input
n.c. 2, 4, 6, 7, 9 and 13 to 18 2, 4, 6, 7, 9 and 13 to 18 not connected
NINV
GND1
RR
OUT1
GND2
OUT2
V
P
M/SS
INV
1
2
3
4
5
6
7
8
9
TDA1519C
TDA1519CSP
mgr561
Fig.2 Pin configuration
TDA1519C and
TDA1519CSP.
RR
n.c.
OUT1
n.c.
GND2
n.c.
n.c.
OUT2
n.c.
VP
GND1
NINV
n.c.
n.c.
n.c.
n.c.
n.c.
n.c.
INV
M/SS
1
2
3
4
5
6
7
8
9
10 11
12
20
19
18
17
16
15
14
13
TDA1519CTD
mgl937
Fig.3 Pin configuration
TDA1519CTD.
TDA1519CTH
GND1 RR
NINV n.c.
n.c. OUT1
n.c. n.c.
n.c. GND2
n.c. n.c.
n.c. n.c.
n.c. OUT2
INV n.c.
M/SS V
P
001aaa348
20
19
18
17
16
15
14
13
12
11
9
10
7
8
5
6
3
4
1
2
Fig.4 Pin configuration
TDA1519CTH.
2004 Jan 28 6
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
FUNCTIONAL DESCRIPTION
The TDA1519C contains two identical amplifiers with
differential input stages. The gain of each amplifier is fixed
at 40 dB. A special feature of this device is the
mute/standby switc h w hich has the following features:
Low standby current (<100 A)
Low mute/standby switching current (allows for low-cost
supply sw itch)
Mute condition.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VPsupply voltage operating 17.5 V
non-operating 30 V
load dump protected;
during 50 ms; tr2.5 ms 45 V
Vsc AC and DC short-circuit-sa fe voltage 17.5 V
Vrp reverse polar ity voltage 6V
Eoenergy handling capability at outputs VP=0V 200 mJ
IOSM non-repetitive pea k output current 6A
IORM repetitive peak output current 4A
Ptot total power dissipation see Fig.5 25 W
Tjjunction temperature 150 C
Tstg storage temperature 55 +150 C
-25 0 50 150
30
10
0
20
mgl492
100
Ptot
(W)
Tamb (°C)
(1)
(2)
(3)
Fig.5 Power derating curve for TDA1519C.
(1) Infinite heatsink.
(2) Rth(c-a) =5K/W.
(3) Rth(c-a) =13K/W.
2004 Jan 28 7
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
THERMAL CHARACTE RISTI CS
DC CHARACTERISTICS
VP=14.4V; T
amb =25C; measured in circuit of Fig.6; unless otherwise spe cified .
Notes
1. The circuit is DC adjusted at VP= 6 to 17.5 V and AC operating at VP= 8.5 to 17.5 V.
2. At VP= 17.5 to 30 V, the DC output voltage is 0.5VP.
SYMBOL PARAMETER CONDITIONS VALUE UNIT
Rth(j-a) thermal resistance from junction to ambient;
TDA1519C, TDA1519CTH and TDA1519CTD in free air 40 K/W
Rth(j-c) thermal resistance from junction to case;
TDA1519C, TDA1519CTH and TDA1519CTD 3K/W
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply
VPsupply voltage note 1 6.0 14.4 17.5 V
Iq(tot) total quiescent current 40 80 mA
VODC output voltage note 2 6.95 V
VOODC output offset voltage 250 mV
Mute/standby switch
Vsw(on) switch-on voltage level 8.5 V
Vmute mute voltage level 3.3 6.4 V
Vstb standby voltage level 0 2V
Mute/standby condition
Vooutput voltage mute mode; Vi= 1 V (maximum);
fi=20Hzto15kHz 20 mV
VOODC output offset voltage mute mode 250 mV
Istb standby current standby mode 100 A
Isw(on) switch-on current 12 40 A
2004 Jan 28 8
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
AC CHARACTERISTICS
VP=14.4V; R
L=4; f = 1 kHz; Tamb =25C; unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Stereo application (see Fig.6)
Pooutput power note 1
THD = 0.5 % 4 5 W
THD = 10 % 5.5 6.0 W
RL=2; note 1
THD = 0.5 % 7.5 8.5 W
THD = 10 % 10 11 W
THD total harmonic distortion Po=1W 0.1 %
fro(l) low freque nc y roll-off 3dB; note2 45 Hz
fro(h) high frequency roll-off 1dB 20 kHz
Gv(cl) closed-loop voltage gain 39 40 41 dB
SVRR supply voltage ripple rejection on; notes 3 and 4 40 dB
on; notes 3 and 5 45 dB
mute; notes 3 and 6 45 dB
standby; notes 3
and 6 80 dB
Ziinput impedance 50 60 75 k
Vn(o)(rms) noise output voltage (RMS value) note 7
on; RS=0150 V
on; RS=10k 250 500 V
mute; note 8 120 V
cs channel separation RS=10k40 dB
Gv(ub)channel unbalance 0.1 1 dB
BTL application (see Fig.7)
Pooutput power note 1
THD = 0.5 % 15 17 W
THD = 10 % 20 22 W
VP= 13.2 V; note 1
THD = 0.5 % 13 W
THD = 10 % 17.5 W
THD total harmonic distortion Po=1W 0.1 %
Bppower bandwidth THD = 0.5 %;
Po=1 dB; with
respect to 15 W
35 to 15000 Hz
fro(l) low freque nc y roll-off 1dB; note2 45 Hz
fro(h) high frequency roll-off 1dB 20 kHz
Gv(cl) closed-loop voltage gain 45 46 47 dB
2004 Jan 28 9
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
Notes
1. Output power is measur ed directly at the output pins of the device.
2. Frequency re sponse externally fixed.
3. Ripple rejection measured at the output with a source impedance of 0 (maximum ripple amplitude of 2 V).
4. Frequency f = 100 Hz.
5. Frequency between 1 and 10 kHz.
6. Frequency between 100 Hz and 10 kHz.
7. Noise voltage measu red in a bandwidth of 2 0 Hz to 20 kHz.
8. Noise output vo ltage independent of RS (Vi=0V).
SVRR supply voltage ripple rejection on; notes 3 and 4 34 dB
on; notes 3 and 5 48 dB
mute; notes 3 and 6 48 dB
standby;
notes 3 and 6 80 dB
Ziinput impedance 25 30 38 k
Vn(o)(rms) noise output voltage (RMS value) note 7
on; RS=0200 V
on; RS=10k 350 700 V
mute; note 8 180 V
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
2004 Jan 28 10
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
APPLICATION INFORMATION
2200
µF
1000
µF
100 µF 100
nF
220 nF 60 kW
input
reference
voltage
40 dB
+
-
1220 nF
60 kW
40 dB
-
+
9
546
inverting inputnon-inverting input
internal
1/2 VP
VP
power
ground
2
signal
ground
TDA1519C
38
7
standby switch
mgl493
Fig.6 Stereo application dia gram (TDA1519C).
Fig.7 BTL application diagram (TDA1519C).
2004 Jan 28 11
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
020
60
30
40
50
mgr539
481216
Iq(tot)
(mA)
VP (V)
Fig.8 Total quiescent current as a function of the supply voltage.
020
30
0
10
20
mgr540
4 8 12 16
Po
(W)
VP (V)
THD = 10%
0.5%
Fig.9 Output power as a func tion of the supply voltage.
BTL application.
RL=4.
fi= 1 kHz.
2004 Jan 28 12
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
12
0
10-1 11010
2
mgr541
4
8
THD
(%)
Po (W)
Fig.10 Total harmonic dis to rtion as a function of the output powe r.
BTL application.
RL=4.
fi= 1 kHz.
0.6
010 102103104
mgu377
0.2
0.4
THD
(%)
fi (Hz)
Fig.11 Total harmonic distortion as a function of the operating frequency.
BTL application.
RL=4.
Po=1W.
2004 Jan 28 13
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
PACKAGE OUTLINES
UNIT A b
max. b
p2
cD
(1)
E
(1)
Z
(1)
deD
h
Lj
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 4.6
4.4 1.1 0.75
0.60 0.48
0.38 24.0
23.6 20.0
19.6 10 2.54
12.2
11.8 3.4
3.1
A
max.
1
2
E
h
62.00
1.45
2.1
1.8
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
17.2
16.5
SOT131-2 99-12-17
03-03-12
0 5 10 mm
scale
Q
0.25
w
0.03
x
D
L
A
E
c
A2
Q
w
M
b
p
d
D
Ze
xh
19
Eh
non-concave
seating plane
1
b
j
SIL9P: plastic single in-line power package; 9 leads SOT131-2
view B: mounting base side
B
2004 Jan 28 14
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
UNIT A A1A2A3bpcD
(1)
E
(1)
Z
(1)
deDhEhLp
L
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 4.9
4.2 0.35
0.05 4.6
4.4 0.25 0.75
0.60 24.0
23.6
0.48
0.38 10
20.0
19.6 12.2
11.8 2.54 3.4
2.8 2.1
1.9
63°
0°
2.00
1.45
3.4
3.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
7.4
6.6
SOT354-1
0 5 10 mm
scale
Q
j
0.15
wxy θ
D
c
A1Q
heatsink
heatsink
θ
A
Lp
(A3)
A2
0.030.25
w
M
b
p
d
Dh
Ze
x
91
j
Eh
non-concave
03-03-12
06-03-16
SMS9P: plastic surface-mounted single in-line power package; 9 leads SOT354-1
L
E
y
2004 Jan 28 15
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
References
Outline
version European
projection Issue date
IEC JEDEC JEITA
SOT397-1
sot397-1_po
03-07-23
10-10-21
Unit
(1)
mm max
nom
min
Dimensions
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
HSOP20: plastic, heatsink small outline package; 20 leads SOT397-1
D
b
p
Z
D
1
D
2
E
1
e
110
20 11
pin 1 index
detail X
L
p
Q
A
A
4
(A
3
)
A
1
A
2
θ
A
vA
X
E
c
E
2
H
E
0 5 10 mm
scale
3.6 0.3
0.1 0.35 0.1
0.0
0.53
0.40
0.32
0.23
16.0
15.8
13.0
12.6
1.1
0.9
11.1
10.9
6.2
5.8
2.9
2.5
1.1
0.8
1.5
1.4
AA
1
A
2
3.5
3.2
A
3
A
4
b
p
c
0.25
wyzD
(1)
D
1
D
2
E
(1)
E
1
E
2
e
1.27
H
E
14.5
13.9 0.1 2.5
2.0
L
p
Q
0.25
v
8
°
0
°
θ
y
w
2004 Jan 28 16
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
UNIT A4
(1)
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm +0.08
0.04
3.5 0.35
DIMENSIONS (mm are the original dimensions)
Notes
1. Limits per individual lead.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT418-3
0 5 10 mm
scale
HSOP20: plastic, heatsink small outline package; 20 leads; low stand-off height SOT418-3
A
max.
detail X
A2
3.5
3.2
D2
1.1
0.9
HE
14.5
13.9
Lp
1.1
0.8
Q
1.7
1.5 2.5
2.0
v
0.25
w
0.25
yZ
8°
0°
θ
0.07
x
0.03
D1
13.0
12.6
E1
6.2
5.8
E2
2.9
2.5
bpc
0.32
0.23
e
1.27
D
(2)
16.0
15.8
E
(2)
11.1
10.9
0.53
0.40
A3
A4
A2(A3)
Lp
θ
A
Q
D
y
x
HE
E
c
v
M
A
X
A
bpw
M
Z
D1D2
E2
E1
e
20 11
110
pin 1 index
02-02-12
03-07-23
2004 Jan 28 17
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
SOLDERING
Introduction
This text gives a very brief insight to a complex technology.
A more in-depth acco unt of soldering ICs can be fou nd in
our “Data Hand book IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mount components are mixed on
one printed-circuit board. Wave soldering can still be used
for certain surface mount ICs, but it is not suitable for fine
pitch SMDs. In these situations reflow soldering is
recommended. Driven by legislation a nd environmenta l
forces the worldwide use of lead-free solder paste s is
increasing.
Through-hole mount packages
SOLDERING BY DIPPING OR BY SOLDER WAVE
Typical dwell time of the le ads in the wave ranges from
3 to 4 seconds at 250 C or 265 C, depending on solder
material applied, SnPb or Pb- f ree respectively.
The total contact time of successive solder waves must not
exceed 5 seconds.
The device may be mounte d up to the seating plane, but
the temperature of the plastic bod y mus t not ex ceed the
specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperatur e with in the pe rmissible limit.
MANUAL SOLDERING
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm abov e it. If the temperature of the soldering iron bit
is less than 300 C it may remain in contact for up to
10 sec onds. If the bit temperature is between
300 and 400 C, contact may be up to 5 seconds.
Surface mount p ackages
REFLOW SOLDERING
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package plac ement.
Several methods exist for reflowing; for example,
convection or co nvection/infrared heating in a conveyor
type oven. Through pu t times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
Typical reflow peak temperatures range from
215to270C depending on solder paste material. The
top-surface temperature of the packages should
preferably be kept:
below 22 5 C (SnPb process) or be low 245 C (Pb-free
process)
for all the BGA, HTSSON..T and SSOP-T packages
for packages with a thickness Š 2.5 mm
for packages with a thickness < 2.5 mm and a volume
350 mm3 so called thick/large packages.
below 24 0 C (SnPb process) or be low 260 C (Pb-free
process) for packages with a thickness < 2.5 mm and a
volume < 350 mm3 so called small/thin packages.
Moisture sensitivity precautions, as indicated on packing,
must be respected at all times.
WAVE SOLDERING
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can p res ent major problems.
To overcome these problems the double-wave soldering
method was sp ecifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
Use a double-wa ve soldering meth od comprising a
turbulent wave with high upward pressur e followed by a
smooth laminar wave.
For packages with leads on two sides and a pitch (e):
larger than or equal to 1.27 mm, the footprint
longitudinal axi s is preferred to be parallel to the
transport direction of the printed-circuit board;
smaller than 1.27 mm, the footp rint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board .
The footprint must incorporate solder thieves at the
downstream end.
For packages with leads on four sides, the footprint must
be plac ed at a 45 angle to the transp ort direction of the
printed-circuit board. The footprint must incorporate
solder thieves dow nstream and at the s id e c orners.
During placement and before soldering, the package must
be fixed with a droplet of adh es ive. The adhesive can be
applied by screen printing, pin transfer or syringe
2004 Jan 28 18
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
dispensing. The package can be soldered afte r the adhesive is cu red.
Typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 C or 265 C, depending on solder material
applied, SnPb or Pb-free respectively.
A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
MANUAL SOLDERING
Fix the component b y firs t soldering two diagonally-opposite end lea ds . U se a low voltage (24 V or less) so ldering iron
applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a d edi cate d
tool, all other leads can be soldered in one operation within 2 to 5 s econds between 27 0 and 320 C.
Suitability of IC packages for wave, reflow and dipping soldering methods
Notes
1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy
from your NXP Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with res pe ct to time) and body size of the package, there is a risk that internal or external packag e
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Cir cu it Packages; Section: Packing Meth ods .
3. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
4. Hot bar soldering or manual soldering is suitable for PMFP packag es.
5. These transparent plastic packages are extre m ely sensitive to reflow soldering conditions and mus t on no account
be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature
exceeding 217 C 10 C meas ured in the atmosphere of the reflow oven. The package body pe ak temperature
must be kept as low as possible.
6. These packages are not suitable fo r wave soldering. On versions with the heatsink on the bottom side, the solder
cannot pene trat e bet ween the p rinted- circu it b oar d and th e hea ts ink. O n ver sions with th e hea ts ink on the to p s ide,
the solder might be deposited on the he atsink surface.
7. If wave soldering is considere d, th en the package must be placed at a 45 angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corne rs.
MOUNTING PACKAGE(1) SOLDERING METHOD
WAVE REFLOW(2) DIPPING
Through-hole mount CPGA, HCPGA suitable suitable
DBS, DIP, HDIP, RDBS, SDIP, SIL suitable(3) 
Through-hole-
surface mount PMFP(4) not suitable not suitable
Surface mount BGA, HTSSON..T(5), LBGA, LFBGA, SQFP,
SSOP-T(5), TFBGA, USON, VFBGA not suitable suitable
DHVQFN, HB CC, HBGA, HLQFP, HSO,
HSOP, HSQFP, HSSON, HTQFP, HTSSOP,
HVQFN, HVSON, SMS
not suitable(6) suitable
PLCC(7), SO, SOJ s uitable suitable
LQFP, QFP, TQFP not recommended(7)(8) suitable
SSOP, TSSOP, VSO, VSSOP not recommended(9) suitable
CWQCCN..L(11), PMFP(10), WQCCN32L(11) not suitable not suitable
2004 Jan 28 19
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
8. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger th an 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
9. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
0.65 mm; it is definitely not su itable for packages with a pitch (e) equal to or smaller than 0. 5 mm.
10. Hot bar or manual sold ering is suitable for PMFP packages .
11. Image se nsor pac kages in prin ciple shoul d not be so ldered. They are mounted in sockets o r deliver ed pre-moun ted
on flex foil. Howeve r, the image sensor package can be mounted by the c lient on a flex foil by using a hot bar
soldering process. The appropriate soldering profile can be provided on request.
2004 Jan 28 20
NXP Semiconductors Product specification
22 W BTL or 2 11 W
stereo power amplifier TDA1519C
DATA SHEET STATUS
Notes
1. Please consult the most rec ently issued document befor e initiating or completing a design.
2. The product s tatus of device(s) described in this document may have changed since this do cument was published
and may differ in case of multiple devices. The latest product status information is available on the Internet at
URL http://www.nxp.com.
DOCUMENT
STATUS(1) PRODUCT
STATUS(2) DEFINITION
Objective data sheet Development This document contains data from the objective specification for product
development.
Preliminary data sheet Qualification This document contains data from the preliminary specification.
Product data sheet Production This document contains the product s pe cific ation.
DEFINITIONS
Product specification The information and da ta
provided in a Product data she et shall define the
specification of the product as agre ed between NXP
Semiconductors and its custo m er, unless NXP
Semiconductors and cus to mer have explicitly agreed
otherwise in writing. In no event however, shall an
agreement be valid in which th e NXP Semiconductors
product is deemed to offer functions and qualities beyond
those described in the Product data sheet.
DISCLAIMERS
Limited warranty and liability Information in this
document is believed to be accurate and reliable.
However, NXP Semiconduc tors does not give any
representations or warranties, expressed or implied, as to
the accuracy or completeness of such information and
shall have no liability for the consequences of use of such
information.
In no event shall NXP Semiconductors be liable for any
indirect, incidental, punitive, special or conseq uential
damages (including - without limitation - lost profits, lost
savings, busin es s inte rru ption, costs related to the
removal or replacement of any products or rework
charges) whether or not such damages are based on tort
(including negligence), warranty, breach of contract or any
other legal theory.
Notwithstanding any damages that customer might incur
for any reason whatsoever, NXP Semiconductors’
aggregate and cumulative liability towards customer for
the products described herein shall be limited in
accordance with the Terms and conditio ns of commercial
sale of NXP Semiconductors.
Right to make changes NXP Semiconductors
reserves the right to make changes to information
published in this document, including without limitation
specifications and prod uct descriptions, at any time and
without notice. This document supersedes and replaces all
information su pplied prior to the publicat ion hereof.
Suitability for use NXP Semiconductors products are
not designed, authorized or warranted to be suitable for
use in life support, life-critical or safety-critic al systems or
equipment, nor in applications where failure or malfunction
of an NXP Semiconductors product can reasonably be
expected to res ult in personal injur y, death or severe
property or environmental damage. NXP Semiconductors
accepts no liability for inclusion and/or use of NXP
Semiconductor s pr od ucts in such equipment or
application s and therefore such inclusion and /or use is at
the customer’s own risk.
Applications Applications that are described herein for
any of these products are for illustrative purposes only.
NXP Semiconductors makes no representation or
warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of
their applications and products using NXP
Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or
customer product design. It is customer’s sole
responsibility to determine whether the NXP
Semiconductors pro du ct is su itable and fit for the
customer’s applications and products planned, as well as
for the planned application and use of customer’s third
party customer(s). Customers should provide appropriate
design and opera ting safeguards to minimi ze the ris ks
associated with their ap plications and produ cts.