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FEATURES DESCRIPTION
APPLICATIONS
TYPICAL APPLICATION
5
6
7
8
19
3
AC
USB
SW
VSS
STAT1
STAT2 13
12
ISET2
ISET1
bq25017RHL
PACK+
PACK−
VDC
GND
VBUS
GND
D+
D −
USBPort
AC Adapter
15CE
2FB
16BAT/OUT
+
SYSTEM
Battery
Pack
1.8V
17BAT/OUT
9
18
VSS
VSS
EN
4 20FPWM
sim_app2a_lus721
RSET
14PG
10 μF
10 μF
10 Hμ
1 μF
10 μF
bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
SINGLE-CHIP CHARGER AND DC/DC CONVERTER IC FOR PORTABLE APPLICATIONS
•Li-Ion Or Li-Pol Charge Management and
The bq25015/7 are highly integrated charge andSynchronous DC-DC Power Conversion In a
power management devices targeted atSingle Chip
space-limited bluetooth applications. The bq25015/7devices offer integrated power FET and current•Charges and Powers the System from Either
sensor for charge control, reverse blockingthe AC Adapter or USB with Autonomous
protection, high accuracy current and voltagePower Source Selection
regulation, charge status, charge termination, and a•Integrated USB Charge Control with
highly efficient and low-power dc-dc converter in aSelectable 100 mA and 500 mA Charge Rates
small package.•Integrated Power FET and Current Sensor for
The bq25015/7 devices charge the battery in threeUp to 500 mA Charge Applications AND
phases: conditioning, constant current and constant300 mA DC-DC Controller with Integrated
voltage. Charge is terminated based on minimumFETs
current. An internal charge timer provides a backupsafety feature for charge termination. The bq25015/7•Reverse Leakage Protection Prevents Battery
automatically re-starts the charge if the batteryDrainage
voltage falls below an internal threshold. The•Automatic Power Save Mode For High
bq25015/7 automatically enters sleep mode whenEfficiency at Low Current, or Forced PWM for
V
CC
supply is removed.Frequency Sensitive Applications
The integrated low-power high-efficiency dc-dcconverter is designed to operate directly from asingle-cell Li-ion or Li-Pol battery pack. The output•MP3 Players
voltage is either adjustable from 0.7 V to VBAT, or•PDAs, Smartphones
fixed at 1.8 V (bq25017) and is capable of deliveringup to 300-mA of load current. The dc-dc converter•Digital Cameras
operates at a synchronized 1 MHz switchingfrequency allowing for the use of small inductors.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006–2007, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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ABSOLUTE MAXIMUM RATINGS
(1)
RECOMMENDED OPERATING CONDITIONS
DISSIPATION RATINGS
bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
(1)
PACKAGET
A
OUTPUT VOLTAGE (V) PART NUMBER
(2) (3)
STATUS
MARKING
Adjustable bq25015RHLR Production BZLAdjustable bq25015RHLT Production BZL-40°C to 125°C
1.8 V bq25017RHLR Production BZM1.8 V bq25017RHLT Production BZM
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIwebsite at www.ti.com(2) The RHL package is available taped and reeled only in quantities of 3,000 devices per reel.(3) This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable foruse in specified lead-free soldering processes. In addition, this product uses package materials that do not contain halogens, includingbromine (Br) or antimony (Sb) above 0.1% of total product weight.
over operating free-air temperature range (unless otherwise noted)
bq25015/7
Supply voltage AC, USB (wrt VSS) –0.3 V to 7 VPG, OUT, ISET1, ISET2, STAT1, STAT2, TS (wrt VSS) –0.3 V to 7 VInput voltage
EN, FB, FPWM, SW (wrt VSS) V
OUT
+ 0.3 VPG, STAT1, STAT2 15 mAOutput sink/source current
TS 200 µAOutput source current OUT 1.5 AStorage temperature range, T
stg
–65°C to 150°CJunction temperature range, T
J
–40°C to 125°CLead temperature (solderig, 10 seconds) 260°CESD rating (human body model, HBM) 1500 V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under recommended operatingconditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltagevalues are with respect to the network ground terminal unless otherwise noted.
MIN MAX UNIT
V
CC
Supply voltage (from AC input) 4.5 6.5
VV
CC
Supply voltage (from USB input) 4.35 6.5T
A
Operating temperature range 0 85 °CI
OUT_L
Maximum DC-DC output current 300 mA
T
A
< 40°C DERATING FACTORPACKAGE θ
JAPOWER RATING ABOVE T
A
= 40°C
20-pin RHL
(1)
1.81 W 21 mW/°C 46.87°C/W
(1) This data is based on using the JEDEC High-K board and the exposed die pad is connected to a Cu pad on the board. This isconnected to the ground plane by a 2×3 via matrix.
2
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ELECTRICAL CHARACTERISTICS
bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
over operating temperature range (T
A
= 0°C to 125°C) and recommended supply voltage range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT CURRENT
I
CC(VCC)
Supply current 1, VCC V
VCC
> V
VCC(min)
1.2 2.0 mASum of currents into OUT/BAT,I
CC(SLP)
Sleep current 2 5V
VCC
< V
(SLP)
I
CC(STDBY)
Standyby current CE = High, 0°C ≤T
J
≤85°C 150
µACharge DONE, V
VCC
> V
VCC(min)
,I
IB(OUT)
Input current, OUT 15 35I
OUT(SW)
= 0 mA, Converter not switchingI
IB(CE)
Input current, CE 1
CHARGE VOLTAGE REGULATION (V
BAT(REG)
+ V
(DO-MAX)
≤V
VCC
, I
(TERM)
< I
OUT(BAT)
≤0.5 A)
V
REG(BAT)
Charger regulation voltage 4.2 VT
A
= 25°C –0.35% 0.35%Charge voltage regulationaccuracy
–1% 1%(V
(AC)
– V
(OUT)
) AC dropout voltage V
OUT (BAT)
= V
REG (BAT)
, I
OUT(BAT)
= 0.5 A 175 250V
OUT (BAT)
= V
REG (BAT)
, ISET2 = High 350 500 mV(V
(USB)
– V
(OUT)
) USB dropout voltage
V
OUT (BAT)
= V
REG (BAT)
, ISET2 = Low 60 100
CHARGE CURRENT REGULATION
V
VCC
≥4.5 V, V
OUT (BAT)
= V
(LOWV)
,I
OUT (BAT)
AC output current range V
VCC
– V
OUT (BAT)
> V
(DO-MAX)
, 50 500I
OUT(BAT)
= (K
(SET)
× V
(SET)
/ R
SET
)V
VCC(min)
≥4.5 V, V
OUT (BAT)
= V
(LOWV)
, mA80 100V
VCC
– V
OUT (BAT)
> V
(DO-MAX)
, ISET2= LowI
OUT (BAT)
USB output current range
V
VCC(min)
≥4.5 V, V
OUT (BAT)
= V
(LOWV)
,
400 500V
VCC
– V
OUT (BAT)
> V
(DO-MAX)
, ISET2 = HighVoltage on ISET1, V
VCC
≥4.5 V,V
(SET)
Output current set voltage V
OUT (BAT)
= V
(LOWV)
, 2.436 2.500 2.538 VV
VCC
– V
OUT (BAT)
> V
(DO-MAX)
, ISET2 = High50 mA ≤I
OUT(OUT)
≤1000 mA 307 322 337K
(SET)
Output current set factor 10 mA ≤I
OUT(OUT)
≤50 mA 296 320 34610 mA ≤I
OUT(OUT)
≤10 mA 246 320 416
PRECHARGE and SHORT-CIRCUIT CURRENT REGULATION
Precharge to fast-chargeV
(LOWV)
Voltage on OUT/BAT 2.8 3.0 3.2 Vtransition threshold
V
VCC(min)
≥4.5 V, t
FALL
= 100 ns,Deglitch time for fast-charget
PRECHG_DG
10 mV overdrive, 250 375 500 msto precharge transition
V
IN(BAT)
decreasing below threshold0 V < V
IN(BAT)
< V
(LOWV)
, t < t
(PRECHG)
,I
OUT(PRECHG)
Precharge range 5 100 mAI
OUT(PRECHG)
= (K
(SET)
× V
(PRECHG)
)/ R
SET
Voltage on ISET1, V
REG(BAT)
= 4.2 V,V
(PRECHG)
Precharge set voltage 0 V < V
IN(BAT)
< V
(LOWV)
, 240 255 270 mVt < t
(PRECHG)
CHARGE TAPER and TERMINATION DETECTION
V
IN(BAT)
> V
(RCH)
, t < t
(PRECHG)
,I
(TAPER)
Charge taper detection range 5 100 mAI
(TAPER)
= (K
(SET)
× V
(TAPER)
)/ R
SET
Charge taper detection set Voltage on ISET1, V
REG(BAT)
= 4.2 V,V
(TAPER)
235 250 265voltage V
IN(BAT)
> V
(RCH)
, t < t
(PRECHG)
mVVoltage on ISET1, V
REG(BAT)
= 4.2 V,Charge termination detectionV
(TERM)
V
IN(BAT)
> V
(RCH)
, t < t
(PRECHG)
, 11 18 25set voltage
I
(TERM)
= (K
(SET)
× V
(TERM)
)/ R
SET
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bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
ELECTRICAL CHARACTERISTICS (continued)over operating temperature range (T
A
= 0°C to 125°C) and recommended supply voltage range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
VCC(min)
≥4.5 V, t
FALL
= 100 ns,Deglitch time for tapert
TPRDET_DG
10 mV overdrive, I
CHG
increasing above or 250 375 500detection
decreasong below threshold
msV
VCC(min)
≥4.5 V, t
FALL
= 100 ns,Deglitch time for terminationt
TERMDET_DG
10 mV overdrive, 350 375 500detection
I
CHG
decreasing below threshold
BATTERY RECHARGE THRESHOLD
V
REG(BAT)
V
REG(BAT)
V
REG(BAT)V
RCH
Recharge threshold voltage V– 0.115 – 0.10 – 0.085V
VCC(min)
≥4.5 V, t
FALL
= 100 ns,Deglitch time for recharget
RCHDET
10 mV overdrive, I
CHG
decreasing below or 250 375 500 msdetect
increasing above threshold
STAT1, STAT2 and PG OUTPUTS
V
OL
Low-level output voltage I
OL
= 5 mA 0.25 V
ISET2 and CE INPUTS
V
IL
Low-level input voltage I
IL
= 10 µA 0 0.4
VV
IH
High-level input voltage I
IL
= 20 µA 1.4I
IL
Low-level input current, CE –1I
IH
High-level input current, CE 1I
IL
Low-level input current, ISET2 V
ISET2
= 0 V –20
µAHigh-level input current,I
IH
V
ISET2
= V
CC
40ISET2I
IHZ
High-Z input current, ISET2 V
ISET2
= High-Z 1
TIMERS
t
(PRECHG)
Precharge time limit 1620 1800 1930t
(TAPER)
Taper time limit 1620 1800 1930 st
(CHG)
Charge time limit 16200 18000 19300I
(FAULT)
Timer fault recovery current 200 µA
SLEEP COMPARATOR for CHARGER
V
VCC
≤V
(SLP)
Sleep mode entry threshold 2.3 V ≤V
IN(BAT)
≤V
REG(BAT)
V
IN(BAT)
+80 mV
VV
VCC
≥V
(SLP_DG)
Sleep mode exit threshold 2.3 V ≤V
IN(BAT)
≤V
REG(BAT)
V
IN(BAT)
+190 mVV
CC
decreasing below threshold,t
(DEGL)
Deglitch time for sleep mode 250 375 500 mst
FALL
= 100 ns, 10 mV overdrive,
THERMAL SHUTDOWN
Thermal trip thresholdT
(SHTDWN)
165temperature
°CThermal hysteresis 15
UNDERVOLTAGE LOCKOUT AND POR
Undervoltage lockoutV
(UVLO_CHG)
Decreasing V
CC
2.4 2.5 2.6 Vthreshold voltageHysteresis 27 mVV
POR
POR threshold voltage
(1)
2.3 2.4 2.5 V
DC-DC INPUT
Input power absent V
(LOWV)
4.2V
(BAT)
Input voltage range
Input power present V
(UVLO)
4.2 VV
(UVLO)
Undervoltage lockout 2.0
(1) Ensured by design. Not production tested.
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bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
ELECTRICAL CHARACTERISTICS (continued)over operating temperature range (T
A
= 0°C to 125°C) and recommended supply voltage range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
FPWM – bq25015
V
IH(FPWM)
High-level input voltage 2.0V
IL(FPWM)
Low-level input voltage 0.4
FPWM – bq25017
V
IH(FPWM)
High-level input voltage 1.3
VV
IL(FPWM)
Low-level input voltage 0.4I
FPWM
Input bias current V
EN
= GND or V
BAT
, V
FPWM
= GND or V
BAT
0.01 0.1 µA
ENABLE
V
IH(EN)
High-level input voltage 1.3
VV
IL(EN)
Low-level input voltage 0.4I
EN
Input bias current V
EN
= GND or V
BAT
, V
FPWM
= GND or V
BAT
0.01 0.1 µA
POWER SWITCH
V
IN
= V
GS
= 3.6 V 530 790Internal P-channel MOSFETon-resistance
V
IN
= V
GS
= 2.5 V 670 930R
DS(on)
mΩV
IN
= V
GS
= 3.6 V 430 620Internal N-channel MOSFETon-resistance
V
IN
= V
GS
= 2.5 V 530 740I
LEAK(P)
P-channel leakage current V
DS
= 6.0 V 0.1 1.0
µAI
LEAK(N)
N-channel leakage current V
DS
= 6.0 V 0.1 1.0I
(LIM)
P-channel current limit 2.5 V < V
BAT
< 4.2 V 380 480 670 mA
OSCILLATOR
f
SW
Switching frequency 0.65 1.00 1.50 MHz
OUTPUT
V
REF
Reference voltage bq25015 0.5FeedbackV
FB
bq25015 3.6 V ≤V
BAT
≤4.2 V, 0 mA ≤I
OUT
≤150 mA –3% +3%voltage
(2)
VAdjustable output
bq25015 0.7 V
BATvoltage rangeV
DC-DC
Fixed output
bq25017 3.6 V ≤V
BAT
≤4.2 V, 0 mA ≤I
OUT
≤150 mA 1.746 1.8 1.854voltage
(2) For output voltages ≤1.2 V a 22-µF output capacitor value is required to achieve a maximum output voltage accuracy of +3% whileoperating in power save mode (PFM).
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TYPICAL OPERATING CHARACTERISTICS
V =1.8V,
FPWM=High
O
50
55
60
65
70
75
80
85
90
95
100
0 50 100 150 200 250 300
I -LoadCurrent-mA
L
Efficiency-%
Vbat=2.7V
Vbat=3.7V
Vbat=4.2V
V =1.8V,
FPWM=Low
O
50
55
60
65
70
75
80
85
90
95
100
0 50 100 150 200 250 300
I -LoadCurrent-mA
L
Efficiency-%
Vbat=2.7V
Vbat=3.7V
Vbat=4.2V
V =1.5V,
FPWM=High
O
50
55
60
65
70
75
80
85
90
95
100
0 50 100 150 200 250 300
I -LoadCurrent-mA
L
Efficiency-%
Vbat=2.7V
Vbat=4.2V
Vbat=3.7V
50
55
60
65
70
75
80
85
90
95
100
0 50 100 150 200 250 300
I -LoadCurrent-mA
L
Efficiency-%
Vbat=2.7V
Vbat=3.7V
Vbat=4.2V
V =1.5V,
FPWM=Low
O
bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
EFFICIENCY EFFICIENCYvs vsLOAD CURRENT LOAD CURRENT
Figure 1. Figure 2.
EFFICIENCY EFFICIENCYvs vsLOAD CURRENT LOAD CURRENT
Figure 3. Figure 4.
SHORT CIRCUIT INDUCTOR CURRENT
Figure 5.
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bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
TYPICAL OPERATING CHARACTERISTICS (continued)
LOAD TRANSIENT, 3 mA TO 300 mA, LOAD TRANSIENT, 3 mA TO 300 mA,Vbat = 3.7 V, Vo = 1.8 V Vbat = 3.7 V, Vo = 1.8 VFPWM = HIGH, FORCE PWM FPWM = LOW, POWER SAVE MODE
Figure 6. Figure 7.
LIGHT LOAD WAVEFORM, Vbat = 3.7 V, Vo = 1.8 V LIGHT LOAD WAVEFORM, Vbat = 3.7 V, Vo = 1.8 VLOAD CURRENT = 36 mA, LOAD CURRENT = 36 mA,FPWM = HIGH, FORCE PWM FPWM = LOW, FORCE PWM
Figure 8. Figure 9.
START-UP AND SHUT-DOWN, Vbat = 3.7 V, Vo = 1.8 V START-UP AND SHUT-DOWN, Vbat = 3.7 V, Vo = 1.8 VLOAD CURRENT = 300 mA, LOAD CURRENT = 300 mA,FPWM = HIGH, FORCE PWM FPWM = LOW, POWER SAVE MODE
Figure 10. Figure 11.
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DEVICE INFORMATION
SW
VSS
BAT/OUT
BAT/OUT
USB
STAT1
STAT2
VSS
bq25015,bq25017
RHLPACKAGE
(TOPVIEW)
FB
VSS
EN
AC
CE
PG
ISET2
ISET1
FPWM
N/C
N/C
N/C
20
1
10 11
2
3
4
5
6
7
8
9
19
18
17
16
15
14
13
12
bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
TERMINAL FUNCTIONS
TERMINAL
I/O DESCRIPTIONNAME NO.
AC 5 I Charge input voltage from AC adapter, connect 10 µF capacitor to groundBAT/OUT 16 I/O Charge current outputBAT/OUT 17 I Battery input to DC-DC converterCE 15 I Charge enable input (active low)EN 4 I Enable input for DC-DC converter; EN=HIGH for device enableFeedback pin for DC-DC converter; connect to voltage divider for bq25015,FB 2 I
or connect to system OUT voltage for bq25017PWM control input for the DC-DC converter. A high on FPWM = forced PWM mode. A low = power saveFPWM 20 I
mode.ISET1 12 I Charge current set point for AC input and precharge and taper set point for both AC and USBISET2 13 I Charge current set point for USB port (High = 500 mA, Low = 100 mA, High-Z = disable USB charge)NC 1, 10, 11 – No connect. These pins must be left floating.PG 14 O Power good status output (active low, open-drain)STAT1 7 O Charge status output 1 (open-drain)STAT2 8 O Charge status output 2 (open-drain)SW 19 O Phase node of the DC/DC converter; connect series inductor and capacitor to groundUSB 6 I Charge input voltage from USB adapter; connect to 10 µF capacitor to groundGround Input. Also note that there is an internal electrical connection between the exposed thermal padand VSS pins of the device. The exposed thermal pad must be connected to the same potential as theVSS 3, 9, 18 –
Vss pin on the printed circuit board. Do not use the thermal pad as the primary ground input for thedevice. All VSS pins must be connected to ground at all times.
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5AC
6USB
+
+
16
BAT/OUT
12
ISET1
13 ISET2
Charge
Control,
Timer
and
Display
Logic
Thermal
Shutdown
Precharge
Recharge
Taper
CHGENABLE
14 PG
7 STAT1
8 STAT2
Term
VI(SET)
VO(REG)
VI(BAT)
VI(ISET)
AC/USB
AC
SenseFET
VI(OUT)
VI(ISET)
SenseFET
SleepVI(BAT)
VI(SLP)
VI(OUT)
VI(OUT)
V(ISET1)
V(ISET1)
V(ISET1)
VO(REG)
9VSS
VI(AC)
500mA/100mA
USBCharge
AC/USB
500mA/100mA
Reference
and
Bias
Deglitch
Deglitch
Deglitch
Suspend
Deglitch
15 CE
VO(REG)
2 FB
VI(FB)
DC−DC
Controller
VCC
4EN
20FPWM
19 SW
17 BAT/OUT
3VSS
18VSS
UDG−04072
bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
FUNCTIONAL BLOCK DIAGRAM
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FUNCTIONAL DESCRIPTIONS
BATTERY CHARGER
bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
The bq2501x supports a precision Li-Ion or Li-Pol charging system suitable for single-cell battery packs and alow-power DC-DC converter for providing power to system processor. See a typical charge profile, applicationcircuit and an operational flow chart in Figure 12 through Figure 14 respectively. Figure 13 is the typicalapplication circuit for a high-current application (300 mA). Here the battery charge current is 500 mA, inputvoltage range of 4.5V – 6.5V.
Figure 12. Typical Charger Profile
Figure 13. Typical Application Circuit
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Vcc > VI(BAT)
checked at all times
VI(BAT)<V(LOWV) Yes
No
t(PRECHG)
Expired? No
Yes
Indicate Fault
Yes
No
Yes
t(CHG)Expired?
No
Indicate Charge−
In−Progress
Regulate
IO(PRECHG)
Indicate Charge−
In−Progress
Regulate Current
or Voltage
No
Reset and Start
t(PRECHG)timer
POR
Yes
Reset all timers,
Start t(CHG) timer
I(TERM)
detection?
No
Yes
VI(BAT) < V(RCH)?
No
VI(BAT)<V(LOWV)
No
Fault Condition
Yes
Yes
Indicate DONE
Turn off charge
Indicate SLEEP
MODE
SLEEP MODE
VI(BAT)<V(LOWV)
Tj < T(SHTDWN)
Tj < T(SHTDWN)
Suspend charge
No
No
Yes
Indicate CHARGE
SUSPEND
I(TAPER)
detection?
t(TAPER)
Expired?
No
No
Yes
Yes No
VI(BAT) > V(RCH)?
Enable I(FAULT)
current
VI(BAT) > V(RCH)?
No
Yes
Yes
Disable I(FAULT)
current
Yes
bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
FUNCTIONAL DESCRIPTIONS (continued)
Figure 14. Operational Flow Chart
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Autononous Power Source Selection
USB MODE
AC MODE
AC > BATTERY
AC < BATTERY
USB > BATTERY
Battery Pre-Conditioning
IO (PRECHG) +V(PRECHG) K(SET)
RSET
(1)
Battery Charge Current
IO (OUT) +V(SET) K(SET)
RSET
(2)
Battery Voltage Regulation
Charge Taper Detection, Termination and Regharge
I(TAPER) +V(TAPER) K(SET)
RSET
(3)
bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
FUNCTIONAL DESCRIPTIONS (continued)
As default, the bq25015/7 attempts to charge the battery from the AC input. If AC input is not present, the USBinput is selected. If both inputs are available, the AC adapter has the priority. Refer to Figure 15 for details.
Figure 15. Power Source Selection
During a charge cycle if the battery voltage is below the V
(LOWV)
threshold, the bq25015/7 applies a prechargecurrent, I
O(PRECHG)
, to the battery. This feature revives deeply discharged cells. The resistor connected betweenthe ISET1 and VSS pins, R
SET
, determines the precharge rate. The V
(PRECHG)
and K
(SET)
parameters arespecified in the specifications table.
The bq25015/7 activates a safety timer, t
(PRECHG)
, during the conditioning phase. If V
(LOWV)
threshold is notreached within the timer period, the bq25015/7 turns off the charger and enunciates FAULT on the STAT1 andSTAT2 pins. Please refer to Timer Fault Recovery section for additional details.
The bq25015/7 offers on-chip current regulation with programmable set point. The resistor connected betweenthe ISET1 and VSS pins, R
SET
, determines the charge rate. The V
(SET)
and K
(SET)
parameters are specified in thespecifications table.
When charging from a USB port, the host controller has the option of selecting either 100 mA or 500 mA chargerate using the ISET2 pin. A low-level signal sets the current at 100 mA and a high-level signal sets the current at500 mA. A high-Z input disables USB charging.
The voltage regulation feedback is through the BAT/OUT pin. This input is tied directly to the positive side of thebattery pack. The bq25015/7 monitors the battery-pack voltage between the BAT/OUT and VSS pins. When thebattery voltage rises to V
O(REG)
threshold, the voltage regulation phase begins and the charging current begins totaper down.
As a safety backup, the bq25015/7 also monitors the charge time in the charge mode. If taper threshold is notdetected within this time period, t
(CHG)
, the bq25015/7 turns off the charger and enunciates FAULT on the STAT1and STAT2 pins. Please refer to section titled Timer Fault Recoverysection for additional details.
The bq25015/7 monitors the charging current during the voltage regulation phase. Once the taper threshold,I
(TAPER)
, is detected the bq25015/7 initiates the taper timer, t
(TAPER)
. Charge is terminated after the timer expires.The resistor connected between the ISET1 and VSS pins, R
SET
, determines the taper detection level. TheV
(TAPER)
and K
(SET)
parameters are specified in the specifications table. Note that this applies to both AC andUSB charging.
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I(TERM) +V(TERM) K(SET)
RSET
(4)
Sleep Mode for Charger
Operation Modes
Status Outputs
PG Output (Power Good)
CE Input (Charge Enable)
bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
FUNCTIONAL DESCRIPTIONS (continued)The bq25015/7 resets the taper timer in the event that the charge current returns above the taper threshold,I
(TAPER)
.
In addition to the taper current detection, the bq25015/7 terminates charge in the event that the charge currentfalls below the I
(TERM)
threshold. This feature allows for quick recognition of a battery removal condition orinsertion of a fully charged battery. Note that taper timer is not activated. The resistor connected between theISET1 and VSS pins, R
SET
, determines the taper detection level. The V
(TERM)
and K
(SET)
parameters arespecified in the specifications table. Note that this applies to both AC and USB charging.
After charge termination, the bq25015/7 restarts the charge once the voltage on the BAT/OUT pin falls below theV
(RCH)
threshold. This feature keeps the battery at full capacity at all times.
The bq25015/7 enters the low-power sleep mode if both AC and USB are removed from the circuit. This featureprevents draining the battery during the absence of V
CC
.
Operational modes of the bq25015/7 are summarized in Table 1 . Operation of DC-DC is not recommendedwhile charger is in precharge mode.
Table 1. Operation Modes
BATTERY VOLTAGE AC or USB ADAPTER STATUS CHARGER STATUS DC-DC STATUS
V
I(BAT)
> V
(LOWV)
Present Fast EN0 V < V
I(BAT)
< V
(LOWV)
Present Precharge ENV
I(BAT)
< V
(UVLO)
Both absent Off Off
The STAT1 and STAT2 open-drain outputs indicate various charger and battery conditions as shown in Table 2 .These status pins can be used to communicate to the host processor. Note that OFF indicates the open-draintransistor is turned off.
Table 2. Status Pins Summary
CHARGE STATE INPUT POWER STATE STAT1 STAT2
Precharge in progress Present ON ONFast charge in progress Present ON OFFCharge done Not reported OFF ONTimer fault Not reported OFF OFFSpeel mode Absent OFF OFF
The open-drain PG output indicates when the AC adapter is present. The output turns ON when a valid voltageis detected. This output is turned off in the sleep mode. The PG pin can be used to drive an LED orcommunicate to the host processor.
The CE digital input is used to enable or disable the charge process. A low-level signal on this pin enables thecharge and a high-level signal disables the charge and places the device into a low-power mode. A high-to-lowtransition on this pin also resets all timers and timer fault conditions. Note that this applies to both AC and USBcharging.
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Thermal Shutdown and Protection
TImer Fault Recovery
DC-DC CONVERTER
Power Save Mode Operation
ISKIP +66 mA )VIN
160 W
(5)
IPEAK +66 mA )VIN
80 W
(6)
bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
The bq25015/7 monitors the junction temperature, T
J
, of the die and suspends charging if T
J
exceeds T
(SHTDWN)
.Charging resumes when T
J
falls below T
(SHTDWN)
by approximately 15°C.
As shown in Figure 14 , bq25015/7 provides a recovery method to deal with timer fault conditions. The followingsummarizes this method:
Condition 1: Charge voltage above recharge threshold (V
(RCH)
) and timeout fault occurs.
Recovery method: bq25015/7 waits for the battery voltage to fall below the recharge threshold. This couldhappen as a result of a load on the battery, self-discharge or battery removal. Once the battery falls below therecharge threshold, the bq25015/7 clears the fault and starts a new charge cycle. A POR or CE toggle alsoclears the fault.
Condition 2: Charge voltage below recharge threshold (V
(RCH)
) and timeout fault occurs.
Recovery method: Under this scenario, the bq25015/7 applies the I
(FAULT)
current. This small current is used todetect a battery removal condition and remains on as long as the battery voltage stays below the rechargethreshold. If the battery voltage goes above the recharge threshold, then the bq25015/7 disables the I
(FAULT)current and executes the recovery method described for Condition 1. Once the battery falls below the rechargethreshold, the bq25015/7 clears the fault and starts a new charge cycle. A POR or CE toggle also clears thefault.
The bq25015/7 provides a low quiescent-current synchronous DC-DC converter. The internally compensatedconverter is designed to operate over the entire voltage range of a single-cell Li-Ion or Li-Pol battery. Undernominal load current, the device operates with a fixed PWM switching frequency of typically 1 MHz. At light loadcurrents, the device enters the power save mode of operation; the switching frequency is reduced and thequiescent current drawn by the converter from the BAT/OUT pin is typically only 15 µA.
During PWM operation the converter uses a unique fast-response voltage mode controller scheme with inputvoltage feedforward to achieve good line and load regulation allowing the use of small ceramic input and outputcapacitors. At the beginning of each clock cycle initiated by the clock signal (S), the P-channnel MOSFET switchis turned on and the inductor current ramps up until the comparator trips and the control logic turns off theswitch. The current limit comparator also turns off the switch in case the current limit of the P-channel switch isexceeded. After the dead time preventing current shoot through the N-channnel MOSFET rectifier is turned onand the inductor current ramps down. The next cycle is initiated by the clock signal again turning off theN-channel rectifier and turning on the on the P-channel switch. The g
M
amplifier as well as the input voltagedetermines the rise time of the saw-tooth generator and therefore any change in input voltage or output voltagedirectly controls the duty cycle of the converter giving a very good line and load transient regulation.
As the load current decreases the converter enters the power save mode operation. During power save modethe converter operates with reduced switching frequency in PFM mode and with a minimum quiescent current tomaintain high efficiency.
Two conditions allow the converter to enter the power save mode operation. One is the detection ofdiscontinuous conduction mode. The other is when the peak switch current in the P-channel switch goes belowthe skip current limit. The typical skip current limit can be calculated as:
During the power save mode the output voltage is monitored with the comparator by the thresholds comp lowand comp high. As the output voltage falls below the comp low threshold (set to typically 0.8% above VOUTnominal) the P-channel switch turns on. The P-channel switch is turned off as the peak switch current isreached. The typical peak switch current can be calculated as:
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PFM Mode at Light Load Comparator High
Comparator Low
Comparator Low 2
PWM Mode at Medium to Full Load
1.6%
0.8%
VOUT
Dynamic Voltage Positioning
Soft-Start
100% Duty Cycle Low Dropout Operation
VIN(min) +VOUT(max) )IOUT(max) ǒRDS(on)MAX )RLǓ
(7)
bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
The N-channel rectifier is turned on and the inductor current ramps down. As the inductor current approacheszero the N-channel rectifier is turned off and the P-channel switch is turned on again starting the next pulse. Theconverter continues these pulses until the comp high threshold (set to typically 1.6% above VOUT nominal) isreached. The converter enters a sleep mode, reducing the quiescent current to a minimum. The converterwakes up again as the output voltage falls below the comp low threshold again. This control method reduces thequiescent current to typically to 15 µA and the switching frequency to a minimum, thereby achieving highconverter efficiency. Setting the skip current thresholds to typically 0.8% and 1.6% above the nominal outputvoltage at light load current results in a dynamic output voltage achieving lower absolute voltage drops duringheavy load transient changes. This allows the converter to operate with a small output capacitor of only 10 µFand still have a low absolute voltage drop during heavy load transient changes. Refer to Figure 16 as well fordetailed operation of the power save mode.
Figure 16. Power Save Mode Thresholds and Dynamic Voltage Positioning
The converter enters the fixed-frequency PWM mode again as soon as the output voltage drops below the complow 2 threshold.
As described in the power save mode operation section and as detailed in Figure 16 , the output voltage istypically 0.8% above the nominal output voltage at light load currents as the device is in power save mode. Thisgives additional headroom for the voltage drop during a load transient from light load to full load. During a loadtransient from full load to light load the voltage overshoot is also minimized due to active regulation turning onthe N-Channel rectifier switch.
The bq25015/7 has an internal soft-start circuit that limits the inrush current during startup. This soft-start isimplemented as a digital circuit increasing the switch current in steps of typically 60 mA, 120 mA, 240 mA andthen the typical switch current limit of 480 mA. Therefore the starup time depends mainly on the output capacitorand load current. Typical startup time with a 10-µF output capacitor and a 100-mA load current is 1.6 ms.
The bq2501 offers a low input-to-output voltage difference while still maintaining operation with the use of the100% duty cycle mode. In this mode the P-channel switch is constantly turned on. This is particularly useful inbattery-powered applications to achieve longest operation time by taking full advantage of the whole batteryvoltage range. The minimum input voltage to maintain regulation depends on the load current and output voltageand can be calculated as:
where
I
OUT(max)
= maximum output current plus indicator ripple currentR
DS(on)MAX
= maximum P-channel switch R
DS(on)R
L
= DC resistance of the inductorV
OUT(max)
= nominal output voltage plus maximum output voltage tolerance
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Enable
Undervoltage Lockout
Forced PWM Mode
bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
Pulling the enable pin (EN) low forces the DC-DC converter into shutdown mode, with a shutdown quiescentcurrent of typically 0.1 µA. In this mode the P-channel switch and N-channel rectifier are turned off, the internalresistor feedback divider is disconnected, and the converter enters shutdown mode. If an output voltage, whichcould be an external voltage source or a super capacitor, is present during shut down, the reverse leakagecurrent is specified under electrical characteristics. For proper operation the EN pin must be terminated andshould not be left floating.
Pulling the EN pin high starts up the DC-DC converter with the soft-start as previously described.
The undervoltage lockout circuit prevents the converter from turning on the switch or rectifier MOSFET at lowinput voltages or under undefined conditions.
The FPWM input pin allows the host system to override the power save mode by driving the FPWM pin high. Inthis state, the DC-DC converter remains in the PWM mode of operation with continuous current conductionregardless of the load conditions. Tying the FPWM pin low allows the device to enter power save modeautomatically as previously described.
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APPLICATION INFORMATION
ADJUSTABLE OUTPUT VOLTAGE VERSION (bq25015)
VOUT +0.5 V ǒ1)R1
R2Ǔ
(8)
C1 +1
2p 10 kHz R1
(9)
C2 +R1
R2 C1
(10)
FIXED OUTPUT VOLTAGE VERSION (bq25017)
INPUT CAPACITOR SELECTION
CHARGER OUTPUT CAPACITOR (DC-DC CONVERTER INPUT CAPACITOR) SELECTION
bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
When the adjustable output voltage version is being used (bq25015), the output is set by the external resistordivider, as shown in Figure 13 .
The output voltage can be calculated as:
where
R1 + R2 ≤1 M ΩInternal reference voltage V
REF(typ)
= 0.5 V
C1 and C2 should be selected as:
where
R1 = upper resistor of the voltage dividerC1 = upper capacitor of the voltage divider
For C1, a value should be chosen that comes closest to the calculated result.
where
R2 = lower resistor of the voltage dividerC2 = lower capacitor of the voltage divider
For C2, the selected capacitor value should always be selected larger than the calculated result. For example, inFigure 13 , a 100-pF capacitor is selected for a calculated result of C2 = 86.17 pF.
If quiescent current is not a key design parameter, C1 and C2 can be omitted and a low-impedance feedbackdivider must be used with R1 + R2 < 100 k Ω. This design reduces the noise available on the feedback pin (FB)as well, but increases the overall quiescent current during operation.
When a fixed output voltage version of the device is being used, no external resistive divider network isnecessary. In this case, the output of the inductor should be connected directly the FB pin, as shown inFigure 13 .
In most applications, all that is needed is a high-frequency decoupling capacitor. A 0.1-µF ceramic, placed inclose proximity to AC/USB and VSS pins, works fine. The bq2501x is designed to work with both regulated andunregulated external DC supplies. If a non-regulated supply is chosen, the supply unit should have enoughcapacitance to hold up the supply voltage to the minimum required input voltage at maximum load. If not, morecapacitance has to be added to the input of the charger.
Because the buck converter has a pulsating input current, a low ESR input capacitor is required. This results inthe best input voltage filtering and minimizes the interference with other circuits caused by high input voltagespikes. Also, the input capacitor must be sufficiently large to stabilize the input voltage during heavy loadtransients.
For good input voltage filtering, usually a 4.7-µF input capacitor is sufficient and can be increased without anylimit for better input voltage filtering.
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IRMS +IOUT(max) VOUT
VIN ǒ1*VOUT
VIN Ǔ
Ǹ
(11)
IRMS +IOUT
2
(12)
DC-DC CONVERTER OUTPUT CAPACITOR SELECTION
IRMS(Cout) +VOUT ǒ1*VOUT
VIN Ǔ
L f 1
2 3
Ǹ
(13)
DVOUT +VOUT ǒ1*VOUT
VIN Ǔ
L f ǒ1
8 COUT f)ESRǓ
(14)
bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
APPLICATION INFORMATION (continued)If ceramic output capacitors are used, the capacitor RMS ripple current rating ensures the applicationrequirements. For completeness, the RMS ripple current is calculated as:
The worst case RMS ripple current occurs at D=0.5 and is calculated as:
Ceramic capacitors perform well because of the low ESR value, and they are less sensitive to voltage transientsand spikes compared to tantalum capacitors. The input capacitor should be placed as close as possible to theBAT/OUT pin of the device for best performance. Refer to Table 1 for recommended components.
The advanced fast response voltage mode control scheme of the bq25015/7 allows the use of tiny ceramiccapacitors without having large output voltage under and overshoots during heavy load transients. Ceramiccapacitors having low ESR values have the lowest output voltage ripple and are therefore recommended. Ifrequired, tantalum capacitors may be used as well (refer to Table 1 for recommended components). If ceramicoutput capacitors are used, the capacitor RMS ripple current rating always meets the application requirements.For completeness, the RMS ripple current is calculated as:
At nominal load current the device operates in PWM mode and the overall output voltage ripple is the sum of thevoltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and dischargingthe output capacitor:
where the output voltage ripple occurs at the highest input voltage V
IN
.
At light load currents the device operates in power save mode, and the output voltage ripple is independent ofthe output capacitor value. The output voltage ripple is set by the internal comparator thresholds. The typicaloutput voltage ripple is 1% of the output voltage V
OUT
.
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DC-DC CONVERTER OUTPUT INDUCTOR SELECTION
DIL+VOUT ǒ1*VOUT
VIN Ǔ
L f
(15)
CHARGING WHILE UNDER LOAD
THERMAL CONSIDERATIONS
qJA +TJ*TA
P
(16)
bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
APPLICATION INFORMATION (continued)
For high efficiencies, the inductor should have a low DC resistance to minimize conduction losses. Although theinductor core material has less effect on efficiency than its DC resistance, an appropriate inductor core materialmust be used. The inductor value determines the inductor ripple current. The larger the inductor value, thesmaller the inductor ripple current, and the lower the conduction losses of the converter. On the other hand,larger inductor values causes a slower load transient response. Usually the inductor ripple current, as calculatedbelow, should be around 30% of the average output current.
In order to avoid saturation of the inductor, the inductor should be rated at least for the maximum output currentof the converter plus the inductor ripple current that is calculated as:
where
f= switching frequency (1 MHz typical, 650 kHz minimal)L = inductor value∆I
L
= peak-to-peak inductor ripple currentI
L(max)
= maximum inductor current
The highest inductor current occurs at maximum V
IN
. A more conservative approach is to select the inductorcurrent rating just for the maximum switch current of 350 mA. The internal compensator is designed in such away that the optimized resonant frequency of the output inductor and capacitor is approximately 16kHz. Therecommended inductor and capacitor values for various output current are given in Table 3 .
Table 3. Recommended Inductor and Capacitor Values
TYPICAL OUTPUT CURRENT INDUCTOR VALUE CAPACITOR VALUE APPLICATION(mA) (µH) (µF)
30 100 1 For low current, smallest capacitor60 47 2.2 For low current, small capacitor80 33 3.3 For medium current, small capacitor150 22 4.7 For medium current300 10 10 For highest current, smallest inductor
The bq25015/7 are designed such that maximum charging safety and efficiency can be obtained by suspendingnormal operation while the device is actively charging the battery. In this mode of operation, the timeout functionprevents a defective battery from being charged indefinitely. If charging does not terminate normally within fivehours, the device annunciates a fault condition on the STAT1 and STAT2 pins as indicated in Table 2 .
If a load is applied to the device while it is being used to charge a battery, a false fault condition may result dueto a slower rate of charge being applied to the battery. For this reason it is recommended that the load bedisconnected from the bq25015/7 while it is charging a battery.
The bq25015/7 devices are packaged in a thermally enhanced MLP package. The package includes a thermalpad to provide an effective thermal contact between the device and the printed circuit board (PCB). Full PCBdesign guidelines for this package are provided in the application note QFN/SON PCB Attachment (SLUA271).The most common measure of package thermal performance is thermal impedance ( θ
JA
) measured (ormodeled) from the chip junction to the air surrounding the package surface (ambient). The mathematicalexpression for θ
JA
is:
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P+ǒVIN *VIN(BAT)Ǔ IOUT(OUT)
(17)
PCB LAYOUT CONSIDERATIONS
bq25015
bq25017
SLUS721A – DECEMBER 2006 – REVISED MARCH 2007
where
T
J
= chip junction temperatureT
A
= ambient temperatureP = device power dissipation
Factors that can greatly influence the measurement and calculation of θ
JA
include:•Whether or not the device is board mounted•Trace size, composition, thickness, and geometry•Orientation of the device (horizontal or vertical)•Volume of the ambient air surrounding the device under test and airflow•Whether other surfaces are in close proximity to the device being tested
The device power dissipation (P) is a function of the charge rate and the voltage drop across the internal powerFET. It can be calculated from the following equation:
Due to the charge profile of Li-xx batteries, the maximum power dissipation is typically seen at the beginning ofthe charge cycle when the battery voltage is at its lowest.
For all switching power supplies, the layout is an important step in the design, especially at high peak currentsand switching frequencies. If the layout is not carefully done the regulator could exhibit stability problems as wellas EMI problems. With this in mind, one should lay out the PCB using wide, short traces for the main currentpaths. The input capacitor, as well as the inductor and output capacitors, should be placed as close as possibleto the IC pins.
The feedback resistor network must be routed away from the inductor and switch node to minimize noise andmagnetic interference. To further minimize noise from coupling into the feedback network and feedback pin, theground plane or ground traces must be used for shielding. This becomes very important especially at highswitching frequencies.
The following are some additional guidelines that should be observed:•To obtain optimal performance, the decoupling capacitor from AC to VSS (and from USB to VSS) and theoutput filter capacitors from BAT/OUT to VSS should be placed as close as possible to the bq25015/7, withshort trace runs to both signal and VSS pins.•All low-current VSS connections should be kept separate from the high-current charge or discharge pathsfrom the battery. Use a single-point ground technique incorporating both the small signal ground path and thepower ground path.•The BAT/OUT pin provides voltage feedback to the IC for the charging function and should be connectedwith its trace as close to the battery pack as possible.•The high current charge paths into AC and USB and from the BAT/OUT and SW pins must be sizedappropriately for the maximum charge or output current in order to avoid voltage drops in these traces.•The bq25015/7 deviecs are packaged in a thermally enhanced MLP package. The package includes athermal pad to provide an effective thermal contact between the IC and the printed circuit board (PCB). FullPCB design guidelines for this package are provided in the application note QFN/SON PCB Attachment(SLUA271).
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PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
BQ25015RHLR ACTIVE QFN RHL 20 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
BQ25015RHLRG4 ACTIVE QFN RHL 20 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
BQ25015RHLT ACTIVE QFN RHL 20 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
BQ25015RHLTG4 ACTIVE QFN RHL 20 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
BQ25017RHLR ACTIVE QFN RHL 20 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
BQ25017RHLRG4 ACTIVE QFN RHL 20 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
BQ25017RHLT ACTIVE QFN RHL 20 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
BQ25017RHLTG4 ACTIVE QFN RHL 20 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 7-May-2007
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
BQ25015RHLR QFN RHL 20 3000 330.0 12.4 3.8 4.8 1.6 8.0 12.0 Q1
BQ25015RHLT QFN RHL 20 250 180.0 12.4 3.8 4.8 1.6 8.0 12.0 Q1
BQ25017RHLR QFN RHL 20 3000 330.0 12.4 3.8 4.8 1.6 8.0 12.0 Q1
BQ25017RHLT QFN RHL 20 250 180.0 12.4 3.8 4.8 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
BQ25015RHLR QFN RHL 20 3000 367.0 367.0 35.0
BQ25015RHLT QFN RHL 20 250 210.0 185.0 35.0
BQ25017RHLR QFN RHL 20 3000 367.0 367.0 35.0
BQ25017RHLT QFN RHL 20 250 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
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