DS04-27401-8Ea
FUJITSU MICROELECTRONICS
DATA SHEET
Copyright©2003-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2006.5
ASSP
BIPOLAR
Power Supply Monitor
with Watch-Dog Timer
MB3773
■DESCRIPTION
MB3773 generates the reset signal to protect an arbitrary system when the power-supply voltage momentarily is
intercept ed or decreas ed. It is IC for the power-supply vo ltage watch and “Power on reset” i s generated at the
nor mal retur n of the power supp ly. MB377 3 sends the mi croprocesso r the reset signal when decreasin g more
than the voltage, whic h the power suppl y of the sys tem specified , and the com puter data is protected fro m an
accidental deletion.
In addition, the watch-dog timer for the operation diagnosis of the system is built into , and various microprocessor
systems can provide the fail-safe functio n. If MB377 3 does no t receive the clock pulse from the proc essor for a
specified period, MB3773 generates the reset signal.
■FEATURES
• Precision voltage detection (VS = 4.2 V ± 2.5 %)
• Detection threshold voltage has hysteresis function
• Low voltage output for reset signal (VCC = 0.8 V Typ)
• Precision reference voltage output (VR = 1.245 V ± 1.5%)
• With built-in watch-dog timer of edge trigger input.
• External parts are few.(1 piece in capacity)
• The reset signal outputs the positive and negative both theories reason.
• One type of package (SOP-8pin : 1 type)
■APPLICATION
• Industrial Equipment
• Arcade Amusement etc.
MB3773
2
■PIN ASSIGNMENT
C T
RESET
CK
GND
RESET
V S
V REF
V CC
1
2
3
4
8
7
6
5
(TOP VIEW)
(FPT-8P-M01)
MB3773
3
■BLO C K DIAGRAM
CT
+
_
+
_
82
7
3
1
4
5
GND
RESET
VS
VCC
R
S
Q
:= 1.24 V
:= 40 kΩ
:= 1.24 V
:= 10 µA
:= 1.2 µA
:= 100
kΩ
Watch-
Dog
Timer
P.G
+
_
Reference Voltage Generator +
_
Reference AMP
VREF
6
COMP.O
RESET
:= 10 µA
Inhibit
CK
COMP.S
MB3773
4
■FUNCTIONAL DESCRIPTIONS
Comp.S is comparator including hysteresis. it compare the reference voltage and the voltage of Vs, so that when
the voltage of Vs terminal falls below approximately 1.23 V, reset signal outputs.
Instantaneous breaks or drops in the power can be detected as abnormal conditions by the MB3773 within a
2 µs interval.
Howe ver because momentary breaks or drops of this duration do not cause prob lems in actual systems in some
cases, a delayed trigger function can be created by connecting capacitors to the Vs terminal.
Comp.O is comparator for turning on/off the output and, compare the voltage of the CT terminal and the threshold
voltage. Because the RESET/RESET outputs have built-in pull-up circuit, there is no need to connect to e xternal
pull-up resistor when connected to a high impedance load such as CMOS logic IC.
(It corresponds to 500 kΩ at Vcc = 5 V.) when the voltage of the CK terminal changes from the “high” level into
the “Low” level, pulse generator is sent to the watch-dog timer by generating the pulse momentarily at the time
of drop from the threshold level.
When power-supply voltages fall more than detecting voltages, the watch-dog timer becomes an interdiction.
The Reference amplifier is an op-amp to output the reference voltage.
If the comparator is put up outside, two or more power-supply voltage monitor and overvoltage monitor can be
done.
If it uses a comparator of the open-collector output, and the output of the comparator is connected with the Vs
terminal of MB3773 without the pull-up resistor, it is possible to voltage monitor with reset-hold time.
MB3773
5
RESET
VCC
VSH
VSL
0.8 V
CK
CT
TCK
TPR TWD
TWR TPR
(1) (2) (3)(4)(5) (5) (6)(7) (8)(9) (10) (11) (12)
• MB3773 Basic Operation
VCC
RESET
RESET
CK
Logic Circuit TPR (ms) := 1000 · CT (µF)
TWD (ms) := 100 · CT (µF)
TWR (ms) := 20 · CT (µF)
Examp le : CT = 0.1 µF
TRR (ms) := 100 (ms)
TWD (ms) := 10 (ms)
TWR (ms) := 2 (ms)
RESET
RESET
CK
GND
CT
VCC
MB3773
6
■OPERATION SEQ UE NCE
(1) When Vcc rises to about 0.8 V, RESET goes “Low” and RESET goes “High”.
The pull-up current of approximately 1 µA (Vcc = 0.8 V) is output from RESET.
(2) When Vcc rises to VSH ( := 4.3V) , the charge with CT starts.
At this time, the output is being reset.
(3) When CT beg ins chargi ng , RESET goes “High” and RESET goes “Low”.
After TPR reset of the output is released.
Reset hold time: TPR (ms) := 1000 × CT (µF)
After releasing reset, the discharge of CT starts, and watch-dog timer operation starts.
TPR is not influenced by the CK input.
(4) C changes from the discharge into the charge if the clock (Negative edge) is input to the CK terminal
while discharging CT.
(5) C changes from the charge into the discharge when the voltage of CT reaches a constant
threshold ( := 1.4 V) .
(4) and (5) are repeated while a normal clock is input by the logic system.
(6) When the clock is cut off, gets, and the voltage of CT falls on threshold ( := 0.4 V) of reset on, RESET goes
“Low” and RESET goes “High”.
Discharge time of CT until reset is output: TWD is watch-dog timer monitoring time.
TWD (ms) := 100 × CT (µF)
Because the charging time of CT is added at accurate time from stop of the clock and getting to the output
of reset of the clock, TWD becomes maximum TWD + TWR by minimum TWD.
(7) Reset time in operating watch-dog timer:TWR is charging time where the voltage of CT goes up to off
threshold ( := 1.4 V) for reset.
TWR (m s) := 20 × CT (µF)
Reset of the output is released after CT reaches an off threshold for reset, and CT starts the dis char ge,
after that if the clock is normally input, operation repeats (4) and (5) , when the clock is cut off, operation
repeats (6) and (7) .
(8) When Vcc falls on VSL ( := 4.2 V) , reset is output. CT is rapidly discharged of at the same time.
(9) When Vcc goes up to VSH, the charge with CT is started.
When Vcc is momentarily low,
After falling VSL or less Vcc, the time to going up is the standard value of the Vcc input pulse width in VSH or
more.
After the charge of CT is discharged, the charge is started if it is TPI or more.
(10) Reset of the output is released after TPR, after V cc be com es VSH or more, and the watch-dog timer starts.
After that, when Vcc becomes VSL or less, (8) to (10) is repeated.
(11) While power supply is off, when Vcc becomes VSL or less, reset is output.
(12) The reset output is maintained until Vcc becomes 0.8 V when Vcc falls on 0 V.
MB3773
7
■ABSOLUTE MAXIMUM RATINGS
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■RECOMMENDED OPERATING CONDITIONS
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
representatives beforehand.
Parameter Symbol Rating Unit
Min Max
Supply voltage VCC − 0.3 + 18 V
Input vo lta ge VS− 0.3 VCC + 0.3 ( ≤ +18) V
VCK − 0.3 + 18 V
RESET, RESET Supply voltage VOH − 0.3 VCC + 0.3 ( ≤ +18) V
Power dissipation (Ta ≤ +85 °C) PD200 mW
Storage temperature TSTG − 55 + 125 °C
Parameter Symbol Value Unit
Min Max
Supply voltage VCC + 3.5 + 16 V
RESET, RESET sink current IOL 020mA
VREF output current IOUT − 200 + 5 µA
Watch clock setting time tWD 0.1 1000 ms
CK Rising/falling time tFC, tRC 100 µs
Terminal capaci tance CT0.001 10 µF
Operating ambient temperature Ta − 40 + 85 °C
MB3773
8
■ELECTORICAL CHARACTERISTICS
(1) DC Characteristics (VCC = 5 V, Ta = + 25 °C)
Parameter Symbol Condition Value
Unit
Min Typ Max
Supply curren t ICC Watch-dog timer operating 600 900 µA
Detection voltage
VSL VCC 4.10 4.20 4.30
V
Ta = − 40 °C to + 85 °C 4.05 4.20 4.35
VSH VCC 4.20 4.30 4.40
Ta = − 40 °C to + 85 °C 4.15 4.30 4.45
Hysteresis width VHYS VCC 50 100 150 mV
Reference voltage VREF 1.227 1.245 1.263 V
Ta = − 40 °C to + 85 °C 1.215 1.245 1.275
Reference voltage change rate ∆VREF1 VCC = 3.5 V to 16 V 310mV
Reference voltage output
loading ch ange rate ∆VREF2 IOUT = − 200 µA to + 5 µA− 5 + 5mV
CK threshold voltage VTH Ta = − 40 °C to + 85 °C 0.8 1.25 2.0 V
CK input current IIH VCK = 5.0 V 01.0
µA
IIL VCK = 0.0 V − 1.0 − 0.1
CT discharge current ICTD Watch-dog timer operating
VCT = 1.0 V 71014µA
High level output voltage VOH1 VS open, IRESET = − 5 µA4.54.9V
VOH2 VS = 0 V, IRESET = − 5 µA4.54.9
Output saturation voltage
VOL1 VS = 0 V, IRESET = 3 mA 0.2 0.4
V
VOL2 VS = 0 V, IRESET = 10 mA 0.3 0.5
VOL3 VS open, IRESET = 3 mA 0.2 0.4
VOL4 VS open, IRESET = 10 mA 0.3 0.5
Output sink current IOL1 VS = 0 V, VRESET = 1.0 V 20 60 mA
IOL2 VS open, VRESET = 1.0 V 20 60
CT charge cur rent ICTU Power on reset operating
VCT = 1.0 V 0.5 1.2 2.5 µA
Min supply voltage for RESET VCCL1 VRESET = 0.4 V,
IRESET = 0.2 mA 0.8 1.2 V
Min supply voltage for RESET VCCL2 VRESET = VCC − 0.1 V,
RL (between pin 2 and GND) =
1 MΩ
0.8 1.2 V
MB3773
9
(2)AC Characteristics (VCC = 5 V, Ta = + 25 °C)
* : Output rising/falling time are measured at 10 % to 90 % of voltage.
Parameter Symbol Condition Value Unit
Min Typ Max
VCC input pulse width TPI VCC 8.0 µs
CK input pulse width TCKW CK 3.0 µs
CK input frequency TCK 20 µs
Watch-dog timer watching time TWD CT = 0.1 µF 5 10 15 ms
Watch-dog timer reset time TWR CT = 0.1 µF123ms
Rising reset hold time TPR CT = 0.1 µF, VCC 50 100 150 ms
Output propagation
delay time from VCC
TPD1 RESET, RL = 2.2 kΩ,
CL = 100 pF 210
µs
TPD2 RESET, RL = 2.2 kΩ,
CL = 100 pF 310
Output rising time* tRRL = 2.2 kΩ,
CL = 100 pF 1.0 1.5
µs
Output falling time* tFRL = 2.2 kΩ,
CL = 100 pF 0.1 0.5
5 V
4 V
or
MB3773
10
■TYPICAL CHARACTERISTIC CURVES
(Continued)
6.0
5.0
4.0
3.0
2.0
1.0
0 1.0 2.0 3.0 4.0 5.0 6.0 7.0
Ta = + 85 °C
Ta = + 25 °C
Ta = − 40 °C
4.50
4.44
4.30
4.20
4.10
4.00
−40 −20 0 +20 +40 +60 +80 +100
V
SH
V
SL
400
300
200
0 2.0 10.0 12.0 14.0 16.04.0 6.0 8.0 18.0
100
C
T
= 0.1µF
Ta = + 85 °C
Ta = − 40 °C
Ta = + 25 °C
400
300
200
100
0 2.0 10.0 12.0 14.0 16.04.0 6.0 8.0 18.0
CT = 0.1µF
Ta = −40 °C
Ta = +25 °C
Ta = +85 °C
500
6.0
5.0
4.0
3.0
2.0
1.0
0 1.0 2.0 3.0 4.0 5.0 6.0 7.0
Ta = −
40 °C,
+
25 °C,
+
85 °C
(RESET, RESET terminal)
Supply current vs. Supply voltage
Supply voltage VCC (V) Supply voltage VCC (V)
Output voltage vs. Supply voltage
(RESET terminal)
Supply voltage VCC (V)
Pull up 2.2 kΩ
Output voltage vs. Supply voltage
(RESET terminal)
Detection voltage (VSH, VSL) vs.
Operating ambient temperature
Operating ambient temperature Ta ( °C)
Output saturation voltage
vs. Output sink current
(RESET terminal)
Output sink current IOL2 (mA)
Output saturation voltage
vs. Out put sink cur rent
(RESET terminal)
Output sin k curr ent IOL8 (mA)
Pull up 2.2 kΩ
Supply current ICC (mA)
Output voltage VRESET (V)
Detection voltage VSH, VSL (V)
Output voltage VRESET (V)
Output saturation voltage VOL2 (mV)
Output sa turation volta ge V OL2 (mV)
0.65
0.75
0.55
0.45
0.35
0.25
0.15
0 4.02.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0
Ta = − 40 °C
Ta = − 40 °C
Ta = + 25 °C
Ta = + 85 °C
C
T
= 0.1 µF
Ta = + 25 °CTa = + 85 °C
MB3773
11
(Continued)
Ta = +25 °C
Ta = +85 °C
Ta = −40 °C
C
T
= 0.1 µF
5.0
4.5
4.0 0−5−10 −15
5.0
4.5
4.0 0−5−10 −15
C
T
= 0.1 µF
Ta = +25 °C
Ta = +85 °C
Ta = −40 °C
1.246
1.244
1.242
1.240
1.238
1.236
1.234
0 3.0 5.0 7.0 9.0 13.011.0 17.0 19.0 21.015.0
Ta = −40 °C
Ta = +25 °C
Ta = +85 °C
CT = 0.1 µF
Ta = +85 °C
1.255
1.250
1.245
1.240
0−40 −80 −120 −160 −200 −240
C
T
= 0.1 µF
Ta = +25 °C
Ta = −40 °C
−20 0 +20−40
1.27
1.25
1.26
1.24
1.23
1.22
1.21
+40 +60 +80 +100 −20 0 +20−40 +40 +60 +80 +100
160
140
120
100
80
60
0
40
CT = 0.1 µF
VCC = 5 V
Reference voltage
vs. Reference current
High level output voltage
vs. High level output current
(RESET terminal)
High level output voltage
vs. High level output current
(RESET terminal)
Reference voltage
vs. Supply voltage
Supply vo ltage VCC (V) Reference current IREF (µA)
Reference voltage vs.
Operat ing ambient temperat ure
Operating ambient temperature Ta ( °C)
Rising reset hold time vs.
Operati ng ambient temperatu re
Operati ng amb ie nt temp era ture Ta ( °C)
High lev el output cu rrent IOH2 (µA) High lev el out put cu rrent IOH8 (µA)
High level output voltage VOH2 (V)
High level output voltage VOH8 (V)
Reference voltage VREF (V)
Reference v oltage VREF (V)
Reference voltag e VREF (V)
Rising reset hold time TPR (ms)
MB3773
12
(Continued)
3
2
1
0−40 −20 +200 +40 +60 +80 +100
C
T
= 0.1 µF
V
CC
= 5 V
−40 −20 +200 +40 +60 +80 +100
16
14
12
10
8
6
4
0
CT = 0.1 µF
VCC = 5 V
10 6
10 5
10 4
10 3
10 2
10 1
10 0
10 −1
10 −2
10 −310 −310 −210 −110 010 110 2
Ta = −40 °C
Ta =
+25 °C, +85 °C
10
−
3
10
−
2
10
−
1
10
0
10
1
10
2
10
2
10
1
10
0
10
−1
10
−2
10
−3
Ta = +25 °C,
+85 °C
Ta =
−40 °C
10
6
10 5
10 4
10 3
10 2
10 1
10 0
10 −1
10 −2
10 −310 −310 −210 −110 010 110 2
Ta = −40 °C
Ta = +25 °C, +85 °C
Rising reset hold time vs.
CT terminal capacitance
Watch-dog timer watching time vs.
Operating ambient temperature
Operating ambient temperature Ta ( °C)
Reset time vs.
Operating ambient temperature
Operating ambient temperature Ta ( °C)
CT terminal capacitance CT (µF)
(At watch-dog timer)
Reset time vs.
CT terminal capacitance
Watch-dog timer watching time
vs.
CT terminal capacitance
CT terminal capacitance CT (µF)
(at watch-dog timer)
CT terminal capacita nce CT (µF)
Reset time TWR (ms)
Watch-dog tim er
watching time TWD (ms)
Rising reset hold time TPR (ms)
Reset time TWR (ms)
Watch-dog timer
watching time TWD (ms)
MB3773
13
■APPLICATION CIRCUIT
EXAMPLE 1: Monitori ng 5V Supply Voltage and Watch-dog Timer
VCC (5V)
MB3773
RESET
RESET
CKGND
Logic circuit
Notes : • Supply voltage is monitored using VS.
• Detection voltage are VSH and VSL.
CT
1
2
3
4
8
7
6
5
EXAMPLE 2: 5V Supply Voltage Monitoring (external fine-tuning type)
VCC (5V)
1
2
3
4
8
7
6
5
MB3773
RESET
RESET
CKGND
Logic circuit
Notes : • Vs detection voltage can be adjusted externally.
• Based on selecting R1 and R2 values that are sufficiently lower than the resistance of the IC’s
internal voltage divider, the detection voltage can be set according to the resistance ratio of
R1 and R2 (Refer to the table below.)
R1
R2
CT
R1 (kΩ)R2 (kΩ) Detection volta ge: VSL (V) Detection voltage: VSH (V)
10 3.9 4.4 4.5
9.1 3.9 4.1 4.2
MB3773
14
EXAMPLE 3: With Forced Reset (with reset hold)
VCC
1
2
3
4
8
7
6
5
MB3773
RESET
RESET
CK GND
Logic circuit
Note : Grounding pin 7 at the time of SW ON sets RESET (pin 8) to Low and RESET (pin 2) to High.
SW
VCC
1
2
3
4
8
7
6
5
MB3773
RESET
RESET
CK GND
Logic circuit
Note : Feeding the signal to terminal RESIN and turning on Tr sets the RESET terminal to Low and
the RESET terminal to High.
10 kΩ
Tr
RESIN
10 kΩ
Cr
CT
(a)
(b)
MB3773
15
EXAMPLE 4: Monitoring Two S upply Voltages (with hysteresis, reset output and NMI)
VCC1 (5 V)
1
2
3
4
8
7
6
5
MB3773 RESET
RESET
CK
GND
Comp. 2
Example : Comp. 1, Comp. 2
: MB4204, MB47393
NMI or port
R6
+
_
+
_
VCC2(12 V)
180 kΩ
R4
30 kΩ
R3
5.1 kΩ
R2
1.2 kΩ
R1
4.7 kΩ
R5
Comp. 1
Notes : • The 5 V supply voltage is monitored by the MB3773.
• The 12 V supply voltage is monitored by the external circuit. Its output is connected to the NMI
terminal and, when voltage drops, Comp. 2 interrupts the logic circuit.
• Use VCC1 ( = 5 V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit shown
above.
• The detection voltage of the VCC2 ( = 12 V) supply voltage is approximately 9.2 V/9.4 V and has
a hysteresis width of approximately 0.2 V.
VCC2 detection voltage and hysteresis width can be found using the following formulas:
→ Detection voltage
→ Hysteresis width VHYS = V2H − V2L
R3 + (R4 // R5)
R4 // R5 × VREF
V2L = R3 + R5
R5 × VREF
(Approximately 9.4 V in the above illustration)
(Approximately 9.2 V in the above illustration)
CT
Logic circuit
V2H =
10 kΩ
MB3773
16
EXAMPLE 5: Monitoring Two Supply Voltages (with hysteresis and reset output)
VCC1 (5 V)
1
2
3
4
8
7
6
5
MB3773
RESET
RESET
CK GND
Comp. 2
Example : Comp. 1, Comp. 2
: MB4204, MB47393
20 kΩ
R6
+
_
+
_
VCC2 (12 V)
180 kΩ
R4
30 kΩ
R3
5.1 kΩ
R2
1.2 kΩ
R1
4.7 kΩ
R5
Comp. 1
Notes : • When either 5 V or 12 V supply voltage decreases below its detection voltage (VSL),
the MB3773 RESET terminal is set to High and the MB3773 RESET terminal is set to Low.
• Use VCC1 ( = 5 V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit shown
above.
• The detection voltage of the VCC2 ( = 12 V) supply voltage is approximately 9.2 V/9.4 V and has a
hysteresis width of approximately 0.2 V. For the formulas for finding hysteresis width and detection
voltage, refer to section 4.
Logic circuit
Diode
CT
MB3773
17
EXAMPLE 6: Monitoring Low voltage and Overvoltage Monitoring (with hysteresis)
VCC (5 V)
1
2
3
4
8
7
6
5
MB3773
RESET
RESET
CK GND
Comp. 2
Example : Comp. 1, Comp. 2
: MB4204, MB47393
20 kΩ
R6
_
+
180 kΩ
R4
30 kΩ
R3
5.6 kΩ
R6
1.2 kΩ
R1
4.7 kΩ
R5
Comp. 1
Notes : • Comp. 1 and Comp. 2 are used to monitor for overvoltage while the MB3773 is used to monitor
for low voltage. Detection voltages V1L/V1H at the time of low voltage are approximately 4.2 V/4.3 V.
Detection voltages V2L/V2H at the time of overvoltage are approximately 6.0 V/6.1 V.
For the formulas for finding hysteresis width and detection voltage, see EXAMPLE 4.
• Use VCC ( = 5 V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit shown
above.
Logic circuit
Diode
RESET
0V1L V1H V2L V2H VCC
+
_
CT
MB3773
18
EXAMPLE 7: Monitoring Supply Voltage Using Delayed Trigger
VCC
1
2
3
4
8
7
6
5
MB3773
RESET
RESET
CK GND
Logic circuit
Note : Adding voltage such as shown in the figure to VCC increases the m inimum input pulse
width by 50 µs (C1 = 100 0 pF).
C1
VCC
5V
4V
CT
MB3773
19
(Continued)
EXAMPLE 8: Stopping Watch-dog Timer (Monitoring only supply voltage)
(a) Using NPN transistor
These are example application circuits in which the MB3773 monitors supply voltage alone without resetting the
microprocessor even if the latter, used in standby mode, stops sending the clock pulse to the MB3773.
• The watch-dog timer is inhibited by clamping the CT terminal voltage to VREF.
The supply voltage is constantly monitored even while the watch-dog timer is inhibited.
For this reason, a reset signal is output at the occurrence of either instantaneous disruption or a sudden drop
to low voltage.
Note that in application examples (a) and (b), the hold signal is inactive when the watch-dog timer is inhibited at
the time of resetting.
If the hold signal is active when tie microprocessor is reset, the solution is to add a gate, as in examples (c)
and (d).
VCC(5 V)
1
2
3
4
8
7
6
5
MB3773
RESET
RESET
CK
GND
Logic circuit
R2=1 kΩ
HALT
R1=1 MΩ
(b) Using PNP transistor
VCC (5 V)
1
2
3
4
8
7
6
5
MB3773
RESET
RESET
CK
GND
Logic circuit
R2=1 kΩ
HALT
R1=51 kΩ
CT
CT
MB3773
20
(Continued)
(c) Using NPN transistor
VCC (5 V)
1
2
3
4
8
7
6
5
CT
MB3773
RESET
RESET
CK
GND
Logic circuit
R2=1 kΩ
HALT
R1=1 MΩ
(d) Using PNP transisto r
VCC (5 V)
1
2
3
4
8
7
6
5
CT
MB3773
RESET
RESET
CK
GND
Logic circuit
R2=1 kΩ
HALT
R1=51 kΩ
MB3773
21
EXAMPLE 9: Reducing Reset Hold Time
VCC( = 5 V)
1
2
3
4
8
7
6
5
CT
MB3773
RESET
RESET
CKGND
Logic circuit
(a) TPR reduction method
VCC ( = 5 V)
1
2
3
4
8
7
6
5
CT
MB3773
RESET
RESET
CKGND
Logic circuit
Notes : • RESET is the only output that can be used.
• Standard TPR, TWD and TWR value can be found using the following formulas.
Formulas:TPR (ms) := 100 × CT (µF)
TWD (ms) := 100 × CT (µF)
TWR (ms) := 16 × CT (µF)
• The above formulas become standard values in determining TPR, TWD and TWR.
Reset hold time is compared below between the reduction circuit and the standard circuit.
(b) Standard usage
CT = 0.1 µFTPR reduction circuit Standard circuit
TPR := 10 ms 100 ms
TWD := 10 ms 10 ms
TWR := 1.6 ms 2.0 ms
MB3773
22
EXAMPLE 10: Circuit for Monitoring Multiple Microprocessor VCC ( = 5 V)
1
2
3
4
8
7
6
5
CT
MB3773
RESET
RESET
CK
GND
Notes : •connects from FF1 and FF2 outputs Q1 and Q2 to the NOR input.
• Depe nding on timi ng, thes e con necti ons may not be nec essar y.
• Examp le : R1 = R2 = 2.2 kΩ
CT = 0.1 µF
RESET
RESET
CK
GND
RESET
RESET
CK
GND
S
D3
CK3
R
Q3
Q3
S
D2
CK2
R
Q2
Q2
S
D1
CK1
R
Q1
Q1
FF3FF2FF1
R2
R1
CK1
Q1
CK2
Q2
CK3
Q3
NOR
Output
Figure 1
Figure 2
***
*: Microprocessor
MB3773
23
Description of Application Circuits
Using one MB3773, this application circuit monitors multiple microprocessor in one system. Signals from each
microprocessor are sent to FF1, FF2 and FF3 clock inputs. Figure 2 shows these timings. Each flip-flop operates
using s ignals se nt from mi crop roces sor as its clock pulse. When even one si gnal st ops, the relevant recei ving
flip-flop stops operating. As a result, cyclical pulses are not generated at output Q3. Since the clock pulse stops
arriving at the CK terminal of the MB3773, the MB3773 generates a reset signal.
Note that output Q3 frequency f will be in the following range, where the clock frequencies of CK1, CK2 and CK3
are f1, f2 and f3 respectively.
where f0 is the lowest frequency among f1, f2 and f3.
1
f0
---- 1
f
---1
f1
---- 1
f2
---- 1
f3
----
++≤≤
MB3773
24
CRT1
0.01 µF10 kΩ30 µs
0.1 µF10 kΩ300 µs
EXAMPLE 11: Circuit for Limiting Upper Clock Input Frequency
Notes : • This is an example application to limit upper frequency fH of clock pulses sent from
the microprocessor.
If the CK cycle sent from the microprocessor exceeds fH, the circuit generates a reset signal.
(The lower frequency has already been set using CT.)
• When a clock pulse such as shown below is sent to terminal CK, a short T2 prevents C2 voltage
from reaching the CK input threshold level ( := 1.25 V), and will cause a reset signal to be output.
The T1 value can be found using the following formula :
Example : Setting C and R allow the upper T1 v alue to be set (Refer to the table below).
VCC (5 V)
1
2
3
4
8
7
6
5
CT
RESET
RESET
CK GND
R2
R1=10 kΩ
C2
Tr1
T1 := 0.3 C2R2
T2
CK waveform T3
C2 voltage T1
where VCC = 5 V, T3 ≥ 3.0 µs, T2 ≥ 20 µs
MB3773
25
■NOTES ON USE
• Take account of common impedance when designing the earth line on a printed wiring board.
• Take measures against static electricity.
- For semiconductors, use antistatic or conductive containers.
- When storing or carrying a printed circuit board after chip mounting, put it in a conductive bag or container.
- The work table, tools and measuring instruments must be grounded.
- The worker must put on a grounding device containing 250 kΩ to 1 MΩ resistors in series.
• Do not apply a negative voltage
- Applying a negative voltage of −0.3 V or less to an LSI may generate a parasitic transistor, resulting in
malfunction.
■ORDERING INFORMATION
■RoHS Compliance Information of Lead (Pb) Free version
The LS I products of Fujits u Microele ctronic s with “E1 ” are c omplian t with RoHS D irective , and has o bser ved
the standard of lead, cadmium, mercury, Hexa valent chromium, polybrominated biphenyls (PBB) , and polybro-
minated diphenyl ethers (PBDE) .
The product that conforms to this standard is added “E1” at the end of the part number.
■MARKING FORMAT (Lead Free version)
Part number Package Remarks
MB3773PF-❏❏❏ 8-pin plastic SOP
(FPT-8P-M01) Conventional version
MB3773PF-❏❏❏E1 8-pin plastic SOP
(FPT-8P-M01) Lead Free versi on
INDEX
3773
E1XXXX
XXX
Lead-Free version
MB3773
26
■LABELING SAMPLE (Lead free version)
2006/03/01
ASSEMBLED IN JAPAN
G
QC PASS
(3N) 1MB123456P-789-GE1
1000
(3N)2 1561190005 107210
1,000
PCS
0605 - Z01A
1000
1/1
1561190005
MB123456P - 789 - GE1
MB123456P - 789 - GE1
MB123456P - 789 - GE1
Pb
Lead-Free version
lead-free mark
JEITA logo JEDEC logo
MB3773
27
■MB3773PF-❏❏❏E1 RECOMMENDED CONDITIONS OF MOISTURE SENSITIVITY LEVEL
[Temperature Profile for FJ Standard IR Reflow]
(1) IR (infrared reflow)
(2) Manual soldering (partial heating method)
Conditions : Temperature 400 °C MAX
Times : 5 s max/pin
Item Condition
Mounting Method IR (infrared reflow) , Manual soldering (partial heating method)
Mounting tim es 2 times
Storage period
Before opening Please use it within two years after
Manufacture.
From opening to the 2nd
reflow Less than 8 days
When the storage period after
opening was exceeded Please processes within 8 days
after baking (125 °C, 24h)
Storage conditions 5 °C to 30 °C, 70%RH or less (the lowest possible humidity)
260 °C
(e)
(d')
(d)
255 °C
170 °C
190 °C
RT (b)
(a)
(c)
to
Note : Temperature : the top of the package body
(a) Temperature Increase gradient : Average 1 °C/s to 4 °C/s
(b) Preliminary heating : Temperature 170 °C to 190 °C, 60s to 180s
(c) Temperature Increase gradient : Average 1 °C/s to 4 °C/s
(d) Actual heating : Temperature 260 °C MAX; 255 °C or more, 10s or less
(d’) : Temperature 230 °C or more, 40s or less
or
Temperature 225 °C or more, 60s or less
or
Temperature 220 °C or more, 80s or less
(e) Cooling : Natural cooling or forced cooling
H rank : 260 °C Max.
MB3773
28
■PACKAGE DIMENSION
8-pin plastic SOP Lead pitch 1.27 mm
Package width
×
package length
5.3 × 6.35 mm
Lead shape Gullwing
Sealing method Plastic mold
Mounting height 2.25 mm MAX
Weight 0.10 g
Code
(Reference) P-SOP8-5.3×6.35-1.27
8-pin plastic SOP
(FPT-8P-M01)
(FPT-8P-M01)
C
2002 FUJITSU LIMITED F08002S-c-6-7
0.13(.005) M
Details of "A" part
7.80±0.405.30±0.30
(.209±.012) (.307±.016)
.250 –.008
+.010
–0.20
+0.25
6.35
INDEX
1.27(.050)
0.10(.004)
14
58
0.47±0.08
(.019±.003)
–0.04
+0.03
0.17
.007 +.001
–.002
"A" 0.25(.010)
(Stand off)
0~8˚
(Mounting height)
2.00 +0.25
–0.15
.079 +.010
–.006
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.10 +0.10
–0.05
–.002
+.004
.004
*1
0.10(.004)
*2
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
Note 1) *1 : These dimensions include resin protrusion.
Note 2) *2 : These dimensions do not include resin protrusion.
Note 3) Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
MB3773
29
MEMO
MB3773
30
MEMO
MB3773
31
MEMO
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku,
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For further information please contact:
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http://www.fujitsu.com/sg/services/micro/semiconductor/
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Shanghai 200002, China
Tel: +86-21-6335-1560 Fax: +86-21-6335-1605
http://cn.fujitsu.com/fmc/
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10/F., World Commerce Centre, 11 Canton Road
Tsimshatsui, Kowloon
Hong Kong
Tel: +852-2377-0226 Fax: +852-2376-3269
http://cn.fujitsu.com/fmc/tw
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS
does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporat-
ing the device based on such information, you must assume any responsibility arising out of such use of the information.
FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use
or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS
or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or
other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result from the use of information contained herein.
The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect
to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in
nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in
weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising
in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current
levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of
the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.
The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
Edited Strategic Business Development Dept.
