December 1995 - Linear Technology

DECEMBER 1995 VOLUME V NUMBER 4

by Jaime Tseng

The LT1160 and LT1162:

Medium Voltage,

N-Channel Bridge

Design Made Easy

IN THIS ISSUE . . .

COVER ARTICLE

The LT

1160 and LT1162:

Medium Voltage, N-Channel

Bridge Design Made Easy

........................................ 1

Jaime Tseng

Editor’s Page ................... 2

Richard Markell

LTC in the News .............. 2

DESIGN FEATURES

The LT1166: Power Output

Stage Automatic Bias

System Control IC............ 3

Dale Eagar

The LT1186: A Simple

Bits-to-Light Converter for

LCD Displays ................... 6

Anthony Bonte

Power Factor Correction,

Part Four: The Brains

Behind the Brawn ......... 10

Dale Eagar

How Do You Slew 200V/

with a 250

A Op Amp?

...................................... 12

George Feliz

DESIGN IDEAS

.................................17–26

(complete list on page 17)

New Device Cameos ....... 27

Design Tools .................. 28

Sales Offices ................. 28

any input condition. When both

inputs are high, both outputs are

actively held low.

Bipolar versus CMOS Drivers

Bipolar technology was chosen for

operation to 60V (absolute maximum)

due to its inherent greater-than-60V

junction-breakdown voltage. This is

particularly important in an N-chan-

nel topside driver, which must operate

above the supply rail. In addition,

bipolar technology provides consis-

tent drive capability, resulting in

transition times that increase moder-

ately with large increases in capacitive

load. The LT1160 switches 1,000pF

loads in 75ns, but for 10,000pF loads,

this only increases to 180ns, making

operation to 100kHz possible with

the largest MOSFETs. Figures 2a

shows a simplified schematic of the

LT1160 output stage; Figure 2b shows

how it delivers progressively more

current as the capacitive load in-

creases. On the other hand, CMOS

drivers’ switching times tend to be

fast at light loads but increase rapidly

at higher capacitive loads, as shown

in Figures 3a and 3b.

Introduction

The new LT1160 is a second-gen-

eration, half-bridge, N-Channel power

MOSFET driver. The LT1160, which

is derived from the LT1158 half-bridge

driver, has an increased voltage han-

dling capability and a higher output

drive current. The LT1162 is a full-

bridge version of the LT1160

Like its predecessor, the LT1160

effectively deals with the many prob-

lems and pitfalls encountered in the

design of high efficiency motor-con-

trol and switching regulator circuits.

This article will discuss these prob-

lems, along with the solutions the

LT1160 offers the bridge designer.

LT1160 Overview

Figure 1 is a block diagram of the

LT1160 (the LT1162 has two circuits

identical to that in Figure 1). New in

the LT1160 are two independent un-

dervoltage-detect circuit blocks that

disable the drivers when either the

supply voltage or the voltage across

the bootstrap capacitor drops below

its undervoltage trip point. Two input

pins control the switching of both

N-channel MOSFETs; both channels

are noninverting drivers. The inter-

nal logic prevents both outputs from

turning “ON” simultaneously under

continued on page 14

, LTC and LT are registered trademarks of Linear Technology Corporation.

Burst Mode, Bits-to-Nits and C-Load are trademarks of Linear Technology Corporation.

LINEAR TECHNOLOGY

Linear Technology Magazine • December 1995

EDITOR’S PAGE

by Richard Markell

On Being Analog in Silicon Valley

Authors can be contacted

at (408) 432-1900

LTC in the News...

Working in Silicon Valley is inter-

esting. The hottest technologies blow

through, virtually overnight. Some-

times the technologies take off, and

sometimes they self-destruct. But we

at LTC need to know what’s coming so

that we can design analog circuitry

that allows the fast-paced digital world

to talk to our linear world. The micro-

processor gurus might dispute it, but

the expertise required to optimize the

transient response of a DC/DC con-

verter is nontrivial. The IC designer

must know a multiplicity of disci-

plines, from transistor-level integrated

circuit simulation to the system-level

ESR requirements of capacitors. We

at LTC pride ourselves on being the

best in the industry at what we do,

whether it’s building applications cir-

cuits for customers, designing IC’s or

taking an order in customer service.

The design of ASICs, multimedia and

networks may be hot today, cold to-

morrow, but analog will always be

with us. We press on, growing at a

good clip, supplying the analog core

to the world of digital designers. We

are always looking for people who are

in love with analog circuit design.

Our feature article highlights the

LT1160 and LT1162 N-channel

MOSFET half- and full-bridge drivers,

with increased maximum operating

voltage (60V abs. max.) and higher

output drive current. Also new to

these topologies is undervoltage lock-

out, which disables the drivers when

either the supply voltage or the volt-

age across the bootstrap capacitor

drops below its trip point. Cross-con-

duction or “shoot-through” has been

completely eliminated. The LT1160

and LT1162 will see use as motor-

control circuits, high current,

high-efficiency switching regulators

and other half- and full-bridge driver

circuitry.

Another “control” device is the new

LT1186 Bits-to-Light converter for

LCD displays. The LT1186 is a com-

panion part to LTC’s LT1182/

LT1183/LT1184 CCFL/LCD contrast

switching regulator family of devices.

The LT1186 adds simple digital con-

trol for CCFL to a fixed frequency,

current mode switching regulator. The

device incorporates a micropower 8-

bit, 50µA full-scale, current output

DAC that provides the “bits-to-

lamp-current” control. The device

communicates in two modes: stan-

dard SPI and pulse mode.

The LT1352 is a new micropower

operational amplifier that can slew

200V/µs and settle to 0.1% in 700ns

for a 10V step. The LT1352 is stable

with any capacitive load and can drive

heavy loads (≤40mA) with low distor-

tion. These specifications are achieved

without compromising other specifi-

cations over the part’s ±2.5V to ±15V

supply range. Another Design Fea-

ture spotlights the LT1166, a power

output stage automatic bias system

control IC. The part is designed to

optimize amplifier output stage bias-

ing (and quiescent current) and to

eliminate the need for temperature

tracking, matching transistors or trim

pots. The device allows automatic bi-

asing of an amplifier’s output stage in

the Class AB operational region.

In this issue we present the fourth

and concluding part of the “Power

Factor Correction” series. Also pro-

vided with this issue is an index of

circuits presented in the first five

years of the Linear Technology Magazine.

This issue also has the usual selec-

tion of Design Ideas, carefully chosen

and tested in our Applications Lab.

Here we have circuits ranging from GTL

terminators to rail-to-rail filters.

Once again Linear Technology

reports another quarter of record

sales and profits. Net sales

for LTC’s first quarter ending

October 1, 1995 were a record

$87,005,000, an increase of 50%

over net sales of $58,082,000 for

the previous year. The company

also reported record net income

for the quarter of $30,520,000 or

$0.39 per share, an increase of

71% over $17,830,000 or $0.24

per share reported for the first

quarter of the last year.

More good news was reported in

Investor’s Business Daily

September 29th issue, which

featured a corporate profile under

their New America section. Bob

Swanson talked about the con-

tinuing need for analog circuitry.

“We cheer the growth of digital, but

when the rubber hits the road, we

live in an analog world and we

don’t see this ever changing.”

In Financial World October 10,

1995 issue Linear Technology

Corporation was included on its

list of “America’s Best 100 Growth

Companies.” LTC was ranked

#22 out of all the companies

considered: #3 for semi-

conductors and # l for analog!

In the “What’s Hot for Product”

category, Electronic Design

October 13, 1995 issue high-

lighted the LTC1410 in a feature

article titled “12-Bit IC ADCs

Relieve Error Budgets.” The

LTC1410 is the fastest 12-bit

Successive Approximation (SAR)

based ADC to date. The part uses

a novel design technique to

achieve excellent power and cost

performance. The LTC1410 joins

LTC’s fast growing line of A to D

and D to A products for high

performance applications.

Linear Technology Magazine • December 1995

The LT1166: Power Output Stage

Automatic Bias System Control IC

1166_1.eps

>4mA

GATE

IN OUTINPUT OUTPUT

SENSE

LT1166

V+

V–

1166_2.eps

–

IS ADJUSTED

SO THAT

V

= 0.0004

WHEN THE OUTPUT

CURRENT IS ZERO

= V

= 20mV

Figure 1. Basic LT1166 circuit configuration Figure 3. LT1166 Voltage-control loop Figure 5. LT1166’s can be easily paralleled

1166_4.eps

MAGICAL

OPERATING

POINT

CROSSOVER

DISTORTION QUIESCENT

POWER

BIAS

Introduction

Class AB amplifiers are popular

because of their “near Class A” per-

formance and their ability to operate

on considerably less quiescent power

than Class A. Class AB amplifiers are

easy to construct, rugged and reli-

able. However there is an aspect of

these amplifiers that can cause per-

plexity, consternation and finally hair

loss—their bias scheme. The problem

is that the very parameter that makes

Class AB so good, namely low quies-

cent current, is poorly controlled. The

LT1166 offers control over the quies-

cent current directly, removing the

necessity of temperature tracking,

matching transistors or trim pots.

Functional Description

The LT1166 (Figure 1) controls the

Class AB output stage by incor-

porating two control loops, the

current-control loop and the voltage-

control loop. The current-control loop

(Figure 2) operates independently of

the voltage loop while keeping the

set bias and the nerves to take the

catastrophic results of misalignment.

The LT1166 removes all excess cross-

over distortion caused by improperly

set quiescent current, while signifi-

cantly reducing the distortion caused

by the effects of nonlinear transcon-

ductance in the output transistors.

Figure 4 shows how the magic point

for a Class AB amplifier is visualized

(keep in mind that the magic point is

temperature sensitive in many de-

signs, leading the designer to

temperature tracking tricks, which

are not needed with the LT1166.)

Makes Random

Transistor Pairs into

Parallelable Modules

The LT1166, combined with

external transistors, implements a

unity-gain buffer with an offset volt-

age of ±50mV. This buffer in turn

becomes a component that can easily

be paralleled to increase the output

power (see Figure 5).

Terra Firma!

California, a place where the

ground is anything but stable, is now

the birthplace of “The Rock,” a virtual

ground with an attitude. The Rock

(detailed in Figure 6) is a 5V, ±0.4%

1166_3.eps

–

3

OUT

by Dale Eagar

product of V1 and V2 constant. The

voltage loop (Figure 3) maintains the

output voltage at the input voltage

level by driving both gates up or down.

The two loops, although mutually in-

dependent, act in harmony to provide

a component insensitive, tempera-

ture insensitive, simple Class AB bias

network.

Crossover Distortion

Adjusting the bias point of a Class

AB amplifier is quite like walking a

tight rope. Quiescent current needs

to be set precisely; if it is adjusted too

low, the amplifier exhibits crossover

distortion, whereas if it is adjusted

too high, the amplifier becomes a very

effective heater. Setting the bias of a

Class AB amplifier is often reserved

for the “Medicine Man,” an individual

with both the smarts to know how to

DESIGN FEATURES

Figure 2. LT1166 Current-control loop

1166_5.eps

IN OUTPUT

LT1166

Figure 4. “Magical” operating point of

Class AB amplifier

Linear Technology Magazine • December 1995

DESIGN FEATURES

low noise virtual ground. The Rock

will source or sink 1A of current with

ease. In this circuit, the current limits

are set to 1.5A for both sourcing and

sinking currents. Changing the val-

ues of R5 and R6 to 0.33Ω increases

the output current by a factor of

three. This circuit, properly built, will

easily withstand an earthquake of

magnitude 8, with unmeasurable

output deviation.

Shaker-Table Driver/

Brute Audio Amplifier

In the event that you don’t live in

California, you might need the circuit

shown in Figures 7a–7c, the 1.8kW

shaker-table driver/audio amplifier.

In Figure 7a, we develop a slice of

power by connecting the LT1166 to

two power MOSFETs, two current

sense resistors and two current

1166_7a.eps

15VA*

12.5VA*

100V

100Ω

7.5k

–12.5VA*

–15VA*

–100V

100Ω

CURRENT LIMIT ±6.8A

*FROM FIG. 7c

IRF9240

0.22

IRF230

0.22

OUT

300W

RMS 

INTO

16Ω

1µF

IN 2

2N3904

2N3906

GATE

LT1166

SENSE

LIM

OUT

LIM

SENSE

100Ω

1166_7B.eps

OUTPUT

0.22

TO

FIG. 7c

0.22

–

1k10k

9.1k

INPUT

±10Vp-p

1800W RMS

INTO 2.6Ω

1250W RMS

INTO 4Ω

625W RMS

INTO 8Ω

EXTENDED POWER

SUPPLY A

= 10

VOLTAGE AMP



POWER SLICES OF FIG. 7A

U1

LT1360

Figure 6. “The Rock,” a 5V,

0.4% tolerance,

1A low noise voltage source

Figure 7b. Paralleling power slices to increase output drive

sources. The power slice shown in

Figure 7a will deliver 300W of sine

wave power into 16Ω when powered

from ±100VDC. The MOSFETs and/

or the sense resistors can be increased

or decreased to get output power in

almost any flavor.

Figure 7b details how six power

slices can be paralleled to put out a

cool, clean 1800W of Richter or 1250W

of rock and roll. The LT1360 amplifier

operates in the extended supply mode

(see “Extending Op Amp Supplies to

Get More Output Voltage,” Linear

Technology, IV:2, pp. 20–22).

Figure 7a.

100V, 6A “power slice”

1166_6.eps

U1

LT1431

12V

R2

R4

R7

100Ω

R1

Q1

IRFZ34

Q2

IRF9Z30

C3

270µF

5V

OUT

R5

1Ω

R6

1Ω

R3

100Ω

C1

1µF

C2

1µF

R8

100Ω

2.5V

78 3 1

U2

LT1166

TOP

DRIVE

TOP

SENSE

TOP

LIM

BOTTOM

LIM

BOTTOM

SENSE

BOTTOM

DRIVE

Linear Technology Magazine • December 1995

1166_9.eps

TRIM R.

POTENTIOMETER

1166_7c.eps

OUTPUT

OF FIG. 7B

LT1004

– 2.5



LT1004

– 2.5



– 15VA*

*TO FIG. 7A

15VA*

15V

R1

390Ω

R2

390Ω



LT1360

C2

3300pF

0.1µF

12.5VA*

– 12.5VA*

U1 OF FIG. 7B

R3

DESIGN FEATURES

Figure 7c. Connection diagram for the

15V floating supply

Figure 8a. Ring-tone generator schematic diagram

1166_8A.eps

0.33µF

11k 10k 10k

0.22

0.22 RING-TONE

OUTPUT

300W/SLICE

POWER SLICES

OF FIGURE 7a

2.5VA*

51k 51k

–2.5VA*

CMOS 555

0.01µF

*TO FIG. 7c

10.15µF

0.047

20Hz

0.01µF

360k

OUT 3

360k

–

LT1078

–

LT1078

TO FIG. 8b

1166_8B.eps

LT1004

– 2.5



LT1004

– 2.5



15VA

–15VA

15V

FROM

FIGURE 8a

15V

12.5VA

–12.5VA

LT1078

0.1µF

LT1004

– 2.5

LT1004

– 2.5

7.5k

3.3k

0.1 

100V

– 2.5VA

2.5VA

Figure 9. Trim pots are no longer required

Conclusion

With the advent of the LT1166,

biasing Class AB amplifiers becomes

trivial. Dependencies on temperature

tracking, component matching and

alignment pots have succumbed to

cool, clean, closed-loop control of

operating points. Suddenly, MOSFETs

look a lot friendlier to the power am-

plifier designer. Suddenly, pots have

bitten the dust.

Finally, Figure 7c shows how to

connect the ±15V floating supply and

also details the PSRR snubber for the

LT1360 (R1, R2, R3 and C2).

Ring-Tone Generation

Building upon an earlier Linear

Technology Magazine article (see

above) we show a power ring-tone

generator. This generator is detailed

in Figures 7a, 8a and 8b. This circuit

starts at 300W (or less if you use

smaller FETs and bigger resistors in

Figure 7a) and can be stacked up to

any desired power level. With this

circuit, you could easily build a ringer

capable of ringing the phones of every

U.S. politician simultaneously (not

that this would do any good).

Figure 8b. Power supply circuitry for

Figure 8a

Linear Technology Magazine • December 1995

The LT1186: A Simple Bits-to-Light

Converter for LCD Displays by Anthony Bonte

Introduction

Many current-generation portable

and handheld instruments use back-

lit liquid crystal displays (LCDs).

Cold-cathode fluorescent lamps

(CCFLs) provide the highest available

efficiency for backlighting the dis-

play. These lamps require high voltage

AC to operate, mandating an efficient

high voltage DC/AC converter. In ad-

dition to good efficiency, the converter

should deliver the lamp drive in the

form of a sine wave. The sine wave

excitation helps to minimize RF emis-

sions and also provides optimal

current-to-light conversion in the

lamp. The circuit should also permit

lamp intensity control from zero to

full brightness with no hysteresis or

“pop-on.”

Manufacturers offer an array of

monochrome and color displays.

These displays vary in size, operating

lamp current, lamp-voltage range and

power consumption. The small size

and battery-powered operation asso-

ciated with LCD-equipped apparatus

dictate low component count and high

efficiency. Size constraints place limi-

tations on circuit architecture, and

long battery life is a priority. All com-

ponents, including pc board and

hardware, usually must fit within the

LCD enclosure, with a height restric-

tion of 5mm–10mm.

Handheld instruments are gener-

ally characterized by dedicated

functionality and reduced processing

power in comparison with notebook

or laptop computers. These portable

systems often use general-purpose,

low cost microcontrollers such as the

Intel 80C51 or Motorola 68HC11.

These microcontrollers are popular

because of their versatile I/O capabil-

ity. A simple interface that allows the

microcontroller to easily control the

operating lamp current and display

brightness is required. To address

the requirements of these portable

instruments, Linear Technology

introduces the LT1186 DAC program-

mable CCFL switching regulator.

BAT

8V TO 28V

16

15

14

13

12

11

10

CCFL



DIO

CCFL V



AGND

SHDN

CLK

CCFL V



BULB

BAT

ROYER



OUT



OUT

CCFL

PGND

LT1186

LAMP

UP TO 6mA

10 6

R1

750Ω

L2

100µH

321 5

C7, 1µF

C1*

0.068µF

C5

1000pF

R2

220k

R3

100k

C3A

2.2µF

35V

C4

2.2µF

TO MPU

FROM MPU

IN

3.3V

OR 5V

1186_1.eps

C3B

2.2µF

35V

C2

27pF

3kV

Q2* Q1*

SHUTDOWN

ALUMINUM ELECTROLYTIC IS RECOMMENDED FOR C3A AND C3B. 

MAKE C3B ESR ≥ 0.5Ω TO PREVENT DAMAGE TO THE LT1186 HIGH-SIDE 

SENSE RESISTOR DUE TO SURGE CURRENTS AT TURN-ON

C1 MUST BE A LOW LOSS CAPACITOR, C1 = WIMA MKP-20

Q1, Q2 = ZETEX ZTX849 OR ROHM 2SC5001



0µA TO 50µA I

CCFL

CURRENT GIVES 

0mA TO 6mA LAMP CURRENT 

FOR A TYPICAL DISPLAY.

FOR ADDITIONAL CCFL/LCD CONTRAST APPLICATION CIRCUITS, 

REFER TO THE LT1182/83/84/84F DATA SHEET

D1

BAT85

FROM MPU

1

2

3

4

5

6

7

8D1

1N5818

L1 = COILTRONICS CTX210605

L2 = COILTRONICS CTX100-4

*DO NOT SUBSTITUTE COMPONENTS

COILTRONICS (407) 241-7876



New LTC CCFL Part

The LT1186 is a fixed frequency,

current mode switching regulator that

provides a simple digital control func-

tion for cold-cathode fluorescent

lighting. The regulator is a compan-

ion part to Linear Technology’s

LT1182/LT1183/LT1184 CCFL/LCD

contrast switching regulator family.

The LT1186 supports grounded-lamp

and floating-lamp configurations. The

IC includes an efficient high current

switch, an oscillator, output-

drive logic, control circuitry and a

micropower 8-bit 50µA full-scale cur-

rent output DAC.

The DAC provides simple

“bits-to-lamp-current control” and

communicates in two interface modes:

standard SPI mode and pulse mode.

On power-up, the DAC counter resets

to half-scale and the DAC configures

itself to SPI or pulse mode, depending

on the CS (chip select) signal level. In

SPI mode, the system microprocessor

serially transfers the present 8-bit

data and reads back the previous

Figure 1. Up to 90% efficient floating CCFL with SPI control of lamp current

DESIGN FEATURES

Linear Technology Magazine • December 1995

returned to the user to verify the last

programmed current level. An input

of one corresponds to 1 LSB of DAC

output current (195.3nA) and an in-

put of 255 corresponds to the full-scale

DAC output current of 50µA.

Listings 1 and 2 on pages 8–9 are

the complete C and assembly language

code that controls the evaluation setup

of Figure 2. My thanks and apprecia-

tion go to Tommy Wu at Linear

Technology for developing this soft-

ware. Any questions or comments

regarding the software should be ad-

dressed to Tommy, in care of this

publication. The software is fairly ge-

neric and is easily adaptable to other

microcontrollers or microprocessors.

Conclusion

The LT1186 is a novel Bits-

to-Nits

* converter for driving

cold-cathode fluorescent lamps in

handheld or portable instruments

with LCD displays. Lamp current is

digitally programmed in either of two

interface modes: standard SPI mode

and pulse mode, which provides

simple push-button up/down con-

trol. The LT1186 represents another

step in Linear Technology’s commit-

ment to providing efficient, compact

and economical backlight solutions.

connected between the BAT and Royer

pins, provides feedback, and a single

capacitor (C7) on the V

pin provides

stable loop compensation.

Lamp current is programmed by

driving the I

CCFL

pin from the I

OUT

pin.

The transfer function between lamp

current and input programming cur-

rent must be empirically determined

and is dependent on a myriad of fac-

tors, including lamp characteristics,

display construction, transformer

turns ratio and the tuning of the

Royer oscillator. The LT1186 control

circuitry is powered by either a 3.3V

or 5V logic supply, and the input

battery voltage range for this example

is 8V to 28V. Lower input battery

voltage operation is accomplished by

increasing the turns ratio of trans-

former L1 and retuning the Royer by

tweaking the values of C1 and C2.

Electrical efficiency with typical CCFL

lamps ranges between 80%–90% at

full load with lamp current being vari-

able from 200µA to 6mA for a typical

display. The component values cho-

sen are an interactive compromise

in maximizing photometric output

versus input power.

Figure 2 is a block diagram for an

Intel 80C31 microcontroller-based

evaluation setup for the LT1186. The

lamp current is controlled by a gen-

eral PC keyboard interface. The user

inputs a number between 0 and 255

to set a new input programming cur-

rent, and therefore, a new lamp

current level. The previous code is

8-bit data from the DAC. In pulse

mode, the upper six bits of the DAC

are configured for increment-only

(1-wire interface) or increment/dec-

rement (2-wire interface) operation,

depending on the D

signal level.

The LT1186 control circuitry oper-

ates from a logic supply voltage of

3.3V or 5V. The IC also has a battery

supply voltage pin that operates from

4.5V to 30V. The LT1186 draws 6mA

typical quiescent current. An active

low shutdown pin reduces total sup-

ply current to 35µA for standby

operation and the DAC retains its last

setting. A 200kHz switching frequency

minimizes magnetic component size,

and the use of current mode switch-

ing techniques gives high reliability

and simple loop frequency compen-

sation. The LT1186 is available in a

16-pin, narrow-body SO.

Typical Application

Figure 1 is a complete floating CCFL

circuit using the LT1186 in standard

SPI mode to control operating lamp

current from a microprocessor. A

floating-lamp circuit allows the

transformer to provide symmetric, dif-

ferential drive to the lamp. Balanced

drive eliminates the field imbalance

associated with parasitic lamp-to-

frame capacitance and reduces

“thermometering” (uneven lamp in-

tensity along the lamp length) at low

lamp currents.

Q1, Q2, L1 and C1 form the core of

a current-fed, Royer-class converter.

The LT1186 power switch and L2

create a switch-mode current source

to drive the Royer. The 200kHz switch-

ing frequency allows the use of only

100µH for L2. Base drive for Q1 and

Q2 is provided by L1’s tickler winding

and R1. R1 is selected to guarantee

sufficient base drive with minimum

betas for Q1 and Q2. R2, R3 and C5

comprise an external divider network

for the open-lamp protection circuit.

The divider monitors the voltage

across the Royer converter and com-

pares it with an internal 7V clamp

voltage between the BAT and BULB

pins. Monitoring the primary-side

converter current through a high-

side sense resistor and amplifier,

CS

CLK



OUT

5A0-A15

D0-D7

RS232

FROM PC

P1.4

P1.3

P1.0

P1.1

TX

LT1186

ROYER

CONVERTER

LAMP

ROM

80C31

1186_2.eps

Note:

* Bits-to-Nits is a trademark of Linear Technology

Corporation. 1 Nit = 1 Candela/meter

. Nit is

derived from the Latin word nitere meaning “to

shine.”

DESIGN FEATURES

Figure 2. LT1186 Floating CCFL system using an Intel 80C31 microcontroller

Linear Technology Magazine • December 1995

Listing 1. LT1186.C

#include <stdio.h>

#include <reg51.h>

#include <absacc.h>

extern char lt1186(char); /* external assembly function in lt1186a.asm */

sbit Clock = 0x93;

main()

{int number=0;

int LstCode;

Clock = 0;

TMOD = 0x20; /* Establish serial communication 1200 baud */

TH1 = 0xE8;

SCON = 0x52;

TCON = 0x69;

while(1) /* Endless loop */

{printf(“\nEnter any code from 0 - 255: “);

scanf(“%d”,&number);

if((0>number)|(number>255))

{number = 0;

printf(“The number exceeds its range. Try again!”);

}else

{LstCode = lt1186(number);

printf(“Previous # %u”, (LstCode&0xFF)); /* AND the previous

number with 0xFF to turn off sign extension */

}

number = 0; /* Reinitialize number */

}

C and Assembly Language Program Code for LT1186 Evaluation

The LT1186.C program demon-

strates the use of the LT1186

DAC programmable CCFL switch-

ing regulator.

The example circuit uses

the popular 80C51 family of

microcontrollers to interface between

the user and the LT1186.

The LT1186 DAC algorithm is

written in assembly language,

and is contained in a file named

LT1186A.ASM; it is called as a func-

tion from the MAIN function of

LT1186.C. The user inputs an integer

from 0 to 255 on a keyboard and the

LT1186 adjusts the I

OUT

programming

current to control the operating lamp

current and the brightness of the

LCD display. The assembly language

program, LT1186A.ASM, receives

the D

word from the main C pro-

gram function, lt1186( ). Assembly

to C interface headers, declarations

and memory allocations are listed

before the actual assembly code.

DESIGN FEATURES

Linear Technology Magazine • December 1995

DESIGN FEATURES

Listing 2. LT1186A.ASM

; Port p1.4 = CS

; Port p1.3 = CLK

; Port p1.1 = Dout

; Port p1.0 = Din

;

NAME LT1186_CCFL

PUBLIC lt1186, ?lt1186?BYTE

?PR?ADC_INTERFACE?LT1186_CCFLSEGMENT CODE

?DT?ADC_INTERFACE?LT1186_CCFLSEGMENT DATA

RSEG ?DT?ADC_INTERFACE?LT1186_CCFL

?lt1186?BYTE: DS 2

RSEG ?PR?ADC_INTERFACE?LT1186_CCFL

CS EQU p1.4

CLK EQU p1.3

DOUT EQU p1.1

DIN EQU P1.0

lt1186: setb CS ;set CS high to initialize the LT1186

mov r7, ?lt1186?BYTE ;move input number(Din) from keyboard to R7

mov p1, #01h ;setup port p1.0 becomes input

clr CS ;CS goes low, enable the DAC

mov a, r7 ;move the Din to accumulator

mov r4, #08h ;load counter 8 counts

clr c ;clear carry before rotating

rlc a ;rotate left Din bit(MSB) into carry

loop: mov DIN, c ;move carry bit to Din port

setb CLK ;Clk goes high for LT1186 to latch Din bit

mov c, DOUT ;read Dout bit into carry

rlc a ;rotate left Dout bit into accumulator

clr CLK ;clear Clk to shift the next Dout bit

djnz r4, loop ;next data bit loop

mov r7, a ;move previous code to R7 as character return

setb CS ;bring CS high to disable DAC

ret

END

;NOTE: When CS goes low, the MSB of the previous code appears at Dout

Linear Technology Magazine • December 1995

Power Factor Correction, Part Four:

The Brains Behind the Brawn

The Control Room

In the three previously published

parts of our series on power factor

correction, we investigated the

workings of the “power transfer

mechanism” as used in the ever so

popular “boost-mode power factor

correction conditioner.” This power

transfer mechanism is shown in Fig-

ure 1 as the “engine room.” Also shown

is the “control room,” where the deci-

sions are made and actions taken to

make the PFC power conditioner be-

have like a resistor (the ultimate

disguise for a switching power sup-

ply). Having had a brief tour of the

engine room in an earlier article,

we can summarize its workings in a

few rules:

1. The amount of power intercepted

from the input line is related to

the duty factor of the boost

engine.

2. When the duty factor is at 0%, no

power is intercepted from the

input line.

3. Under all conditions, increasing

the duty factor will increase the

amount of power intercepted

from the input line.

4. The boost engine is essentially

lossless, so all power intercepted

from the input line ends up in

the load.

5. The load voltage is to be held

constant.

6. The load voltage shall be set

above the peak input voltage,

where the peak input voltage is

1.414 times the maximum RMS

input power-line voltage; this is

where the power factor is to be

corrected.

If the peak input voltage exceeds

the output voltage at any time, the

output diode (internal to the boost

engine) takes it upon itself to forward

conduct, transferring power from the

input to the output without any

by Dale Eagar

EMI

FILTER AC

BRIDGE BOOST

ENGINE LOAD

POWER PATH (ENGINE ROOM)

AC

POWER

LINE

2030 40 50 60 70 80

100

CONTROL ROOM

pfc4_1.eps

–

INPUT

VOLTS DUTY

FACTOR OUTPUT

VOLTS

INPUT

AMPS

Figure 1. Boost PFC block diagram

DESIGN FEATURES

controller to watch the input volts

and amps while adjusting the duty

factor. The duty factor is constantly

adjusted to make the input amps

equal to some constant (K) times the

input volts. Presto resistor! Looking

into the input terminals, one would

see a pure resistor. The input would

look resistive at a value of Z

= 1/K.

This impedance would be fairly con-

stant for frequencies from DC to the

fastest frequency at which the con-

troller could accurately keep up with

things. In the real world there is this

guy named Nyquist who says, among

other things, that the controller would

make serious blunders if he were to

try to control the duty factor faster

than 1/2 of the switching frequency.

With the switching frequency set to

somewhere around 100kHz, the in-

put looks resistive from DC to many

kiloHertz, which is good enough for

the 60Hz line and many of its nasty

harmonics.

Careful inspection of the output

would reveal an output impedance of

OUT2

/K, a big number. The whole

system would look like a constant

power source, with the power level set

to K times V

IN2

. These observations

are entered in the first row of Table 1.

authorization from the control room.

Pure Insubordination! The only way

to prevent this disgraceful act by

the output diode is to keep the out-

put voltage out of reach of the peak

input voltage.

At the Console

In the control room is a control

console, a panel with meters and a

duty factor control. Sitting in the con-

trol seat is the controller, an intelligent

entity. The controller is given the task

of watching the three meters (Figure

1) and controlling the duty factor to

keep things in check.

The controller is given two tasks to

perform, namely:

1. Make the input look resistive.

2. Keep the output voltage constant

at 386V, regardless of the load

current or input line voltage.

Careful inspection of the above two

tasks may surprise you. Let’s look at

each task separately.

Task One: Making the

Input Look Resistive

It would not be too difficult to teach

the controller to make the input look

resistive. One would need to teach the

Linear Technology Magazine • December 1995

Task-2: Keeping the Output

Voltage Constant at 386V

Looking at task-2 in the absence of

any task-1 constraints, we teach our

controller to adjust the duty factor to

keep the output voltage constant, re-

gardless of the load current or input

line voltage. Having visualized such a

system, we can look at its character-

istics. Looking into the input port at

any constant load current, we see a

negative input impedance. (As the

input line voltage goes up, the input

current goes down.) Looking into the

output port we see an impedance of

zero. (Any finite increase in output

current causes no change in output

voltage.) Finally, looking at the power

intercepted from the input line we

have a constant at V

OUT

× I

OUT

regardless of input voltage. These ob-

servations occupy row two of Table 1.

Putting Them Together

It should be apparent that no de-

vice can exhibit positive impedance

and negative impedance at the same

time. However, we know how to

cheat—we take the reciprocal of time

to get frequency.

This trick doesn’t need smoke and

mirrors, unless, of course, you hook

it up wrong, in which case you get

seven years of bad luck. This is a trick

in the frequency domain.

The first step is to loosen up the

output specification a little. We can

see that the power delivered from a

sine wave into a resistive load is any-

thing but constant (see Figure 2). We

at low input currents where input

ripple is less critical.

The boost converter PFC provides

no isolation from the line, has high

inrush current, has a very high out-

put voltage, has 120Hz ripple on the

output and exhibits slow load-step

response. All of these difficulties of

the boost converter are small com-

pared to the problems in the design of

an input EMI filter if other technolo-

gies were used.

Isolation, hold-up time and regula-

tion are performed by the switching

power supply that follows the PFC

conditioner. Inrush protection is pro-

vided by a negative tempco thermistor

or other external circuitry.

It is advantageous to synchronize

the PFC conditioner and the following

switching power supply 180 degrees

out of phase to reduce the ripple

current on the output capacitor and

reduce overall system noise. The Lin-

ear Technology PFC family of parts all

have synchronizing ability, and the

LT1508 and LT1509 controllers have

both a PFC conditioner and a switch-

ing power converter on one chip, fully

synchronized at 180 degrees.

The input impedance of a function-

ing PFC will be negative from DC to

about 10Hz; from there the imped-

ance goes reactive, then to positive

resistance at frequencies above 10Hz.

The output impedance of the PFC

conditioner is near zero ohms from

DC to about 10Hz; above 10Hz the

output impedance looks like a vari-

able resistor in parallel with the output

capacitor’s reactance.

Table 1. Task-1 and task-2 characteristics

Input Output Power

Task impedance impedance transferred

Make Input

Resistive 1/K V

2OUT

/K K V

Constant V

OUT

Negative Zero V

OUT

× I

OUT

continued on page 25

DESIGN FEATURES

would have to have an infinitely large

output capacitor to realize zero out-

put ripple when there is input ripple

current. Infinite capacitors went out

of vogue back in the Cretaceous era.

First we loosen up the output voltage

specification to allow a few volts of

ripple, bringing the output capacitor

down to a realistic size. Second, we

further loosen the output specifica-

tion to allow the output voltage to

swing tens of volts during heavy load

steps.

We do this by teaching the controller

to keep the output voltage at 386V

when averaged over any 3-second

interval. This is in effect telling the

controller to make the input imped-

ance negative for frequencies from DC

up to several Hertz. We are instructing

the controller to adjust the K value in

the task-1 operation slowly to keep the

output voltage at an average of 386V.

See Figure 3 for the input impedance

versus frequency characteristics.

Summary/Hindsight

Power factor correction is incorpo-

rated into a product design for one of

several reasons:

A. Government standards, such as

IEC555, compliance with which

is required to sell product in

several worldwide markets.

B. The marketing boys upstairs feel

that they can sell it as a feature.

C. Management needs to keep the

power supply design group out of

trouble until the next major

design.

The boost converter is the best way

to perform PFC at any power greater

than 50W. The crowning advantage of

the boost topology is its continuous

input current when running in the

continuous mode. The loss of

continuity of input current in the

discontinuous mode is unimportant,

as discontinuous mode only happens

VOLTS

WATTS

AMPS

INPUT

POWER

INPUT

VOLTS

AND

AMPS

TIME



Figure 2. Input power waveform

POSITIVE







NEGATIVE

NOTE: WHEN THE

INPUT RESISTANCE

IS AT ZERO OHMS

THE INPUT STILL

HAS IMPEDANCE

BECAUSE AT THAT

POINT THE INPUT

LOOKS REACTIVE.

FREQUENCY

10Hz

pfc4_3.eps

Figure 3. Input impedance (resistive

component) versus frequency

Linear Technology Magazine • December 1995

FREQUENCY (Hz)

0.0001

0.001

0.010

0.1

THD+N (%)

20K

1352_2.eps

100 1K 10K

= 1

= –1

How Do You Slew 200V/µs

with a 250µA Op Amp? by George Feliz

Introduction

The LT1354/LT1365 family of low

power, high-slew-rate op amps

changed the relationship between slew

rate and supply current found in tra-

ditional voltage-feedback operational

amplifiers. These parts slew from

400V/µs with 1mA supply current up

to 1,000V/µs with 6mA supply cur-

rent. The LT1352 dual op amp is a

precocious new sibling that extracts

200V/µs from a mere 250µA of supply

current (see Figure 1).

The new design shares the family

circuit topology, but adds a frugal

output stage that enthusiastically

drives heavy loads with up to 40mA of

current. A primary benefit, unheard

of with other low power op amps, is

the ability to drive large signals into

heavy loads with low distortion. A plot

of distortion for 20V peak-to-peak

signals with a 1kΩ load is shown in

Figure 2. Table 1 shows that this

remarkable output performance is

achieved without compromising other

specifications over its 2.5V to 15V

supply voltage range. The settling time

for a 10V step is only 700ns for 0.1%

and 1250ns for 0.01%. In addition to

performance, the LT1352 is a user-

friendly C-Load op amp, which is

stable with any capacitive load.

output swing and/or create instabil-

ity with a capacitive load.

The solution used on the LT1352

was to create a pair of composite

transistors formed by transistors

Q19–Q21 and Q22–Q24. The current

mirrors attached to the collectors of

emitter followers Q19 and Q22 pro-

vide additional current gain. The ratio

of transistor geometries Q20 to Q21

and Q23 to Q24, and resistor ratios

R2 to R3 and R4 to R5 set the gain to

five at low currents and to a maxi-

mum of 23 at high currents. The

variation in gain is required in order

to have low quiescent current yet be

able to provide output drive on de-

mand. There is no output-swing loss

with this output stage, as the swing is

limited at the high impedance node.

The dynamics of a composite are not

as benign as an emitter follower, so

compensation is required and is pro-

vided by R6, C1 and R7, C2.

The C-Load stability is provided by

the R

, C

network between the out-

put stage and the high impedance

node. When the amplifier is driving a

light or moderate load the output can

follow the high impedance node and

the network is bootstrapped and has

no effect. When driving a heavy load

such as a big capacitor or small-value

How We Did It

A simplified schematic of the cir-

cuit is shown in Figure 3. The circuit

looks similar to a current-feedback

amplifier, but both inputs are high

impedance, as in a traditional voltage-

feedback amplifier. A complementary

cascade of emitter followers (Q1–Q4)

buffers the noninverting input and

drives one side of resistor R1. The

other side of the resistor is driven by

Q5–Q8, which form a buffer for the

inverting input. The input voltage

appears across the resistor, generat-

ing currents in Q3 and Q4, which are

mirrored by Q9–Q11 and Q13–Q15

into the high impedance node. Tran-

sistors Q17–Q24 form the output

stage. Bandwidth is set by R1, the

’s of Q3, Q4, Q7 and Q8, and the

compensation capacitor C

The current available to slew C

proportional to the voltage that ap-

pears across R1. This method of “slew

boost” achieves low distortion due to

its inherent linearity with input step

size. Since large slew currents can be

generated without increasing quies-

cent current, C

can be increased and

R1 can be decreased. Lowering R1

reduces the input noise voltage to

14nV/√Hz and helps reduce input

offset voltage and drift.

The output stage buffers the high

impedance node from the load by

providing current gain. The LT1352

and its relatives are single-gain-stage

amplifiers in order to remain stable

with capacitive loading and to achieve

their high slew rate with low quies-

cent supply current. The simplest

output stage would be two pairs of

complementary emitter-followers,

which would provide a current gain of

Beta

NPN

× Beta

PNP

. Unfortunately, this

gain is insufficient for driving even a

2kΩ load when running at the low

current levels of the LT1352. Adding

another emitter-follower can reduce

DESIGN FEATURES

Figure 2. THD + noise, 20V

P–P

, R

= 1kΩ

Figure 1. Large-signal response, A

= −1

Linear Technology Magazine • December 1995

OUT

+IN

–IN

–

R1

1k C

R4 R5

Q14

Q23

Q10

Q22

Q20

Q12

Q21

Q17

Q13

Q18

Q19

Q16

Q24

Q15

Q11

1352_3.eps

Table 1. Important specifications for the LT1352 at 25

Parameter Conditions Minimum Typical Maximum Units

VOS VS = 5V, ±15V 300 600 µV

VS = ±2.5V 400 800 µV

IBVS = ±2.5V to ±15V 20 50 nA

IOS VS = ±2.5V to ±15V 5 15 nA

AVOL VS = ±15V, 1kΩ20 60 V/mV

VS = ±5V, 1kΩ20 60 V/mV

VS = ±2.5V, 5kΩ20 60 V/mV

GBW VS = ±15V 2.2 3 MHz

VS = ±5V 2.0 2.7 MHz

VS = ±2.5V 2.5 MHz

SR VS = ±15V 125 200 V/µs

VS = ±5V 40 50 V/µs

tSETTLE 10V step, 0.1% 700 ns

10V step, 0.01% 1250 ns

CMRR Vs = ±15V 80 97 dB

VS = ±5V 78 84 dB

VS = ±2.5V 68 75 dB

PSRR VS = ±2.5V to ±15V 90 106 dB

Noise voltage VS = ±2.5V to ±15V,10kHz 14 nV/

√

Noise current VS = ±2.5V to ±15V,10kHz 0.5 pA/

√

Output Swing VS = ±15V, 1kΩ12.0 13.0 V

VS = ±5V, 500Ω3.1 3.5 V

VS = ±2.5V, 2kΩ1.3 1.7 V

ISUPPLY VS = ±15V 250 325 µA

VS = ±5V 220 290 µA

Figure 3. LT1352 simplified schematic

resistor, the network is incompletely

bootstrapped and adds to the com-

pensation at the high impedance node.

The added capacitance provided by

slows down the amplifier and the

zero created by R

adds phase margin,

ensuring stability. The small-signal

DESIGN FEATURES

Figure 4. Small-signal step response, A

= −1,

= 500 pF

Figure 5. Large-signal step response, A

= 1,

= 10,000 pF

response with a 500pF load is shown

in Figure 4 and the large-signal re-

sponse with 10,000pF is shown in

Figure 5. Note that the slew rate in

Figure 5 is limited to 4V/µs by the

short-circuit current limit of 40mA.

Conclusion

The LT1352 is a dual op amp with

an unmatched combination of low

supply current, large-signal perfor-

mance, stability and DC precision. If

a figure of merit equal to the slew rate

divided by supply current is calcu-

lated, the LT1352 stands alone among

voltage-feedback op amps with

800V/µs-mA.

Linear Technology Magazine • December 1995

1160_2.eps

OUT

LOAD

=

1000 - 9000pF

1160_1.eps

V+

V+BOOST

IN TOP

DC-100kHz

IN BOTTOM

DC-100kHz

UV OUT

BOTTOM

UVLOCK

TOP

GATE

BOTTOM

GATE

CBOOTSTRAP

DRIVE

FEEDBACK

TO 

LOAD

SOURCE

DRIVE

FEEDBACK

TOP

UVLOCK

–

CONTROL

LOGIC

Figure 2a. Bipolar driver topology

The best solution to this problem is

to use a floating topside N-channel

gate driver operating from a boot-

strap capacitor. Although widely used,

the technique of bootstrapping must

be carefully implemented, since

the gate voltage applied to the top

MOSFET derives directly from the

voltage on the bootstrap capacitor. If

this voltage becomes too low, it can

cause problems for the MOSFET. For

example, if at high duty cycles the

output is not swinging low enough to

fully recharge the capacitor, the

topside gate drive will be starved,

leading to overdissipation.

Life Above the Supply Rail

The first problem designers face in

N-channel half-bridge circuits is de-

veloping the topside gate drive, which

must swing at least 10V above the

supply rail for standard MOSFETs.

This challenge alone is so demanding

that designers often resort to more

expensive and less efficient P-chan-

nel MOSFETs on the topside in low

voltage bridge circuits. However, even

this solution is no longer straight-

forward when the supply voltage

exceeds the maximum gate-to-source

voltage (V

) rating for the MOSFET

(typically 20V).

Figure 1. LT1160 block diagram with pins shown in actual package sequence

LT1160, continued from page 1

SWITCHING TIME (ns)

OUT

15V

600 800 1000 1200 1400 1600400200

1000pF 9000pF

SWITCHING TIME (ns)

–1.2A

OUT

1.2A

1160_2b.eps

600 800 1000 1200 1400 1600400200

1000pF

9000pF

Figure 2b. Bipolar driver switching time increases only 150ns for an increase of 8,000pF in

load capacitance

DESIGN FEATURES

Linear Technology Magazine • December 1995

In the LT1160, a floating under-

voltage detection circuit monitors the

voltage across the bootstrap capaci-

tor and a separate undervoltage

detection circuit monitors the supply

voltage. If, as a result of operation at

high duty cycles, the voltage across

the bootstrap capacitor drops below

approximately 8.7V, the top driver is

pulled low to prevent overdissipating

the top MOSFET, and also to allow

the capacitor to be recharged. Simi-

larly, if the supply voltage drops below

about 8.3V, both drivers are pulled

low to prevent overdissipating either

MOSFET. The LT1162 has separate

and independent undervoltage detec-

tors for the two half-bridge drivers.

Shoot-Through Unwelcome

Probably the most frustrating ele-

ment to address in a synchronous

The most common techniques rely

on fixed delay times to create a dead-

time between conduction of the top

and bottom MOSFETs. Although this

can work, the delay time must take

into account temperature changes,

supply variations, and production tol-

erances of the MOSFETs and other

MOSFET drive circuit is the timing

between the top and bottom drives to

prevent cross-conduction. The

presence of cross-conduction or

“shoot-through” currents always saps

efficiency and erodes precious ther-

mal margins; in extreme cases it can

lead to catastrophic failure.

Figure 4. 50W high efficiency switching regulator illustrates the design ease afforded by adaptive deadtime generation

1160_3a.eps

OUT

LOAD

=

1000 - 9000pF

Figure 3a. CMOS driver topology

1000pF

SWITCHING TIME (ns)

OUT

15V

600 800 1000 1200 1400 1600400200

9000pF

1000pF

9000pF

SWITCHING TIME (ns)

–1.2A

OUT

1.2A

1160_3b.eps

600 800 1000 1200 1400 1600400200

1000pF

9000pF

Figure 3b. CMOS driver switching time increases 400ns for an increase of 8,000pF in load

capacitance

1160_4.eps

1N4148

(2) IRFZ44

IRFZ34

L

47µHR



7mΩ

5400µF

LOW ESR

BOTH GNDS

JOINED AT

ONE POINT

MBR340

12V

60V

(MAX)

L: HURRICANE LABS HL-KM147U 801 6352003

: DALE TYPE LVR-3 ULTRONIX RCS01

2.2µF

1µF

4700pF

f = 40kHz

18kΩ

0.1µF

2 x 2200µF

LOW ESR

10µF

6800pF

100pF

25kΩ

1kΩ

500kΩ

2kΩ

10kΩ

18kΩ

10kΩ

1kΩ

2N2222

5kΩ

330kΩ

1N4148

LT1846

BOOST

T GATE DR

T GATE FB

T SOURCE

P V

B GATE DR

B GATE FB

S V

IN TOP

IN BOT

UV OUT

S GND

P GND

LT1160

DESIGN FEATURES

Linear Technology Magazine • December 1995

losses. Figure 5 shows the operating

efficiency for Figure 4’s circuit.

Two Halves Equal a Whole

The LT1162 is functionally and

electrically identical to two LT1160s.

The LT1162 is ideal for motor-control

applications driving an N-channel

MOSFET H-bridge, as shown in Fig-

ure 6. The DC motor shown can be

driven in both directions. By applying

the appropriate control signals at the

inputs, the motor can be made to run

clockwise, counterclockwise, stop rap-

idly (“plugging” braking) or free run

(coast) to a stop. A very rapid stop can

be achieved by reversing the current,

though this requires more careful

design to stop the motor dead. In

practice, a closed-loop control sys-

tem with tachometric feedback is

usually necessary.

Designing In Ruggedness

The output of a bridge circuit driv-

ing multiple-ampere inductive loads

can be a very ugly signal to couple

back into a hapless IC. Although

MOSFETs contain integral body di-

odes which conduct during the

dead-time, slow turn-on times and

wiring inductances can result in

spikes of several volts below ground

Figure 6. Full-bridge motor control with the LT1162

components. As a result, more dead-

time than is normally needed must be

used, increasing the conduction time

in the lossy MOSFET body diodes.

The LT1160 and LT1162 (like the

LT1158) use an adaptive system that

maintains dead-time independent of

the type, the size and even the num-

ber of MOSFETs being driven. It does

this by monitoring the MOSFET gate

turn-off to see that it has fully dis-

charged before allowing the opposite

MOSFET to turn on. In this way,

cross-conduction is completely elimi-

nated as a design constraint.

The high efficiency 10A stepdown

(buck) switching regulator shown in

Figure 4 illustrates how different sized

MOSFETs can be used without hav-

ing to worry about shoot-through

currents. Since 40V is being dropped

down to 5V, the duty cycle for the

switch (top MOSFET) is only 5/40 or

12.5%. This means that the bottom

MOSFET will dominate the R

DS(ON)

efficiency losses, because it is turned

on seven times as long as the top.

Therefore a smaller MOSFET is used

on the top, and the bottom MOSFET

is doubled up, all without having to

worry about dead-time. The noncriti-

cal Schottky diode across the bottom

MOSFETs reduces reverse-recovery

OUTPUT CURRENT (A)

EFFICIENCY (%)

1160_5.eps

024 86

1160_6.eps

UV OUT A

BOOST

V+

60V MAX

12V

T GATE DR A

T GATE FB A

T SOURCE A

B GATE DR A

B GATE FB A

GND

IN TOP A

IN BOT A

LT1162

UV OUT B

BOOST

T GATE DR B

T GATE FB B

T SOURCE B

B GATE DR B

B GATE FB B

GND

IN TOP B

IN BOT B

10µF

IRFZ44

1N4148

1000µF

PWM

0-100kHz

25kΩ

CBOOTSTRAP

0.1µF

IRFZ44

1N4148

1000µF

PWM

0-100kHz

25kΩ

CBOOTSTRAP

0.1µF

V+V+V+

1 7 14 26

Figure 5. Operation efficiency for Figure 4’s

circuit. Current limit is set at 15A

or above supply. The LT1160 and

LT1162 source pins have been de-

signed to take repetitive output

transients 5V outside the supply rails

with no damage to the part. This

saves the expense of adding high cur-

rent Schottky diode clamps.

Conclusion

The LT1160 and LT1162 N-

channel power MOSFET drivers an-

ticipate all of the major pitfalls

associated with the design of high

efficiency bridge circuits. The de-

signed-in ruggedness and numerous

protection features make these driv-

ers the best solution for 10V to 60V

medium-to-high current synchronous

switching applications.

DESIGN FEATURES

Linear Technology Magazine • December 1995

LTC

1430 Provides Efficient GTL Supply

by Craig Varga

1.5V output. The initial current was

1A and the final current 5A. The

top trace is the output voltage

(100mV/div) and the bottom trace is

the regulator’s inductor current

(5A/div). In Figure 4, the load resistor

is switched from ground to a 3V

supply, resulting in bidirectional load-

ing. Current is switched from 5A to

−4A. Again, the top trace is the output

of the 1.5V supply. The relatively long

recovery period is actually a response

to the perturbation that appears on

the input voltage as a result of the

large load change. Voltage mode con-

trol suffers from inherently poor line

rejection. In this case, the lab supply

used for the tests exhibits rather

poor dynamics. If a better input sup-

ply is used, the overall settling time

will be much faster. The LTC1430

also has a very accurate reference

and exhibits good static load regula-

tion, as can be seen from the very

small offset between the settled light

load and heavy load conditions on the

output-voltage trace.

A recent trend in computer bus

architecture is the move toward GTL

(Gunning Transition Logic) for rout-

ing high speed signals between the

CPU and chipset logic. Buses with

Figure 1. Schematic diagram of GTL supply

L1

2.7µH

MAX

SHDN

COMP

SGND

FSET

CC2

PGND

–SENSE

+SENSE

CC1

U1

LTC1430

R6

10k

R2, 3Ω

R1

R3

3Ω

R4

R5

16.5k

R9

88.7k

R7

15k

R10

3.3k R8

130k

C7

0.1µF

C8

22µF

35V

C12

330

6.3V

OSCON

C13

330

6.3V

OSCON

C4

330

6.3V

OSCON

1.5V OUT

C5

330

6.3V

OSCON

S/D

C6

0.01µF

C16

0.1µF

C2

680pF

C10

1µF

C9

1µF, 25V

C11

0.068µF

C3

220pF

C1

0.1µFQ1

Si4410

Q2

Si4410

D1

MBRS330T3

di1430_1.eps

330

6.3V

TANT

330

6.3V

TANT

ADDITIONAL

DECOUPLING

AT THE LOAD

+ +

MBR0530T1

DESIGN IDEAS...

LTC1430 Provides Efficient

GTL Supply ................... 17

Craig Varga

Battery Charger Sinks

Constant Current .......... 18

Mitchell Lee

Low Noise Charge Pump

Biases GaAsFET Gates .. 19

Mitchell Lee

C-Load

Op Amps

Conquer Instabilities ..... 20

Frank Cox and Kevin R. Hoskins

Lowpass Filters with Rail-to-

Rail Input and Output ... 23

Philip Karantzalis and Jimmylee Lawson

speeds in excess of 66MHz are using

this technology. Several different GTL

supply voltage standards seem to be

evolving, with voltages from 1.2V to

1.5V being discussed most often. In

some implementations of the logic

family, the GTL supply must both

source and sink currents of 5A–10A.

This causes a great deal of difficulty

for a typical current mode control

power supply design that is incapable

of controlling currents less than zero.

The LTC1430 is a voltage mode con-

troller, and as such, does not exhibit

any problems with negative load cur-

rents.

Most GTL incarnations, however,

appear not to require current-sinking

supplies, and the LTC1430 is well

suited for these applications as well.

The circuit shown in Figure 1

switches at 300kHz, regulating a 5V

input down to a 1.5V output while

maintaining good efficiency. (See Fig-

ure 2. Figures 2–4 are on the bottom

of page 18.) Figure 3 shows the effects

of a fast 4A load transient on the

DESIGN IDEAS

Linear Technology Magazine • December 1995

Battery Charger Sinks

Constant Current by Mitchell Lee

the current available from the source.

The circuit shown in Figure 1 does

just that, while charging 2 NiCd cells.

Input current is sensed by a PNP

transistor and applied as feedback to

an LTC1174 stepdown converter. The

Burst Mode™ converter draws just

enough power to hold the input cur-

rent at 50mA, matching the abilities

of the wall adapter.

Output current into two cells is

nominally 180mA, but climbs to over

300mA when the batteries are com-

pletely discharged. Efficiency is about

78% at 3V output. If the batteries are

removed from the charging circuit,

the output voltage could climb to

levels destructive to the load. To

DC-to-DC converters make very

efficient constant current sources for

charging NiCd batteries. Unfortu-

nately, the input of a switcher exhibits

a negative impedance, and this can

cause problems in systems where the

source is power or current limited.

Various schemes are used to preclude

input foldback. Undervoltage lockout

works well with power-limited

sources, keeping the converter OFF

until the input voltage has risen to

the point where it can develop ad-

equate power.

Undervoltage lockout does not work

with current-limited sources. A bet-

ter approach is to control the

converter’s input current to match

prevent this, a second feedback

path is applied to Pin 1 via a diode,

limiting the output voltage to approxi-

mately 3.7V.

Another condition that can spell

trouble for simple circuits such as

this one is the loss of input power

while the batteries are still connected

in circuit. An extra Schottky diode

placed in series with the switch (Pin 5)

blocks reverse current flow into the

LTC1174 and prevents damage. The

output can also be short circuited

without damage to the device. Shut-

down (Pin 8) allows logic control of the

charger, so the charging current can

be interrupted without disconnecting

the source supply.

Figure 2. Efficiency plot of the GTL supply

LOAD CURRENT (A)

EFFICIENCY (%)

di1430_2.eps

0123 654

LTC1430, continued from page 17

di1430_3.eps

INDUCTOR

CURRENT

5A/DIV

OUTPUT

VOLTAGE

100mV/DIV

OUTPUT

VOLTAGE

100mV/DIV

INDUCTOR

CURRENT

5A/DIV

di1430_4.eps

Figure 4. Oscillograph showing effects of

bidirectional loading on the GTL supply

Figure 3. Oscillograph showing effects of

4A load step on the 1.5V output

Figure 1. Schematic diagram of constant-current battery charger

+ +

di1174_1.eps

50mA

INPUT

2×

100µF

16V

OS-CON

100µF

16V

OS-CON

47µF

6.3V

OS-CON

2 NiCd

CELLS

11Ω100Ω

62N3906

1N5818

LOAD

100pF *COILTRONICS

(407) 241-7876

7234

1N4148

CTX100-1*

SHDN SW

IPGM GND

LTC1174HV-3.3

Authors can be contacted

at (408) 432-1900

DESIGN IDEAS

Linear Technology Magazine • December 1995

Low Noise Charge Pump Biases

GaAsFET Gates by Mitchell Lee

ure more typical of generic charge

pumps. A plot of spot noise is shown

in Figure 2. Above 20kHz, broadband

output noise is gradually eliminated

by the 10µF output capacitor.

Throughout the audio range the noise

is 600–700nV/√Hz.

Figure 3 shows the spectral re-

sponse of the LTC1550 over a range of

100kHz to 10MHz. Switching noise at

900kHz and related harmonics are

less than 10µV. The ferrite bead used

during these tests attenuates har-

monics above 5MHz. Depending on

the application, a series resistor of 1Ω

to 10Ω may be just as effective at

attenuating noise.

The LTC1550 is part of a larger

family of devices including multiple

versions and the LTC1551. The only

difference between the LTC1550 and

LTC1551 is shutdown polarity (the

LTC1550 has inverting shutdown, and

the LTC1551 has noninverting shut-

down). Packages with higher pin

counts include features such as ad-

justable output and a “power good”

pin for controlling power to the

GaAsFET drain. All devices exhibit

the same characteristic low output

noise. See the LTC1550/LTC1551

data sheet for a complete description

of all available options.

Figure 2. Spot noise plot of the circuit shown in Figure 1

tra, rendering the usual charge pump

unsuitable for this application.

A new generation of charge pumps

with on-chip post regulators has been

developed to satisfy this application.

Although the charge pump is retained

as the most economical and compact

method of generating a negative volt-

age from a positive input, a linear

post regulator is added to “purify” the

otherwise noisy charge-pump output.

The result is a negative bias supply so

quiet you’ll need to build a low noise

preamp in order to observe the noise

on a spectrum analyzer.

Figure 1 shows the LTC1550 low

noise, regulated, switched-capacitor

voltage inverter. Total noise over a

40MHz bandwidth is approximately

200µV

RMS

with a 1mA load. Compare

this with 10–100mV

RMS

noise, a fig-

Gallium arsenide MOSFETs are

widely used in wireless applications

as RF output amplifiers, especially in

cellular telephones. Although they

provide excellent power gain, output

power and efficiency on low voltage

battery supplies, GaAsFETs are deple-

tion-mode devices and require a

negative gate voltage for proper bias.

Since only a small current (less than

10mA) is required, a charge pump is

the best solution for generating a

negative gate-bias supply.

Charge pumps normally conjure

visions of noise, and rightly so. Their

very operation relies on transferring

energy from input to output by alter-

nately charging and discharging a

transfer capacitor—a decidedly noisy

process. Noise on the gate-bias line

translates directly to the output spec-

di1550_1.eps

FERRITE BEAD*

C1

0.1µF

C2

0.1µF



0.1µF

OUT



10µF

4.7µF

*DALE ILB-1206-19

3900Ω

OUT

= –4.1V

LTC1550-4.1

SHDN

C1+

OUT

SENSE

OUT

GND

C1–

Figure 1. Circuit diagram: LTC1550 low noise, regulated, switched-capacitor voltage inverter

FREQUENCY (Hz)

10n

100n

1µ

10µ

100µ

NOISE (V/√Hz)

100k

di1550_2.eps

1k 10k

FREQUENCY (Hz)

–40

–10

–20

–30

NOISE (dBµV)

10M

di1550_3.eps

1k 10k 100k 1M

BW = 100Hz

Figure 3. Spectral response of the LTC1550, 100kHz to 10MHz

DESIGN IDEAS

Linear Technology Magazine • December 1995

C-Load

™

Op Amps

Conquer Instabilities

Introduction

LTC has taken advantage of pro-

cess technology advances and circuit

innovations to create a series of

C-Load operational amplifiers. All of

these amplifiers are tolerant of ca-

pacitive loading, and a majority of

them remain stable driving any ca-

pacitive load. This series of amplifiers

has a bandwidth that ranges from

160kHz to 140MHz. These amplifiers

are appropriate for a wide range of

applications such as coaxial cable

drivers, video amplifiers, analog-to-

digital converter (ADC) input buffer/

amplifiers and digital-to-analog con-

verter (DAC) output amplifiers.

This article looks at a few of the

many applications for which the

C-Load amplifiers are appropriate,

including overcoming the large junc-

tion capacitance of surge protection

diodes on the outputs of video

amplifiers, driving the dynamically

changing capacitive loads of high

speed ADC converters’ analog inputs,

and driving an ADC’s reference with

varying voltages.

Table 1 lists LTC’s unconditionally

stable voltage-feedback C-Load

amplifiers. Table 2 lists other voltage-

feedback C-Load amplifiers that are

stable with loads up to 10,000pF.

by Frank Cox and

Kevin R. Hoskins

current of many amplifiers causes

slew limiting. The excellent output

drive (70mA minimum at ±15V

supplies) and the C-Load stability

features of the LT1363 make the

video performance of this circuit

almost indistinguishable from the

same driver without the added ESD

protection. Of course, the 75Ω series

matching resistor on the output

helps to isolate the capacitive load.

For the best high speed performance,

we recommend that the coax cable

be matched in this way. However,

there are cases where the maximum

output swing is required and this

resistor cannot be used (of course, for

quality video a termination resistor

is always used on the end of the

cable), so tests were run with com-

posite video to quantify the effect of

this component. Table 3 gives differ-

ential gain and phase measurements

for the amplifier circuit with and

without the output series resistor.

Video Performance

with ESD Protection

The circuit shown in Figure 1 is a

simple gain-of-2 line driver that is

capable of withstanding high levels of

electrostatic discharge (ESD) while

retaining its excellent video perfor-

mance. The output of the LT1363

amplifier is protected with transient

voltage suppressors. These suppres-

sors are Zener diodes designed for

circuit protection and specified for

high peak power dissipation, stand-

off voltage and maximum surge

current. The P6KE15A diodes used in

this circuit have a peak power dissi-

pation of 600W, a minimum stand-off

voltage of 12.8V and a maximum surge

current of 28A. This presents an ex-

traordinary level of protection for

the output of the amplifier, but the

large junction diodes present a prob-

lem for some video circuits.

The series connection of the two

P6KE15A diodes has 500pF of total

capacitance in the OFF state

(the normal operating condition).

Normally, large capacitive loads are

to be avoided in video amplifiers. Not

only can capacitive loading cause os-

cillation in amplifiers that are not

designed for it, but the limited output

Figure 1. Line driver circuit diagram

dicl_1.eps

–

15V P6KE20

4.7µF TANT

0.1µF CER

15V

1000Ω

75Ω

4.7µF TANT

0.1µF CER P6KE20

LT1363

–15V

1N571275Ω

1N5712

510Ω

P6KE15A ×2

OUT

Table 1. Unity-gain stable C-Load amplifiers

stable with all capacitive loads

GBW IS/Amp

Singles Duals Quads (MHz) (mA)

LT1012 — — 0.6 0.4

— LT1112 LT1114 0.65 0.32

LT1097 — — 0.7 0.35

— LT1457 — 2 1.6

Table 2. Unity-gain stable C-Load amplifiers

stable with C

≤ 10,000pF

GBW IS/Amp

Singles Duals Quads (MHz) (mA)

— LT1368 LT1369 0.16 0.375

LT1200 LT1201 LT1202 11 1

LT1220 — — 45 8

LT1224 LT1208 LT1209 45 7

LT1354 LT1355 LT1356 12 1

LT1357 LT1358 LT1359 25 2

LT1360 LT1361 LT1362 50 4

LT1363 LT1364 LT1365 70 6

DESIGN IDEAS

Linear Technology Magazine • December 1995

of Figure 3. The LT1206 high current

CFA has no measurable performance

degradation for video signals with the

suppressor diodes on the output,

although the restriction of the input-

clamp network still holds. The 250mA

output drive (over 0°C to 70°C tem-

perature with ±5V to ±15V supplies)

capability and the C-Load feature of

the LT1206 make it a natural for

driving difficult loads.

Driving ADCs

Most contemporary analog-to-digi-

tal converters (ADCs) incorporate a

sample-and-hold (S/H) using a topol-

ogy exemplified by the circuit in Figure

4. The hold capacitor’s (C1) size var-

ies with the ADC’s resolution, but is

generally in the range of 5pF–20pF,

10pF–30pF or 10pF–50pF for 8-, 10-

or 12-bit ADCs, respectively.

At the beginning of a conversion

cycle, this circuit samples the applied

signal’s voltage magnitude and stores

it on its hold capacitor. Each time the

switch opens or closes, the amplifier

driving the S/H’s input faces a

Differential Differential

Phase Gain

LT1363 with 0.11°0.03%

output clamp and

75Ω output R

LT1363 with 0.11°0.3%

output clamp and no R

LT1206 with 0.1°0.1%

output clamp and

75Ω output R

LT1206 with 0.11°0.1%

output clamp and no R

dicl_2.eps

15V

20k

–15V

1N5819

75Ω

1N5819

NONINVERTING

INPUT OF LT1363

>> –AV

AIN

GND

dicl_4.eps

TO 

SAR

FROM INTERNAL DAC

dynamically changing capacitive load.

This condition generates current

spikes on the input signal. These

spikes, along with the capacitive load,

are a very challenging load that can

potentially produce instabilities in an

amplifier driving the ADC’s input.

These instabilities make it difficult

for an amplifier to settle quickly. If the

output of an amplifier has not settled

to a value that falls within the error

band of the ADC, conversion errors

can result. That is, unless the ampli-

fier is designed to gracefully and

accurately drive capacitive loads, as

are Linear Technology’s C-Load line

of monolithic amplifiers.

As can be seen in Figure 5a, an

amplifier whose design is not opti-

mized for handling large capacitive

loads has some trouble driving the

hold capacitor of the LTC1410’s S/H.

Although the LT1006 has other very

Except for a slight rise in the LT1363’s

differential phase, there is no mea-

surable degradation. The output and

power supply pins of the driver circuit

withstand repeated air discharges of

17kV (the limit of the test equipment)

without failure. The input is sensitive

to the loading effects of the diode and

resistor network because the junc-

tion capacitance of the clamp diodes

works against the impedance of the

cable-termination resistors. For this

reason, low capacitance clamp di-

odes were used. The input of the

driver circuit still stood off 10kV.

If some reduction in the frequency

response (approximately 3dB at

5MHz) can be tolerated, the network

shown in Figure 2 can be added to the

input to increase the standoff voltage

to 17kV.

For even more demanding applica-

tions, we recommend the driver circuit

Figure 3. 250mA output line driver

Table 3. Differential gain and phase

measurement summary

Figure 2. Circuit with modified clamp for

higher voltage Figure 4. Typical ADC input stage showing

input capacitors

CONVST

1V/DIV

INPUT

200mV/DIV

dicl_5a.eps

200ns/DIV

dicl_5b.eps

200ns/DIV

INPUT

50mV/DIV

CONVST

1V/DIV

Figure 5a. Input signal applied to an

LTC1410 driven by an LT1006

Figure 5b. Input signal applied to an

LTC1410 driven by an LT1360

dicl_3.eps

–

15V P6KE20

4.7µF TANT

0.1µF CER

0.01µF

75Ω

4.7µF TANT

0.1µF CER P6KE20

LT1206

–

–15V

1N571275Ω

1N5712

1200Ω

1200ΩP6KE15A ×2

DESIGN IDEAS

Linear Technology Magazine • December 1995

desirable characteristics, such low

, high slew rate and low power

dissipation, it has difficulty accurately

responding to dynamically changing

capacitive loads and the current

glitches and transients they produce,

as indicated by the instabilities that

appear in the lower oscilloscope trace

in Figure 5a.

By contrast, Figure 5b shows the

LTC1360 C-Load op amp driving the

same LTC1410 input. The photo

continued on page 25

–

–5V

0.1µF

dicl_6.eps

0.1µF

INPUT

0.1µF10µF

12-BIT DATA

–A

AGND

REFCOMP

REF

10µF

OGND CONTROL LINES

LTC1410

DGND

0.1µF

0.1µF 10µF

LT1006 OR

LT1360

CONVST

Figure 6. Test circuit used to measure LTC1410 input signal waveform

Figure 7. The 12-bit LTC8043 DAC and the C-Load LT1220 op amp create variable reference voltages, enhancing the 12-bit LTC1410 ADC’s

input range flexibility



BUSY

CS

CONVST

RD

SHDN

NAP/SLP

OGND

D0

D1

D2

D3



–A



REF



COMP

AGND

D11 (MSB)

D10

D09

D08

D07

D06

D05

D04

DGND

1

2

3

4

5

6

7

8

9

10

11

12

13

28

27

26

25

24

23

22

21

20

19

18

17

16

U4

LTC1410

dicl_7.eps

–5V

C8

0.1µF

BUSY

CHIP

SELECT

CONV START

READ

SHUTDOWN

SHUTDOWN MODE

DATA BIT 0

DATA BIT 1

DATA BIT 2

DATA BIT 3

DATA BIT 4

DATA BIT 5

DATA BIT 6

DATA BIT 7

DATA BIT 8

DATA BIT 9

DATA BIT 10

DATA BIT 11

SERIAL CLOCK

SERIAL DATA

DAC LOAD

R1

5.1k

C5

0.1µF

±2.5V ANALOG

INPUT RANGE

C4

0.1µF

C2

0.1µF

C3

0.1µF

C1

0.1µF

C9

0.1µF

–



CLK

SRI

LD



REF



FB

OUT



GND



1

2

3

4



8

7

6

5



U2

LTC8043

U3

LT1220

U1

LT1004-2.5

C7

0.1µF

C6

10µF

2



3



6



5V



–5V



7



4



shows that the LTC1360 is an ideal

solution for driving the ADC’s input

capacitor quickly and cleanly with

excellent stability. Its wide 50MHz

gain bandwidth and 800V/µs slew

rate very adequately complement the

LTC1410’s 20MHz full-power band-

width. The LTC1360 is specified for

±5V operation.

Figure 6 shows the circuit used to

test the performance of op amps driv-

ing the LTC1410’s input and measure

the ADC’s input waveforms.

Adjustable ADC

Reference Voltage

An ADC’s reference voltage should

always be set to a value that maxi-

mizes the number of codes generated

during input signal conversion. If the

reference voltage is set for input sig-

nals with the widest full-scale range,

this might be too large for input sig-

nals with a much smaller range. For

example, an ADC’s full-scale input

DESIGN IDEAS

Linear Technology Magazine • December 1995

Lowpass Filters with Rail-to-Rail Input

and Output

The proliferation of systems oper-

ating exclusively with single 5V

supplies has created a need for ana-

log signal conditioning circuits with

rail-to-rail input and output. Op

amps, A/D converters, and D/A con-

verters with rail-to-rail inputs and

outputs are readily available, but not

high-order lowpass filters. High-

order lowpass filters are used to

provide antialiasing protection for

A/D converters or to bandlimit the

outputs of D/A converters.

Rail-to-Rail, DC-Accurate,

Butterworth and Bessel 7th-

Order Lowpass Filters.

Ther circuit of Figure 1 uses a

dual rail-to-rail op amp and a DC-

accurate switched-capacitor filter to

provide a 7th-order lowpass filter.

The rail-to-rail op amps accommo-

date the nonrail-to-rail output

operation of the switched capacitor

filter. Overall rail-to-rail operation is

achieved by attenuating and level

shifting the input signal and by level

shifting and amplifying the output of

the switched-capacitor filter.

difilt_1.eps

R1

10k R3

10k

R4

49.9k 0.1µF

R2

20k

C3*

0.039µF

LTC1063

OR

LTC1065

*

200k

1µF

TANT

4.99k

4.53k 5V

0.1µF



510pF

R8

20k

R9

10k

OUT

C1

0.1µF

R10

20k

R7

20k 5V

C2

0.1µF

R6*

11.3k

R5*

5.62k

*THE VALUES FOR THESE COMPONENTS DETERMINE 

THE FILTERS –3dB FREQUENCY (SEE TABLE 1).

NOTE: ALL RESISTORS ARE 1% METAL FILM AND

ALL CAPACITORS ARE 5%.

–

1/2

LT1366

–

1/2

LT1366

The circuit of Figure 1 operates

with a single 5V supply and attenu-

ates the input signal by a factor of

two. A 0-to-5V

P–P

input signal ap-

pears as 1.25–3.75V at the input of

the filter. The attenuation factor of

two is chosen as a convenient num-

ber, and does not fully exploit the

3.5V output-voltage range of the

switched-capacitor filter. The penalty

is a mere 2dB loss of signal-to-noise

ratio, yet the circuit is still usable for

12- to 13-bit applications.

The input op amp of Figure 1

provides buffering. A single pole

antialiasing filter is added in front of

the switched capacitor filter through

capacitor C3; its cutoff frequency is

3.3 times the cutoff frequency of the

switched-capacitor filter.

The output op amp of Figure 1

provides an additional 2-pole, con-

tinuous-time filter and restores the

rail-to-rail output swing. Table 1

shows the component values of Fig-

ure 1 for three different cutoff

frequencies. The passive components

were carefully selected to work for

both filter types, Butterworth and

Bessel.

Other cutoff frequencies can be

obtained by scaling the component

values of Table 1. The 7th-order am-

plitude response of the circuit is shown

in Figure 2. Figure 2 was traced with

a 1.7V

RMS

input (4.76V

P–P

), and the

measurement bandwidth was 22kHz.

The filter cutoff frequency was set to

1kHz. Attenuation as high as 80dB is

obtained with the linear-phase

LTC1065 filter. Figure 3 shows the

dynamic range (S/N + THD) of the

filter of Figure 1.

by Philip Karantzalis and Jimmylee Lawson

FREQUENCY (Hz)

–90

–40

–50

–60

–70

–80

–10

–20

–30

GAIN (dB)

10k

difilt_2.eps

100 1k

VS = 5V

LTC1063

LTC1065

Figure 1. 100Hz 7th-Order Butterworth or Bessel lowpass filter with rail-to-rail input and output

Figure 2. Amplitude response of Figure 1’s

circuit for both LTC1063 and LTC1065

DESIGN IDEAS

Linear Technology Magazine • December 1995

–3dB Freq C3 ROS COS R5 R6

10Hz 0.39µF 2M 510pF 56.2k 113k

100Hz 0.039µF 200k 510pF 5.62k 11.3k

1kHz 0.0039µF 19.1k 510pF 562Ω1.13k

Table 1. Component values for Figure 1's circuit for three

different cutoff frequencies

20Hz Rail-to-Rail

Linear-Phase Lowpass

Filter with 60Hz Notch.

The circuit of Figure 5 is a 20Hz

Bessel filter with an additional 60Hz

notch. This type of circuit is useful in

applications where excessive 60Hz

noise is present and, on top of

bandlimiting, additional attenuation

of 60Hz is required. The same scheme

of rail-to-rail op amps is used for

input and output buffering, except

the output of the first op amp is fed

forward to the input of the Sallen-Key

lowpass filter. The output of the

LTC1065 is connected to the nonin-

verting input of the Sallen-Key filter

through R11. When the output of the

first op amp is 180 degrees out of

phase from the output of the LTC1065,

a notch depth of 50dB or greater can

be achieved. In order to achieve this

notch depth for 60Hz, the resistors

R5, R6, R11 and R

must be 0.1%

and the C

capacitor must be 1%

tolerance. Figure 6 shows the gain

response of the circuit in Figure 5.

The 76dB maximum dynamic range

occurs around 4.75V

P–P

and this

should be the full scale of the system.

Figure 4 shows the transient response

of both Butterworth and Bessel 7th-

order filters.

The measured DC gain error of

Figure 1’s circuit is less than 0.5%.

This depends on the matching of re-

sistors R1–R4 and R7–R10. The

measured DC gain nonlinearity of

this circuit is ≤0.1% (–80dB).

difilt_5.eps

R1

10k R3

10k

R4

49.9k 0.1µF

R2

20k

C3

0.039µF

LTC1065



200k

0.1%

1µF

TANT

4.99k

4.53k 5V

0.1µF



510pF

R8

20k

R9

10k

OUT

C1

0.1µF

R10

20k

R7

20k 5V

C2

0.1µF

R6

150k

0.1%

R5

49.9k

0.1%

NOTE: ALL RESISTORS ARE 1% METAL FILM AND

ALL CAPACITORS ARE 5% UNLESS SPECIFIED

OTHERWISE.

–

1/2

LT1366

–

1/2

LT1366

R11

113k

0.1%

Figure 5. Schematic diagram of 20Hz Bessel lowpass filter with 60Hz notch

Figure 3. Dynamic range (THD + Noise) versus

input voltage plot for the circuit of Figure 1 Figure 6. Amplitude response of the circuit

detailed in Figure 5

Figure 4. Oscillograph of square wave

response; top trace is the LTC1065 Bessel

filter, bottom trace is the LTC1063 Butter-

worth filter

BUTTERWORTH

BESSEL

INPUT VOLTAGE (VP-P)

RLOAD = 100k

f–3db = 100Hz

fin = 50Hz

0.5

–90

THD + NOISE (dB)

–40

–45

5.55.0

difilt_3.eps

4.54.03.53.02.52.01.0 1.5

–80

–85

–70

–75

–60

–65

–50

–55

RLOAD = 5k

VS = 5V

FREQUENCY (Hz)

–90

–40

–50

–60

–70

–80

–10

–20

–30

GAIN (dB)

difilt_6.eps

10 100

DESIGN IDEAS

Linear Technology Magazine • December 1995

C-load, continued from page 22

span is set to 5V. Input signals with

magnitudes that cover this span will

use all of the ADC’s codes. However,

an input signal that only spans 2V

will use only 2/5 of the codes, result-

ing in a loss of resolution.

When the reference voltage is re-

duced to 2V, the 2V signal will now

use all of the ADC’s codes. But with

the 2V reference, an input signal

having a 4V span is likely to exceed

the input span, resulting in clipped

signals and missed information. In

cases such as this, an adjustable

reference is needed to adjust the

ADC’s full-scale gain.

input bypass capacitor C5. The

LTC1410 can easily handle a refer-

ence voltage as low as 1V (±2V

P-P

input range) with only a 0.5 LSB

change in linearity error.

Conclusion

Using advanced process technol-

ogy and innovative circuit design,

LTC has created a series of C-Load

operational amplifiers that not only

tolerate capacitive loading, but re-

main stable driving any capacitive

load. C-Load amplifiers meet the

challenging and difficult capacitive

loads by remaining stable and

settling quickly.

The circuit in Figure 7 uses the

LTC8043 12-bit CMOS 4-quadrant

DAC driving the LT1220 C-Load

amplifier to generate variable ADC

reference voltages that allow the user

to adjust the ADC’s gain. An LT1004-

2.5 micropower 2.5V reference is used

as the LTC8043’s reference source,

setting its output span to 0V–2.5V.

The LT1220’s output is applied to the

LTC1410’s V

REF

input. The LT1220

C-Load amplifier ensures that, when

changing the LTC1410’s reference

voltage, the amplifier does not oscil-

late even while driving the reference

PFC, continued from page 11 (Design Features)

probe to see the PFC in action. Scope

probes don’t read duty factor very

well, and probing on the FET drain

reveals a waveform that doesn’t look

like anything you have ever seen be-

fore, and may awaken you in the

middle of the night. It’s not that the

waveform isn’t pretty, it’s that the

waveform is very busy, and it is hard

to see anything like a sine wave in it.

The input current waveform is far

easier to enjoy, it’s just harder to get

to without a good current probe.

Conclusion

PFC is fun. It offers technical chal-

lenges not because it is complicated

but because there are so many little

weirdnesses, all happening together

in concert to provide a beautiful func-

tion. One of the biggest challenges is

to find a place to hook your scope

CONTINUATIONS

Authors can be contacted

at (408) 432-1900

Included with this issue is a

complete index of the circuits

featured in Linear Technology

Magazine, issues I:1 through V:4.

This index evolved as a result of a

request from one of our Field

Applications Engineers, who was

unable to locate a circuit he

believed had appeared in Linear

Technology Magazine. We set out

to create an index in which the

reader could “browse” for a circuit

that fit his or her design needs or

search for a specific Linear

Technology part; we believe that

the table design we used here

thoroughly fulfills this mission. The

reader can page to the desired

circuit category, scan the columns

for the circuit type and/or part

number, and easily find the

appropriate article, issue, page

number, and figure number(s).

Over 250 circuits from the first

five years of Linear Technology

magazine are included in this

index. Hereafter, we will update the

index yearly, so new circuits won’t

get lost. Pleasant Reading!

Index of Circuits in Linear Technology, Issues I:1 Through V:4

Linear Technology Magazine • December 1995

New Device Cameos

LTC1409 and LTC1415:

High Speed, Low Power,

12-bit A/D Converters

LTC has two new 12-bit A/D con-

verters that set a new standard for

high performance at low power. The

LTC1415 is a 12-bit, 1.2Msps A/D

converter that operates on a single

5V supply and draws just 60mW of

power. The LTC1409 is a 12-bit,

800ksps A/D converter with out-

standing dynamic performance

(SINAD = 71dB at Nyquist) that oper-

ates on a ±5V supply.

The LTC1409 and LTC1415 both

have differential input sample-and-

hold circuits that reduce unwanted

high frequency common mode noise.

The LTC1415 has a unipolar input

range of 0V to 4.096V (1mV per LSB).

The LTC1409 has a bipolar input

range of ±2.5V. The input ranges of

both devices are set with an on-chip

2.5V precision voltage reference.

Both devices have parallel output

interfaces that allow easy connection

to microprocessors, DSPs or FIFOs.

Two power-shutdown modes allow

flexibility in further reducing the

power during inactive periods. Both

devices come in 28-pin SO packages.

The LTC1446/LTC1447:

World’s Only Dual

12-Bit, Rail-to-Rail DACs

in SO-8 Packages

The LTC1446 and LTC1447 are

complete dual, 12-bit micropower

DACs with rail-to-rail buffer amplifi-

ers and an onboard reference. Both

parts have a maximum DNL error of

0.5LSB. They have an easy-to-use

cascadable serial interface that is SPI

compatible. Applications for these

parts include industrial process

control, digital calibration, automatic

test equipment, cellular telephones

and portable battery-powered

applications where low supply

current is essential.

The LTC1446 operates on a single

supply ranging from 2.7V to 5.5V,

dissipating a mere 1.35mW from a 3V

supply. It has a wide output swing of

0V to 2.5V. The LTC1447 operates on

a single supply of 4.5V to 5.5V, dissi-

pating 3.5mW. It has an output swing

of 0V to 4.095V. Both parts have an

onboard reference that is connected

internally to each DAC. A D

OUT

allows several parts to be daisy-

chained, and a built-in power-on reset

clears the output to zero-scale at

power-up.

Both the LTC1446 and the

LTC1447 come in an SO-8 package or

a small 8-pin PDIP, allowing efficient

use of circuit board space. These dual

DACs offer excellent DNL, low power

and a convenient serial interface, all

in a tiny SO-8 package.

LT1464: First Micropower

JFET Op Amp for Driving

C-Loads

The LT1464 op amp combines fea-

tures that would normally be unique

to three different types of op amps.

The LT1464 is the first micropower

JFET op amp in our C-Load family of

op amps. The output can drive ca-

pacitive loads up to 10nF with any

load resistance. At the input side of

the op amp, input bias currents are

less than 1pA for demanding track-

and-hold circuits and active filters

that use high-value resistors. Input

common mode range includes the

positive supply. Power supply cur-

rent is typically 250µA, allowing

micropowered battery applications.

For single supply requirements, a full

set of specifications are included for

5V operation. The slew rate is 1V/µs

and the gain bandwidth is 1MHz.

The LTC1458 and LTC1459:

Quad 12-Bit, Rail-to-Rail

Micropower DACs

The LTC1458 and the LTC1459

are complete quad 12-bit micropower

DACs with rail-to-rail buffer amplifi-

ers and an onboard reference. Both of

these parts have a maximum DNL

error of 0.5LSB, and an easy-to-use,

SPI compatible, cascadable serial in-

terface. They also offer several

convenient features that make these

parts flexible and easy to use. Indus-

trial process control, automatic test

equipment and digital calibration are

just a few of the applications for

these parts.

The LTC1458 operates on a single

supply ranging from 2.7V to 5.5V and

dissipates a mere 2.5mW from a 3V

supply. It has a 1.22V onboard refer-

ence. The LTC1459 operates on a

single supply of 4.5V to 5.5V, dissi-

pating 6mW. Its onboard reference is

2.048V. Both of these parts have a

separate reference input pin for each

DAC, which can be driven by an ex-

ternal reference or connected to the

onboard reference output. The user

can also offset the zero-scale voltage

for each DAC by means of a REF

pin. Each of the rail-to-rail buffer

amplifiers will swing to within a few

millivolts of either supply rail and can

be connected in a gain-of-one or a

gain-of-two configuration, giving an

output full-scale of 1×REF

2×REF

respectively. There is a built-

in power on reset and a CLR pin that

resets the output to zero-scale.

Both the LTC1458 and the

LTC1459 come in small 28-pin SSOP

or 28-pin SO packages. These quad

DACs offer the user flexibility with a

host of useful features, excellent DNL

and low power dissipation.

LT1537 5V Powered

RS232 Transceiver

The LT1537 is a new three-driver/

five-receiver RS232 interface trans-

ceiver designed to serve as a serial I/O

port for AT-compatible computers.

The LT1537 is pin compatible with

the LT1137A. Its integral charge-

pump power generator uses low

cost 0.1µF and 0.2µF capacitors to

NEW DEVICE CAMEOS

Linear Technology Magazine • December 1995

NEW DEVICE CAMEOS

generate RS232 levels from standard

5V power supplies. The device has

low power consumption: 8mA in

normal operation and 1µA in shut-

down mode.

The LT1537 is RS232/RS562 stan-

dard compatible. Operation at data

rates in excess of 250kBd for 1,000pF

loads and 120kBd for 2,500pF loads

is guaranteed. Slew rate with 3kΩ,

2500pF loads is a minimum of 4V/µs.

When powered down or in shutdown

mode, the driver outputs remain

high impedance for line voltages to

15V. Both driver outputs and receiver

inputs can be forced to ±25V

without damage.

Whereas most other RS232 trans-

ceivers require external ESD

protection devices, the LT1537 is

protected against ±5kV ESD strikes

to the RS232 inputs and outputs.

This integrated ESD protection saves

the expense and space of external

protection devices. This level of ESD

protection is adequate in most appli-

cations. In applications where high

ESD level protection (IEC-801-2) is

required, our LT1137A provides that

solution. The LT1537 is available in

28-lead SO and SSOP packages.

The LTC1449/1450 Parallel

Input, 12-Bit Rail-to-Rail

Voltage Output Micropower

DACs

The LTC1449 and LTC1450 are

LTC’s first pair of parallel-input, volt-

age output DACs. These devices are

designed as complete DACs with in-

ternal references and buffered, true

rail-to-rail voltage outputs. The ana-

log specifications are equivalent to

those of the LTC1451 serial DAC,

with excellent DNL performance of

less than ±0.5LSBs.

The buffered true rail-to-rail volt-

age output can be configured for two

different full-scale settings. When the

internal reference is used and the

gain-setting pin is tied to ground, the

full-scale range is 2.500V for the

LTC1449 and 4.095V for the LTC1450.

When the gain-setting pin is con-

nected to V

OUT

, the full-scale ranges

The LTC1516 can be substituted

for the MAX619 with improved per-

formance. The part is available in

8-pin PDIP and 8-pin SO packages.

LT1307 1-Cell

Micropower 675kHz

PWM DC/DC Converter

The LT1307 is a micropower, fixed

frequency DC/DC converter that op-

erates from an input voltage as low as

1V. The first device to achieve true

PWM performance from a 1-cell sup-

ply, the LT1307 automatically shifts

to power-saving Burst Mode opera-

tion at light loads. High efficiency is

maintained over a broad 100µA to

100mA load range. The device in-

cludes a low-battery detector with a

200mV reference, and consumes less

than 5µA in shutdown mode. No-load

quiescent current is 50µA, and the

internal NPN power switch handles a

400mA current with a voltage drop of

just 240mV.

Unlike competing devices, the

LT1307 does not require large elec-

trolytic capacitors. Its high frequency

(675kHz) switching allows the use of

tiny surface mount multilayer ceramic

(MLC) capacitors and small surface

mount inductors. It works with just

10µF of output capacitance and re-

quires only 1µF of input bypassing.

The LT1307 is available in the

SO-8 package.

change to 1.220V for the LTC1449

and 2.047V for the LTC1450.

The LTC1449 and LTC1450 are

designed to run off a single supply

while consuming very little power.

The LTC1449 can be powered from a

single supply as low as 2.7V; when

powered from such a supply, it dissi-

pates only 0.75mW. The LTC1450 is

powered from a single 5V supply and

dissipates only 2mW of power. This

low power dissipation makes the

LTC1449 and LTC1450 ideal for bat-

tery-powered applications.

Separate pins are provided for both

ends of the voltage-scaling resistor

network to allow for versatile

connection in multiplying and

external-reference applications.

Double-buffered parallel digital in-

puts provide flexibility and easy

interface to popular DSPs and micro-

processors.

The LTC1449 and LTC1450 are

available in 24-lead PDIP and SSOP

packages.

The LTC1516: Micropower,

Regulated, 5V Charge-Pump

DC/DC Converter

The LTC1516 is a micropower

charge-pump DC/DC converter that

generates a regulated 5V output from

a 2V to 5V supply, without inductors.

Only four external capacitors (two

0.22µF and two 10µF) are required to

deliver a 5V ±4% output with up to

50mA of output load current. Ex-

tremely low supply current (12µA

typical with no load and less than 1µA

in shutdown conditions) and low ex-

ternal parts count make the LTC1516

ideal for small, battery-powered ap-

plications. The LTC1516 achieves

efficiency greater than 75% with load

currents as low as 100µA, due to its

ultralow quiescent current.

To further improve overall effi-

ciency, the LTC1516 operates as either

a doubler or tripler, depending on V

and V

OUT

load conditions. The part

also has thermal shutdown protec-

tion and can survive an indefinite

short from V

OUT

to GND. In shutdown

conditions, the load is disconnected

from V

Burst Mode, Bits-to-Nits and C-Load are

trademarks of Linear Technology Corporation.

, LTC and LT are registered trademarks

used only to identify products of Linear Tech-

nology Corp. Other product names may be

trademarks of the companies that manufac-

ture the products.

Information furnished by Linear

Technology Corporation is believed to be

accurate and reliable. However, Linear

Technology makes no representation that

the circuits described herein will not infringe

on existing patent rights.

For further information on the

above or any of the other devices

mentioned in this issue of Linear

Technology, use the reader service

card or call the LTC literature ser-

vice number: 1-800-4-LINEAR. Ask

for the pertinent data sheets and

application notes.

Linear Technology Magazine • December 1995

AppleTalk



is a registered trademark of Apple Computer, Inc.

LINEAR TECHNOLOGY CORPORATION

1630 McCarthy Boulevard

Milpitas, CA 95035-7417

(408) 432-1900

For Literature Only: 1-800-4-LINEAR

DESIGN TOOLS

Applications on Disk

NOISE DISK

This IBM-PC (or compatible) progam allows the user to calculate circuit noise

using LTC op amps, determine the best LTC op amp for a low noise application,

display the noise data for LTC op amps, calculate resistor noise, and calculate

noise using specs for any op amp. Available at no charge.

SPICE MACROMODEL DISK

This IBM-PC (or compatible) high density diskette contains the library of LTC

op amp SPICE macromodels. The models can be used with any version of

SPICE for general analog circuit simulations. The diskette also contains

working circuit examples using the models, and a demonstration copy of

PSPICE

by MicroSim. Available at no charge.

Technical Books

1990 Linear Databook • Volume I — This 1440 page collection of data sheets

covers op amps, voltage regulators, references, comparators, filters, PWMs,

data conversion and interface products (bipolar and CMOS), in both commer-

cial and military grades. The catalog features well over 300 devices. $10.00

1992 Linear Databook Supplement — This 1248 page supplement to the

1990 Linear Databook

is a collection of all products introduced since then.

The catalog contains full data sheets for over 140 devices. The

1992 Linear

Databook Supplement

is a companion to the

1990 Linear Databook

, which

should not be discarded. $10.00

1994 Linear Databook • Volume III — This 1826 page supplement to the

1990 Linear Databook

and

1992 Linear Databook Supplement

is a collection

of all products introduced since 1992. A total of 152 product data sheets are

included with updated selection guides. The

1994 Linear Databook Volume III

is a supplement to the 1990 and 1992 Databooks, which should not be

discarded.

$10.00

1995 Linear Databook • Volume IV — This 1152 page supplement to the

1990, 1992 and 1994 Linear Databooks

is a collection of all products introduced

since 1994. A total of 80 product data sheets are included with updated

selection guides. The

1995 Linear Databook Vol IV

is a companion to the

1990,

1992 and 1994 Linear Databooks

, which should not be discarded. $10.00

Linear Applications Handbook • Volume I — 928 pages full of application

ideas covered in depth by 40 Application Notes and 33 Design Notes.

This catalog covers a broad range of “real world” linear circuitry. In addition to

detailed, systems-oriented circuits, this handbook contains broad tutorial

content together with liberal use of schematics and scope photography.

A special feature in this edition includes a 22 page section on SPICE

macromodels. $20.00

1993 Linear Applications Handbook • Volume II — Continues the stream

of “real world” linear circuitry initiated by the

1990 Handbook

. Similar in scope

to the 1990 edition, the new book covers Application Notes 41 through 54 and

Design Notes 33 through 69. Additionally, references and articles from non-

LTC publications that we have found useful are also included. $20.00

Interface Product Handbook

— This 424 page handbook features LTC’s

complete line of line driver and receiver products for RS232, RS485,

RS423, RS422, V.35 and AppleTalk



applications. Linear’s particular

expertise in this area involves low power consumption, high numbers of

drivers and receivers in one package, mixed RS232 and RS485 devices, 10kV

ESD protection of RS232 devices and surface mount packages.

Available at no charge.

SwitcherCAD Handbook — This 144 page manual, including disk, guides

the user through SwitcherCAD—a powerful PC software tool which aids in the

design and optimization of switching regulators. The program can cut days off

the design cycle by selecting topologies, calculating operating points and

specifying component values and manufacturer's part numbers. $20.00

1995 Power Solutions Brochure,

First Edition

— This 64 page collection

of circuits contains real-life solutions for common power supply design

problems. There are over 45 circuits, including descriptions, graphs and

performance specifications. Topics covered include PCMCIA power manage-

ment, microprocessor power supplies, portable equipment power supplies,

micropower DC/DC, step-up and step-down switching regulators, off-line

switching regulators, linear regulators and switched capacitor conversion.

Available at no charge.

FRANCE

Linear Technology S.A.R.L.

Immeuble “Le Quartz”

58 Chemin de la Justice

92290 Chatenay Malabry

France

Phone: 33-1-41079555

FAX: 33-1-46314613

GERMANY

Linear Techonolgy GmbH

Oskar-Messter-Str. 24

85737 Ismaning

Germany

Phone: 49-89-962455-0

FAX: 49-89-963147

JAPAN

Linear Technology KK

5F NAO Bldg.

1-14 Shin-Ogawa-cho Shinjuku-ku

Tokyo, 162 Japan

Phone: 81-3-3267-7891

FAX: 81-3-3267-8510

KOREA

Linear Technology Korea Co., Ltd

Namsong Building, #403

Itaewon-Dong 260-199

Yongsan-Ku, Seoul 140-200

Korea

Phone: 82-2-792-1617

FAX: 82-2-792-1619

SINGAPORE

Linear Technology Pte. Ltd.

507 Yishun Industrial Park A

Singapore 2776

Phone: 65-753-2692

FAX: 65-754-4113

TAIWAN

Linear Technology Corporation

Rm. 602, No. 46, Sec. 2

Chung Shan N. Rd.

Taipei, Taiwan, R.O.C.

Phone: 886-2-521-7575

FAX: 886-2-562-2285

UNITED KINGDOM

Linear Technology (UK) Ltd.

The Coliseum, Riverside Way

Camberley, Surrey GU15 3YL

United Kingdom

Phone: 44-1276-677676

FAX: 44-1276-64851

Linear Technology Corporation

1630 McCarthy Boulevard

Milpitas, CA 95035-7417

Phone: (408) 432-1900

FAX: (408) 434-0507

International

Sales Offices

World Headquarters

U.S. Area

Sales Offices

CENTRAL REGION

Linear Technology Corporation

Chesapeake Square

229 Mitchell Court, Suite A-25

Addison, IL 60101

Phone: (708) 620-6910

FAX: (708) 620-6977

NORTHEAST REGION

Linear Technology Corporation

3220 Tillman Drive, Suite 120

Bensalem, PA 19020

Phone: (215) 638-9667

FAX: (215) 638-9764

Linear Technology Corporation

266 Lowell St., Suite B-8

Wilmington, MA 01887

Phone: (508) 658-3881

FAX: (508) 658-2701

NORTHWEST REGION

Linear Technology Corporation

782 Sycamore Dr.

Milpitas, CA 95035

Phone: (408) 428-2050

FAX: (408) 432-6331

SOUTHEAST REGION

Linear Technology Corporation

17000 Dallas Parkway

Suite 219

Dallas, TX 75248

Phone: (214) 733-3071

FAX: (214) 380-5138

Linear Technology Corporation

5510 Six Forks Road

Suite 102

Raleigh, NC 27609

Phone: (919) 870-7834

FAX: (919) 870-8831

SOUTHWEST REGION

Linear Technology Corporation

21243 Ventura Blvd.

Suite 227

Woodland Hills, CA 91364

Phone: (818) 703-0835

FAX: (818) 703-0517

Linear Technology Corporation

15375 Barranca Parkway

Suite A-211

Irvine, CA 92718

Phone: (714) 453-4650

FAX: (714) 453-4765