FSTD16244MTD - Fairchild Semiconductor

Preliminary

November 2001

Revised November 2001

FSTD16244 16-Bit Bus Switch with Level Shifting (Preliminary)

FSTD16244

16-Bit Bus Switch with Level Shifting (Preliminary)

General Description

The Fai rchild Switch FS TD16244 prov ides 16-bits of hi gh-

speed CMOS TTL-compatible bus switching. The low On

Resistance of the switch allows inputs to be connected to

outputs without adding propagation delay or generating

addition al ground boun ce noise. A diode to VCC has been

integrated into the circuit t o a llow for leve l shifting b etween

5V inputs and 3.3V outputs.

The devi ce is o rganized as a 16-bit sw itch. The re are four

4-bit switches with separate output enable inputs. When

OE is LOW, the switch in ON and Port A is connected to

Port B. When OE

is HIGH, the switch OFF and a high

impedance state exists between the A and B Ports.

Features

■4Ω switch connection between two ports.

■Minimal propagation delay through the switch.

■Low lCC.

■Zero bounce in flow-through mode.

■Control inputs compatible with TTL level.

■TruTranslation voltage translation from 5.0V inputs to

3.3V output s

Ordering Code:

Devices also available in Tape and Reel. Speci fy by append ing the suffix let t er “X” to the o rdering code.

TruTranslation is tradem ark of Fa irc hild Semic onduct or C orpora tio n.

Order Number Package Number Package Description

FSTD16244MTD MTD48 48-Lead Thin Shrink Small Outl ine Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Preliminary

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FSTD16244

Connection Diagram Logic Diagram

Pin Descriptions Truth Table

H = HIGH Voltage Lev el L = LOW Voltage Level Z = High Impedance

Pin Nam e Descri ption

OEnOutput Enable Input (Active LOW)

1An, 2An, 3An, 4AnBus A

1Bn, 2Bn, 3Bn, 4BnBus B

Inputs Outputs

OExA, B

LA Port = B Port

Preliminary

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FSTD16244

Absolute Maximum Ratings(Note 1) Recommended Operating

Conditions (Note 4)

Note 1: The “A bsolute Maximum Ratings” are those values beyon d which

the saf ety of the device cannot be gu aranteed. Th e device shou ld not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “R ecomm ended Ope rating Co ndition s” table will define the condit ions

for actu al device operation.

Note 2: VS is t he voltage obs erv ed/applie d at e i t her the A or B Ports acros s

the switch.

Note 3: The input and output negative voltage ratings may be exceeded if

the in put and output diode curr ent ra tings are observe d.

Note 4: Unused control inputs must be held HIGH or LOW. They may not

float.

DC Electrical Characteristics

Note 5: Ty pic al values are at VCC = 5.0V and TA = +25°C

Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the

voltages on the tw o (A or B) pins.

Supply Voltage (VCC)−0.5V to +7.0V

DC Switch Voltage (VS) (Note 2) −0.5V to +7.0V

DC Input Voltage (VIN) (Note 3) −0.5V to +7.0V

DC Input Diode Current (lIK) VIN < 0V −50mA

DC Output (IOUT) Current 128mA

DC VCC/GND Current (ICC/IGND)±100mA

Storage Temperature Range (TSTG)−65°C to +150 °C

Power Su pply Ope rat i ng (VCC) 4.5V to 5.5V

Input Voltage (VIN) 0V to 5.5V

Output Voltage (VOUT) 0V to 5.5V

Input Rise and Fall Time (tr, tf)

Switch Control Input 0 ns/V to 5 ns/V

Switch I/O 0 ns/V to DC

Free Air Operating Temperature (TA)-40°C to +85°C

Symbol Parameter

TA = −40°C to +85°C

Units ConditionsVCC Min Typ Max

(V) (Note 5)

VIK Clamp Diode Voltage 4.5 −1.2 V IIN = −18mA

VIH HIGH Level Input Voltage 4.5 - 5.5 2.0 V

VIL LOW Level Input Voltage 4.5 - 5.5 0.8 V

VOH HIGH Level 4.5 - 5.5 See Figure 3 V

IIInput Leakage Current 5.5 ±1.0 µA0 ≤ VIN ≤ 5.5V

0±10 µAV

IN = 5.5V

IOZ OFF-STATE Leakage Current 5.5 ±1.0 µA0 ≤ A, B ≤ VCC

RON Switch On Resistance 4.5 4 7 ΩVIN = 0V, IIN = 64mA

(Note 6) 4.5 4 7 ΩVIN = 0V, IIN = 30mA

4.5 35 50 ΩVIN = 2.4V, IIN = 15mA

ICC Quiescent Supply Current

5.5 1.5 mA OEn = GND

VIN = VCC or GND, IOUT = 0

10 µAOEn = VCC

VIN = VCC or GND, IOUT = 0

∆ ICC Increase in ICC per Input 5.5 2.5 mA One Input at 3.4V

Other Inputs at VCC or GND

Preliminary

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FSTD16244

AC Electrical Characteristics

Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On

Resis t ance of th e s w it c h and the 50pF load ca pacitanc e, when driv en by an ideal volta ge s ource (ze ro output im pedance).

Capacitance (Note 8)

Note 8: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.

AC Loading and Waveforms

Note: Input driven by 50Ω source term inated in 50Ω

Note: CL includes lo ad and stra y capacitance

Note: Input PRR = 1.0 MHz, tW = 500 ns

FIGURE 1. AC Test Circuit

FIGURE 2. AC Waveforms

Symbol Parameter

TA = −40 °C to +85 °C,

Units Conditions

CL = 50pF, RU = RD = 500ΩFigure

VCC = 4.5 – 5.5V Number

Min Max

tPHL, tPLH Propagation Delay Bus-to-Bus

(Note 7) 0.25 ns VI = OPEN Figures

1, 2

tPZH, tPZL Output Enable Time 1.0 5.1 ns VI = 7V for tPZL Figures

1, 2

VI = OPEN for tPZH

tPHZ, tPLZ Output Disable Time 1.0 5.4 ns VI = 7V for tPLZ Figures

1, 2

VI = OPEN for tPHZ

Symbol Parameter Typ Max Units Conditions

CIN Control Pin Input Capacitance 3 pF VCC = 5.0V, VIN = 0V

CI/O Input/Output Capacitance “OFF State”6pFV

CC, OE = 5.0V, VIN = 0V

Preliminary

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FSTD16244

Output Voltage HIGH vs. Supply Voltage

FIGURE 3.

Preliminary

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FSTD16244 16-Bit Bus Switch with Level Shifting (Preliminary)

Physical Dimensions inches (millimeters) unless otherwise noted

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD48

Technology Description

The Fairchild Switch fam ily derives from and embodies Fairchild’s proven s witch technolog y used for seve ral years in its

74LVX3L38 4 (FST3384 ) bus swit ch product.

Fairchild does not assu me any responsibility for use of any circuitry de scribed, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life suppor t de vices o r syste ms are devices or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical compon ent i n any compon ent of a lif e supp ort

device or system whose failure to perform can be rea-

sonabl y ex pect ed to ca use the fa ilu re of the li fe su pp ort

device or system, or to affect its safety or effectiveness.