June 2012
©2012 Fairchild Semiconductor Corporation
FDMC7660 Rev.C5 www.fairchildsemi.com
1
FDMC7660 N-Channel PowerTrench® MOSFET
FDMC7660
N-Channel PowerTrench® MOSFET
30 V, 20 A, 2.2 mΩ
Features
Max rDS(on) = 2.2 mΩ at VGS = 10 V, ID = 20 A
Max rDS(on) = 3.3 mΩ at VGS = 4.5 V, ID = 18 A
High performance technology for extremely low rDS(on)
Termination is Lead-free and RoHS Compliant
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced PowerTrench® process that has
been especially tailored to minimize the on-state resistance. Thi s
device is well suited for Power Management and load switching
applications common in Notebook Computers and Portable
Battery Packs.
Applications
DC - DC Buck Converters
Point of Load
High Efficiency Load Switch and Low Side Switching
S
S
S
G
D
D
D
D
Top
Power 33
Bottom
DDDD
SSSG
Pin 1
MOSFET Maximum Ratings TC = 25°C unless otherwise noted
Thermal Characteristics
Package Marking and Ordering Information
Symbol Parameter Ratings Units
VDS Drain to Source Voltage 30 V
VGS Gate to Source Volt age (Note 4) ±20 V
ID
Drain Current -Continuous (Package limited) TC = 25°C 40
A
-Continuous (Silicon limited) TC = 25°C 100
-Continuous TA = 25°C (Note 1a) 20
-Pulsed 200
EAS Single Pulse Avalanche Energy (Note 3) 200 mJ
PDPower Dissipation TC = 25°C 41 W
Power Dissipation TA = 25°C (Note 1a) 2.3
TJ, TSTG Operating and Storage Junction Temperature Range -55 to + 150 °C
RθJC Thermal Resistance, Junction to Case 3 °C/W
RθJA Thermal Resistance, Junction to Ambient (Note 1a) 53
Device Marking Device Package Reel Size Tape Width Quantity
FDMC7660 FDMC7660 Power 33 13’’ 12 mm 3000 units
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©2012 Fairchild Semiconductor Corporation
FDMC7660 Rev.C5
FDMC7660 N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25°C unless otherwise noted
Off Characteristic s
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Symbol Parameter Test Conditions Min Typ Max Units
BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V30 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient ID = 250 μA, referenced to 25°C 14 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V1μA
IGSS Gate to Source Leakage Current VGS = 20 V, VDS = 0 V 100nA
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 1.2 1.7 2.5 V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient ID = 250 μA, referenced to 25°C -6 mV/°C
rDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 20 A 1.82.2
mΩVGS = 4.5 V, ID = 18 A2.63.3
VGS = 10 V, ID = 20 A, TJ = 125°C 2.2 3.1
gFS Forward Transconductance VDS = 5 V, ID = 20 A 163 S
Ciss Input Capacitance VDS = 15 V, VGS = 0 V,
f = 1MHz
3630 4830 pF
Coss Output Capacitance 1345 1790 pF
Crss Reverse Transfer Capacitance 110 165 pF
RgGate Resistance 0.9 Ω
td(on) Turn-On Delay Time VDD = 15 V, ID = 20 A,
VGS = 10 V, RGEN = 6 Ω
14 25 ns
trRise Time 6.8 14 ns
td(off) Turn-Off Delay Time 36 58 ns
tfFall Time 5.7 11 ns
QgTotal Gate Charge VGS = 0 V to 10 VVDD = 15 V,
ID = 20 A
54 86 nC
QgTotal Gate Charge VGS = 0 V to 4.5 V2438nC
Qgs Gate to Source Charge 11 nC
Qgd Gate to Drain “Miller” Charge 5.6 nC
VSD Source-Drain Diode Forward Vo ltage VGS = 0 V, IS = 20 A (Note 2) 0.8 1.2 V
VGS = 0 V, IS = 1.9 A (Note 2) 0.7 1.2
trr Reverse Recovery Time IF = 20 A, di/dt = 100 A/μs 45 63 ns
Qrr Reverse Recovery Charge 25 35 nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mo unting surface of the drain pins.
RθJC is guaranteed by design while RθJA is determined by the user’s board design.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. Starting TJ = 25 °C, L = 1 mH, IAS = 20 A, VDD = 27 V, VGS = 10 V
4. As an N-channel device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.
53 °C/W when mounted on a
1 in2 pad of 2 oz copper
a.
125 °C/W when mounted on
a minimum pad of 2 o z copper
b.
G
DF
DS
SF
SS
G
DF
DS
SF
SS
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©2012 Fairchild Semiconductor Corporation
FDMC7660 Rev.C5
FDMC7660 N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
Figure 1.
0.0 0.5 1.0 1.5 2.0
0
50
100
150
200
VGS = 4.5 V
VGS = 3.5 V
VGS = 3 V
VGS = 4 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 10 V
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
On Region Characteristics Figure 2.
0 50 100 150 200
0.5
1.0
1.5
2.0
2.5
3.0
VGS = 3.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
VGS = 4 V
VGS = 4.5 V
VGS = 3 V
VGS = 10 V
Normalized On-Resistance
vs Drain Current and Gate Voltage
Figure 3. Normalized On Resistance
-75 -50 -25 0 25 50 75 100 125 150
0.8
1.0
1.2
1.4
1.6
ID = 20 A
VGS = 10 V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
TJ, JUNCTION TEM PER ATURE (oC)
vs Junction Te mperature Figure 4.
246810
0
5
10
15
TJ = 125oC
ID = 20 A
TJ = 25 oC
VGS, GATE TO SOURCE VOLTAGE (V)
rDS(on), DRAIN TO
SOURCE ON-RESISTANCE (mΩ)
PULSE D U R ATION = 80 μs
DUTY CYCLE = 0.5% MAX
On-Resistance vs Gate to
Source Voltage
Figure 5. Transfer Characteristics
1234
0
50
100
150
200
TJ = 150 oC
VDS = 5 V
PULSE D U RATION = 80 μs
DUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
ID, DRAIN CURRENT (A)
VGS, GATE TO SO U RC E V OLTAGE (V)
Figure 6.
0.2 0.4 0.6 0.8 1.0 1.2
0.1
1
10
100
TJ = -55 oC
TJ = 25 oC
TJ = 150 oC
VGS = 0 V
IS, REVERSE DRAIN CURRENT (A)
VSD, BODY DIODE FORWARD VOLTAGE (V)
200
Source to Drain Diode
Forward Voltage vs Source Current
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©2012 Fairchild Semiconductor Corporation
FDMC7660 Rev.C5
FDMC7660 N-Channel PowerTrench® MOSFET
Figure 7.
0204060
0
2
4
6
8
10 ID = 20 A
VDD = 20 V
VDD = 10 V
VGS, GATE TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
VDD = 15 V
Gate Charge Characteristics Figure 8.
0.1 1 10
0.05
0.1
1
10
f = 1 MHz
VGS = 0 V
CAPACITANC E (n F)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Crss
Coss
Ciss
30
Capacitance vs Drain
to Source Voltage
Figure 9.
0.01 0.1 1 10 100 300
1
10
30
TJ = 100 oC
TJ = 25 oC
TJ = 125 oC
tAV, TIME IN AVALANCHE ( ms)
IAS, AVALANCHE CURRENT (A)
Unc l amp e d Ind u ctiv e
Switching Capability Figure 10.
25 50 75 100 125 150
0
50
100
150
Limited by Package
VGS = 4.5 V
RθJC = 3 oC/W
VGS = 10 V
ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC)
Maximum Continuous Drain
Current vs Case Temperature
Figure 11. Forward Bias Safe
Operating Area
0.01 0.1 1 10 100
0.01
0.1
1
10
100
300 DERIVED FROM
TESTED DA TA
1 ms
1 s
10 m s
DC
10 s
100 m s
ID, DRAIN CURRENT (A)
VDS, DRAIN to SOURCE VOLTAGE (V)
THI S AR EA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MAX RATED
RθJA = 125 oC/W
TA = 25 oC
Figure 12.
10-3 10-2 10-1 100101102103
0.5
1
10
100
1000 SINGLE PULSE
RθJA = 125 oC/W
TA = 25 oC
P(PK), PEAK TRANSIENT POWER (W)
t, PULSE WIDTH (sec)
Single Pulse Maximum
Power Dissipation
Typical Characteristics TJ = 25°C unless otherwise noted
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©2012 Fairchild Semiconductor Corporation
FDMC7660 Rev.C5
FDMC7660 N-Channel PowerTrench® MOSFET
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
10-3 10-2 10-1 100101100 1000
1E-3
0.01
0.1
1
SINGLE PULSE
RθJA = 125 oC/W
DUTY CYCLE-DESCENDING ORDER
NORMALIZED THERM AL
IMPEDANCE, ZθJA
t, RECTANGULAR PULSE DURATION (sec)
D = 0.5
0.2
0.1
0.0 5
0.0 2
0.0 1
2
PDM
t1t2
NOTES:
DUTY F ACT O R: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
Typical Characteristics TJ = 25°C unless otherwise noted
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6
©2012 Fairchild Semiconductor Corporation
FDMC7660 Rev.C5
FDMC7660 N-Channel PowerTrench® MOSFET
Dimensional Outline and Pad Layout
FDMC7660 N-Channel PowerTrench® MOSFET
©2012 Fairchild Semiconductor Cor poration 7 www.fairchildsemi.com
FDMC7660 Rev.C5
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