Revised October 2000 74F381 4-Bit Arithmetic Logic Unit General Description Features The 74F381 performs three arithmetic and three logic operations on two 4-bit words, A and B. Two additional select input codes force the function outputs LOW or HIGH. Carry propagate and generate outputs are provided for use with the 74F182 carry lookahead generator for high-speed expansion to longer word lengths. For ripple expansion, refer to the 74F382 ALU data sheet. Low input loading minimizes drive requirements Performs six arithmetic and logic functions Selectable LOW (clear) and HIGH (preset) functions Carry generate and propagate outputs for use with carry lookahead generator Ordering Code: Order Number Package Number Package Description 74F381SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F381SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F381PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Logic Symbols Connection Diagram IEEE/IEC (c) 2000 Fairchild Semiconductor Corporation DS009528 www.fairchildsemi.com 74F381 4-Bit Arithmetic Logic Unit May 1988 74F381 Unit Loading/Fan Out Pin Names Description U.L. Input IIH/IIL HIGH/LOW Output IOH/IOL A0-A3 A Operand Inputs 1.0/3.0 20 A/-1.8 mA B0-B3 B Operand Inputs 1.0/3.0 20 A/-1.8 mA S0-S2 Function Select Inputs 1.0/1.0 20 A/-0.6 mA Cn Carry Input 1.0/4.0 20 A/-2.4 mA G Carry Generate Output (Active LOW) 50/33.3 -1 mA/20 mA P Carry Propagate Output (Active LOW) 50/33.3 -1 mA/20 mA F0-F3 Function Outputs 50/33.3 -1 mA/20 mA Functional Description Function Select Table Signals applied to the Select inputs S0-S2 determine the mode of operation, as indicated in the Function Select Table. An extensive listing of input and output levels is shown in the Truth Table. The circuit performs the arithmetic functions for either active HIGH or active LOW operands, with output levels in the same convention. In the Subtract operating modes, it is necessary to force a carry (HIGH for active HIGH operands, LOW for active LOW operands) into the Cn input of the least significant package. Select The Carry Generate (G) and Carry Propagate (P) outputs supply input signals to the 74F182 carry lookahead generator for expansion to longer word length, as shown in Figure 2. Note that an 74F382 ALU is used for the most significant package. Typical delays for Figure 2 are given in Figure 1. S0 S1 S2 L L L Clear H L L B Minus A L H L A Minus B H H L A Plus B A B L L H H L H A+B L H H AB H H H Preset H = HIGH Voltage Level L = LOW Voltage Level Toward Output F Cn + 4, OVR Path Segment Ai or Bi to P 7.2 ns 7.2 ns Pi to Cn + ('F182) 6.2 ns 6.2 ns Cn to F 8.1 ns -- -- 8.0 ns 21.5 ns 21.4 ns Cn or Cn + 4, OVR Total Delay FIGURE 1. 16-Bit Delay Tabulation FIGURE 2. 16-Bit Lookahead Carry ALU Expansion www.fairchildsemi.com 2 Operation 74F381 Truth Table Inputs Function CLEAR B Minus A A Minus B A Plus B AB A+B AB PRESET Outputs S0 S1 S2 Cn An Bn F0 F1 F2 F3 G L L L X X X L L L L L L L L L H H H H H L L L H L H H H L L L H L L L L L H H L H H H H H H H L H L L L L L L H L H L H H H H H L L H H L H L L L H H H H H L L L L H L L L L H H H H H L L L H L L L L H H L H L L H H H L L L H H H H H H H L H L L L L L L H L H L H H L L L H H H L H L H L H L H H L L H H L L L H H H H P H H L H H H H L L H H H L L L L H L L L L L L L L H H L L H H H H H H L L H L H H H H H L L H H L H H H L L H L L H L L L H H H L H L L L L H L H H L L L L L H L H H H H H H H L L X L L L L L L H H H X L H H H H H H X H L H H H H H L X H H L L L L L L X L L L L L L H H X L H H H H H H H X H L H H H H H H X H H H H H H H L X L L L L L L L L X L H L L L L H H X H L L L L L L L X H H H H H H H L X L L H H H H H H X L H H H H H H H X H L H H H H H H X H H H H H H H L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial 3 www.fairchildsemi.com 74F381 Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 4 Recommended Operating Conditions Storage Temperature -65C to +150C Ambient Temperature under Bias -55C to +125C Free Air Ambient Temperature Junction Temperature under Bias -55C to +150C Supply Voltage 0C to +70C +4.5V to +5.5V -0.5V to +7.0V VCC Pin Potential to Ground Pin Input Voltage (Note 2) -0.5V to +7.0V Input Current (Note 2) -30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output -0.5V to VCC 3-STATE Output -0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. Current Applied to Output in LOW State (Max) twice the rated IOL (mA) DC Electrical Characteristics Symbol Parameter Min Typ Max VCC VIL Input LOW Voltage 0.8 V VCD Input Clamp Diode Voltage -1.2 V Min V Min 0.5 V Min 5.0 A 7.0 A Max VIN = 7.0V 50 A Max VOUT = VCC V 0.0 3.75 A 0.0 -0.6 mA Max -1.8 mA Max VIN = 0.5V (An, Bn) -2.4 mA Max VIN = 0.5V (Cn) VOUT = 0V Output HIGH Voltage VOL Output LOW Voltage IIH Input HIGH IBVI Input HIGH Current ICEX Output HIGH 10% VCC 2.5 5% VCC 2.7 V Conditions Input HIGH Voltage VOH 2.0 Units VIH 10% VCC Current Breakdown Test Leakage Current VID Input Leakage Test IOD 4.75 Output Leakage Circuit Current IIL Input LOW Current IOS Output Short-Circuit Current ICC Power Supply Current -60 59 5 Recognized as a HIGH Signal Recognized as a LOW Signal IIN = -18 mA IOH = -1 mA IOH = -1 mA IOL = 20 mA VIN = 2.7V -150 mA Max 89 mA Max IID = 1.9 A All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VIN = 0.5V (Sn) www.fairchildsemi.com 74F381 Absolute Maximum Ratings(Note 1) 74F381 AC Electrical Characteristics Symbol Parameter TA = +25C TA = 0C to +70C VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 50 pF Min Typ Max Min Max tPLH Propagation Delay 2.5 8.1 12.0 2.5 13.0 tPHL Cn to Fi 2.5 5.7 8.0 2.5 9.0 tPLH Propagation Delay 4.0 10.4 15.0 4.0 16.0 tPHL Any A or B to Any F 3.5 8.2 11.0 3.5 12.0 tPLH Propagation Delay 4.5 8.3 20.5 4.5 21.5 tPHL Si to Fi 4.0 8.2 15.0 4.0 16.0 tPLH Propagation Delay 3.5 6.4 10.0 3.5 11.0 tPHL Ai or Bi to G 3.5 6.8 10.0 3.0 11.0 tPLH Propagation Delay 2.5 7.2 10.5 2.5 11.5 tPHL Ai or Bi to P 3.5 6.5 9.5 3.5 10.5 tPLH Propagation Delay 4.0 7.8 12.0 4.0 13.0 tPHL Si to G or P 4.5 10.2 13.5 4.5 14.5 www.fairchildsemi.com 6 Units ns ns ns ns ns ns 74F381 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 7 www.fairchildsemi.com 74F381 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D www.fairchildsemi.com 8 74F381 4-Bit Arithmetic Logic Unit Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 9 www.fairchildsemi.com