PBX (SOHO-PBX) - Infineon Technologies

ICs for Communications

Small PBX (SOHO)

Solution Guide for Small PBX (SOHO)

Solution Guide 04.99 DS 1

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Edition 04.99

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Small PBX (SOHO)
Table of Contents Page
Solution Guide  3 04.99
1Introduction  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
2What is a small PBX (SOHO-P BX)?  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
3Questionnaire . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
4Solutions for Small PBX systems  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
1 Low-cost, basic feature small PBX  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
1.1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
1.2 Block Diagram  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
1.3 Explanation  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
2 Low cost, extended feature small PBX  . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
2.1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
2.2 Block Diagram  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
2.3 Explanation  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
3 Small PBX with V.24 dataport  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
3.1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
3.2 Block Diagram  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
3.3 Explanation  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
4 Small PBX with USB/V.24 dataport . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
4.1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
4.2 Block Diagram  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
4.3 Explanation  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
5 DSP based small PBX with up to four S-interfaces . . . . . . . . . . . . . . . . . . .19
5.1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
5.2 Block Diagram  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
5.3 Explanation  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
5Future Additions to Existing Concepts . . . . . . . . . . . . . . . . . . . . . . . . . .21
1 DuSLIC Concept  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
2 New S-Transceivers   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
6Application Specific Details on Chipsets  . . . . . . . . . . . . . . . . . . . . . . . .23
1 ISAC-S TE PSB 2186  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
1.2 Documentation Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
2 ISAC-S PEB 2086  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
2.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
2.2 Documentation Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
3 IPAC PSB 2115 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
3.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
3.2 Documentation Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
4 SBCX PEB 2081  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
4.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27

Solution Guide Small PBX Systems
Solution Guide  4 04.99
4.2 Documentation Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
5 SICOFI-2/-4 TE PSB 2132/34  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
5.1 Features   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28
5.2 Documentation Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
6 C513A/C513AO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
6.1 Features   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
6.2 Documentation Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
7 C161V/-K/-O/-RI/-PI/-OR/  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
7.1 Features   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
7.2 Documentation Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
8 C165 UTAH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
8.1 Features   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
8.2 Documentation Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
9 C161U  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
9.1 Documentation Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
10 DELPHI PEB 20750   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
10.1 Features of DELPHI-PB   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
10.2 Documentation Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
11 VIP PEB 20590  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
11.1 Features   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
11.2 Documentation Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
12 IPAC-X, ISAC-SX and SBCX-X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
12.1 Features   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
12.2 Documentation Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
13 DuSLIC  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
13.1 Features   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37
13.2 Documentation Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
14 Voltage Regulator TLE 4263 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
14.1 Features   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
14.2 Documentation Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
15 LED LxS269   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
15.1 Documentation Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
7Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
8Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43

Solution Guide Small PBX Systems

Introduction

Solution Guide 5 04.99

1 Introduction

This solution guide shows the actual and future solutions for Small Office and Home

Office PBX systems (SOHO) using the Infi neon Tech nologie s AG i.Gr. c hipsets. First a

number of ques tions will lead to the optimized solution for the spec ific requirements of

the small PBX. For each solution the used devices and their interconnection are

explained and the benefits outlined.

In addition references to additional documentation and tooling are given.

But at first it will be explained, what a small PBX is and where it can be applied.

2 What is a small PBX (SOHO-PBX)?

In this document a small PBX is referred to a PBX that has up to eight analog POTS

interfaces, one or two ISDN basic rate S-interface trunk lines and a small number of

subscriber ISDN S-interface lines (0 to 3 lines).

A dataport is an optional feature.

For more numb ers of S-in terfaces or a prim ary rate S-i nterface, please refer to the " HL

Solution Guide for Medium/Large PBX".

In principle a small PBX looks like that:

Figure 1 Principle block diagram of a small PBX

S/T-Transceiver

IS A C -S T E

IPAC

SBCX

Microcontroller

C513A

C 161 Fam .

C165 UTAH

POTS In te rfa c e

SICO FI-2/4 TE

DuSLIC

t/r

Dataport

HSCX-TE

3PAC

V.24

S/T-Transceiver

SBCX

Up To 8

Solution Guide Small PBX Systems
Questionnaire
Solution Guide  6 04.99
3 Questionnaire
1. How many analog POTS interfaces should be realized in the application?
Number of POTS lines: ............
2. How many ISDN basic rate Sinterface trunk interfaces should be available?
1 trunk interface (continue with step 3 of this questionnaire)
>1 trunk interface (please go to Chapter 4.5 for the corresponding concept)
3. Is this PBX capable of handling system telephones (Up interface)?
yes (please go to Chapter 4.5 for the corresponding concept)
no (continue with step 4)
4. Should the PBX have a dataport (RS-232 or USB)?
yes (please continue with step 6 of the questionnaire)
no (continue with step 5)
5. How many ISDN  basic rate Sinterfac e subscriber interfac es should be su pported by
the PBX?
0 subscriber interfaces (please go to Chapter 4.1 for th e corres pondin g concep t)
1 subscriber interface (please go to Chapter 4.2 for the corresponding concept)
>1 subscriber interfaces (please go to Chapter 4.5 for the corresponding concept)
6. What data interface should be used?
RS-232 (plea se go to Chapter 4.3 for the corresponding concept)
USB (please go to Chapter 4.4 for the corresponding concept)
USB and RS-232 (please go to Chapter 4.4 for the corresponding concept)

Solution Guide Small PBX Systems

Questionnaire

Solution Guide 7 04.99

The following flow-diagram represents the decision tree.

Figure 2 Decision flow - Design Selection

Chapter 4.3 Chapter 4.4 Chapter 4.1 Chapter 4.2 Chapter 4.5

Number of

S-if trunk

lines

System

Telephones

(Up-if)?

yes

Dataport

(USB or RS-232)?

Type of Dataport yes

Number of

S-if subscriber

lines

RS-232 USB

and / or

RS-232

Solution Guide Small PBX Systems

Solutions for Small PBX systems

Solution Guide 8 04.99

4 Solutions for Small PBX systems

4.1 Low-cost, basic feature small PBX

4.1.1 Description

The following PBX is a system with one ISDN basic rate Sinterface on the trunk side and

with 2 to 8 analog lines to connect POTS telephones.

This system consists of four parts: Sinterface, POTS-interface, microcontroller and

power supply.

4.1.2 Block Diagram

Figure 3 Low-cost, basic feature small PBX (solution with DuSLIC)

PSB 2186

(S-Transceiver;

D-HDLC)

SLIC-x

2 .. 8 x

AC/DC

POTS

Supply

220V

C513

(8-Bit µC)

PCM

Bus

SCI

parallel

µC-if

S/T

t/r

Status LEDs

T LE 42 63

(Low Dropout

Voltage Regulator)

PEB 3265

(2 Channel

Programmable

Codec Filter/

Low volt. SLIC)

SLIC-x

PEB 3265

(2 Channel

Programmable

Codec Filter/

Low volt. SLIC)

Solution Guide Small PBX Systems

Solutions for Small PBX systems

Solution Guide 9 04.99

Figure 4 Low-cost, basic feature small PBX (solution with SICOFI)

4.1.3 Explanation

The blocks in the figure above are now described step-by-step.

The S-interface part consists of the physical connection (plug) via the two

S-transformers and an optional choke to the S-transceiver. In the S-transceiver the

incoming signals are transformed onto the IOM-2 (ISDN Oriented Modular) bus. The

IOM bus therefore contains all data that has been received and additional status and

control information. The data in the B-channels (2 x 64 kbit/s) is for the payload, i.e. the

voice data from the extension telephones. An additional channel, the D-channel (16 kbit/

s) is used for the transmission of the signaling information. This data is sent in HDLC

framed packages. Therefore an HDLC controller has to decode these packages and

deliver the content to the protocol stack within the soft ware. Both the transfer from the

S-interface to IOM and the decoding is done within the ISAC-S TE PSB 2186 (details on

chipset in Chapter 6.1).

After receiving and decoding a data package, an interrupt is generated and the signaling

data that is stored in a buffer can be read by the microcontroller. Within the

microcontroller the entire ISDN protocol has to be handled. This is done by a software

portion that is usually called protocol stack. For more information on the European DSS1

protocol please refer to the Protocol Fundamental paper "ISDN protocol stack DSS1".

PSB 2186

(S-Transceiver;

HDLC)

PSB 2134

PSB 2132

(4/2 Channel

Programmable

Codec Filter )

PSB 2134

PSB 2132

(4/2 Channel

Programmable

Codec Filter )

DTMF

SLIC

DTMF

SLIC

DTMF

SLIC

2 .. 8 x

AC/DC

POTS

Supply

220V

C513

(8-Bit µC)

PCM

Bus

SCI

parallel

µC-if

S/T

t/r

t/rStatus LEDs

T LE 4263

(Low Dropout

Voltage Regulator)

Solution Guide Small PBX Systems

Solutions for Small PBX systems

Solution Guide 10 04.99

The microcontroller block consists not only of the controller alone, but also of ROM and

RAM. Usually there is an EPROM used to store the code information. The memory

device is connected via the microcontroller bus. In order to store temporary data, an

SRAM is needed . Normall y the onchip SRAM of the micro controller is not suffic ient, so

that an external SRAM is connected to the microcontroller bus.

As microc ontroller fo r s uch a sy ste m an 8-bi t c ontro lle r is totally suf fici ent to handle t he

protocol stack and the control of codec, SLICs and DTMF receivers.

Codec, SLIC and DTMF receiver represent the analog POTS interface of the PBX. The

typical procedure of a POTS interface is as follows. First the speech data that is encoded

with PCM (either A-law or µ-law with 8-bit coding) has to be converted into an analog

signal. This signal than has to be amplified and brought onto the telephone line.

A typical block diagram looks like that:

Figure 5 POTS inter face

The codec transforms the signal coming from IOM into analog waves. These waves are

amplified in the SLIC and also a feeding voltage is brought onto the telephone line. In

addit ion the term ination of the l ine has to be fulfil led, in order to minim ize th e echo that

comes back on the analog telephone line. This is usually called line adaptation. Each

country has it’s own specificati on for the impedance of the line terminatio n. These two

blocks above, codec and SLIC, have to fulfill the so called BORSCHT functions: Battery,

Overvolt age , Ringi ng, Signa lin g, Cod ec, Hybrid, Testing.

For the battery feeding the SLIC needs a voltage in the range from -24 to -60V DC. The

ringing signal with an amplitude of about 40 to 50Vrms and 25 Hz (depending on the

country) is fed via a relay. The relay is controlled by the SLIC. The codec transforms the

A/D and D/A conversion according to A- or µ-law. The information from the analog

telephone is called signalling and is realized by the impedance of the t/r line. The

detection is handled by the SLIC and transmitted via interrupt to the microcontroller.

Because the codec has a four-wire output (Receive=from PCM/IOM to t/r, Transmit=from

t/r to PCM/IOM and two times GND) and the tip/ring line is a two-wire interface, a hybrid

is necess ary to pe rform the 2-w ire to 4-wire co nver sion. This feature is also incl ude d in

the SLIC. Test features can be implemented either in the codec and in the SLICs or

external relays.

SLIC

TTX

PCM/IOM

FSK DTMF

Codec and

line adaptation

Relay

Ringing volt age

t/r

Solution Guide Small PBX Systems

Solutions for Small PBX systems

Solution Guide 11 04.99

In addition to the codec and the SLIC, a DTMF detector is necessary to receive the

dialing information coming from the analog telephone set. This DTMF detector is

connected to the transmit line in the 4-wire interface between SLIC and codec. As soon

as a valid number has been detected, an interrupt is generated and the controller can

fetch the data.

For some PBX systems with more features, a FSK generator (Frequency Shift Key), also

called Caller ID, is applied. With this feature a calling party number can be displayed on

the analog telephon e set.

In order to display the c harges of the phone call on the anal og telep hone set, a tele tax

generator (TTX), or also called metering pulses generator can be added. It generates

12 kHz or 16 kHz packets, depending on the country specification.

In the application described above for the codec/SLIC solution either the DuSLIC chipset

or the SICOFI-2/4 TE PSB 2132/PSB 2134 together with a SLIC.

The DuSLIC chipset includes one SLICOFI-2 and two high-volage SLICs. The

SLICOFI-2 PEB 3265 is a two-channel DSP based codec filter and low-voltage SLIC part

with DC and AC line adaption. Further functionality like DTMF recognition, FSK

generation, 3-PTY conferencing and line testing is included. For SLICs several different

versions are available as e.g. the SLIC-P PEB 4266 with balanced and unbalanced

ringing and the SLIC -E PEB 4265 with onl y balanc ed ringing , but higher cu rrent driv ing

capability. (Further information on the DuSLIC chipset in Chapter 5.1).

As for a solu tion us ing the tradition al c ode c SL IC com bin atio n, th e SIC O FI-2/4 TE PSB

2132/PSB 2134 combines the requirements for a codec with line adaptation filters. Using

this feature, it is possible to connect the SLIC with a fixed network and program via

software the country specific termination of the analog line. The SICOFI TE is a

2-channel or 4-channel DSP based solution and consists of only one chip.

Further it supplies seven I/O ports per channel to connect the SLIC and the DTMF

receiver and con trol th em. This eases the d esi gn due to the limited num ber of port p ins

of an 8-bit controller. Also test functions like loops and level metering can be done in

software.

Solution Guide Small PBX Systems

Solutions for Small PBX systems

Solution Guide 12 04.99

4.2 Low cost, extended feature small PBX

4.2.1 Description

As soon as an additional S-bus is used on the subscriber side, it is recommended to take

another approach.

4.2.2 Block Diagram

Figure 6 Low cost, extended feature small PBX (using DuSLIC)

PSB 2115

(S-Transceiver,

3x HDLC)

PEB 2081

(S-transceiver)

2..8 x

220V

C513A

(8-Bit µC)

IOM-2

Bus

SCI

parallel

µC-if

S/T

t/r

Status LEDs

AC/DC

TL E 4263

(Low Dropout

Voltage Regulator)

POTS

Supply

SLIC-x

PEB 3265

(2 Channel

Programmable

Codec Filter/

Low volt. SLIC)

PEB 3265

(2 Channel

Programmable

Codec Filter/

Low volt. SLIC)

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Solutions for Small PBX systems

Solution Guide 13 04.99

Figure 7 Low cost, extended feature small PBX (using SICOFI)

4.2.3 Explanation

On the trunk side the IPAC PSB 2115 is used. This device consists of an S-interface and

three HDLC controllers. One of these HDLC controllers is used to handle the D-channel

coming from the Central Office.

On the subscriber side, a second S-transceiver SBCX PEB 2081 is mounted. The

D-channel han dling g oin g to the subsc ribe rs is ha ndl ed by t he sec ond HDLC c ontrolle r

of the IPAC PSB 2115. The two B channels of the trunk interface are located on IOM

channel 0 of the IOM-2 interface, that is operated with 1.536 MHz coming from the IPAC.

The two B channels of the subscriber interface are set to IOM channel 1 by pinstrapping

of the SBCX PEB 2081.

Using either the DuSLIC chipset or the SICOFI-2/4-TE a two to eight analog POTS

interfaces can be connected to the system. More detailed information on DTMF and

SLIC circuitry can be found in Chapter 4.1.3.

PSB 2115

(S-Transceiver,

3x HDLC)

PEB 2081

(S-transceiver)

PSB 2134

PSB 2132

(4/2 Channel

Programmable

Codec Filter)

DTMF

SLIC

DTMF

SLIC

220V

C513A

(8-Bit µC)

IOM-2

Bus

SCI

parallel

µC-if

S/T

t/r

t/rStatus LEDs

AC/DC

TL E 4263

(Low Dropout

Voltage Regulator)

POTS

Supply

2..8 x

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Solutions for Small PBX systems

Solution Guide 14 04.99

The following paragraphs show how switching is accomplished.

Subscriber S-interface initiates external call

As soon as the received D channel package on IOM channel 1 is received by the

controller an d recognized as an external call, the oc cupied B channel of the subscriber

interface is switched to channel 0 by sending a monitor message to the SBCX.

Subscriber S-interface initiates internal call

If an internal call is detected, the SICOFI-TE is programmed via the serial controller

interface (SCI), so that the appropriate timeslot is on the S-transceiver B channel on IOM

channel 1.

Analog POTS phone initiates external call

The SICOFI-TE is programmed that the appropriate timeslot shows to IOM channel 0.

Subscriber S-interface B1 initiates external call while analog POTS phone has

active call on B1 of the trunk interface

Normally the B1 of the subscriber interface would use the B1 channel of the trunk

interface (timeslot 0). In this case the B1 channel is already occupied, and cannot be

moved to another slot. The SBCX cannot switch to another B channel. Therefore the

auxiliary PCM interface of the IPAC is used. The PCM interface is hardwired to the IOM

interface. Via the interna l switching, the PCM slot, e.g. timeslot 4 (=B1 of channel 1 of

the SBCX), is mapped to B2 of the trunk interface. As alternative it is also possible to

assign only B2 via the protocol, if only B2 is available.

Subscriber S-interface calls subscriber S-interface

Via a monitor command, the SBCX is programmed to close a loop for the two B channels

and interchange the downstream and upstream direction on one of the channels.

This way all connections for this small PBX with extended features can be handled

without an additional switching device.

4.3 Small PBX with V.24 dataport

4.3.1 Description

As soon as the PBX should also have Terminal Adaptor (TA) features, it is necessary to

use a more powerful controller, in order to handle the transmission of data between the

computer interface a nd the ISD N S-interface. This chap ter and Chapter 4.4 show how

such a system could look like.

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Solutions for Small PBX systems

Solution Guide 15 04.99

4.3.2 Block Diagram

Figure 8 Small PBX with V.24 Dataport (using DuSLIC)

Figure 9 Small PBX with V.24 Dataport (using SICOFI)

PSB 2115

(S-Transceiver,

3x HDLC)

C161O

(16-bit µC)

IOM-2

Bus

SCI

parallel

µC-if

S/T

t/r

Status LEDs

V.24

AC/DC

TLE 4263

(Low Dropout

Voltage Regulator)

POTS

Supply

220V

SLIC-x

PEB 3265

(2 Channel

Programmable

Codec Filter/

Low volt. SLIC)

PEB 3265

(2 Channel

Programmable

Codec Filter/

Low volt. SLIC)

2..8 x

PSB 2115

(S-Transceiver,

3x HDLC)

PSB 2134

(4 Channel

Programmable

Codec Filter)

DTMF

SLIC

DTMF

SLIC

C161O

(16-bit µC)

IOM-2

Bus

SCI

parallel

µC-if

S/T

t/r

t/rStatus LEDs

V.24

AC/DC

TLE 4263

(Low Dropout

Voltage Regulator)

POTS

Supply

220V

2..8 x

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Solutions for Small PBX systems

Solution Guide 16 04.99

4.3.3 Explanation

The 16-bit controller C161 family (e.g. C161-V/-K/-O/-RI/-PI) is able to transfer the data

coming from the PC via the serial asynchronous interface (RS-232;V.24) to the IPAC

PSB 2115. The later is handling the trunk S-interface with its S-transceiver and one

D-channel HDLC controller. The two spare HDLC controllers of the IPAC are used to do

the HDLC framing of the data from the PC via V.24 onto ISDN-

The datarate on the UART interface can be either 115 kbit/s for one B channel or

230 kbit/s for two B-channel transmission. The B-channel protocols are handled within

the PC.

Either the DuSLIC chipset or the SICOFI-TE with either two or four channels represents

an optional analog interface and enables this system to have two to eight analog

interfaces.

4.4 Small PBX with USB/V.24 dataport

4.4.1 Description

In order to obtain also an USB interface, an USB controller has to be used. As 16-bit

controller with USB, the C165 UTAH is the best and most flexible choice.

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Solutions for Small PBX systems

Solution Guide 17 04.99

4.4.2 Block Diagram

Figure 10 Small PBX with USB/RS-232 dataport (using DuSLIC)

PEB 2081

(S-transceiver)

PEB 2081

(S-transceiver)

C165UTAH

(16-bit µC,

IOM,

4x HDLC)

IOM-2

Bus

SCI

S/T

t/r

Status LEDs

V.24

USB

AC/DC

TLE 4263

(Low Dropout

Voltage R egula tor)

POTS

Supply

220V

SLIC-x

PEB 3265

(2 Channel

Programmable

Codec Filter/

Low volt. SLIC)

PEB 3265

(2 Channel

Programmable

Codec Filter/

Low volt. SLIC)

2..8 x

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Solution Guide 18 04.99

Figure 11 Small PBX with USB/V.24 dataport (using SICOFI)

4.4.3 Explanation

The C165 UTAH includes besides a C16x core one USB interface conform to the PC 98

specification. As additional feature the C165 UTAH has one IOM interface and four

full-duplex HDLC controllers. Therefore it is possible to control two S-transceivers

(SBCX PEB 2081) on trunk and subscriber side, and additionally allow a data transfer

via USB or RS-232, that is framed by the remaining two HDLC controllers.

This way th e max imum amount of f lex ibi lity is obtained. As de sc ribed abov e the analog

interface is real ized by either the DuSLIC chipset or t he SICO FI-TE, connected via the

serial controller interface.

In spite of using up to two S-interfaces and up to eight analog interfaces, no PLL is

necessary. The IOM interface is supplied by the trunk line S-transceiver with 1.536 MHz.

PEB 2081

(S-transceiver)

PEB 2081

(S-transceiver)

PSB 2134

(4 Channel

Programmable

Codec Filter)

DTMF

SLIC

DTMF

SLIC

C165UTAH

(16-bit µC,

IOM,

4x HDLC)

IOM-2

Bus

SCI

S/T

t/r

t/rStatus LEDs

V.24

USB

AC/DC

TLE 4263

(Low Dropout

Voltage Regulator)

POTS

Supply

220V

2..8 x

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Solutions for Small PBX systems

Solution Guide 19 04.99

4.5 DSP based small PBX with up to four S-interfaces

4.5.1 Description

As soon as more S-interfaces are provided or more than one trunk line S-interface is

used, anoth er approach is m ore advantag eous. With the DELPHI/VIP concept small to

midrange PBX systems can be built.

4.5.2 Block Diagram

Figure 12 DSP based small PBX with up to four S-interfaces (DuSLIC solution)

VIP

PEB 20590

SLICOFI-2

PEB 3265

SLIC-x

C161U

IOM-2000

SCI

par.

µC-if

S/T

t/r

Status LEDs

DELPHI-PB

PEB 20571

PCM / IOM-2

V.24

3 x

: :

AC/DC

TL E 4263

(Low Dropout

Voltage Regulator)

USB

POTS

Supply

220V

SLICOFI-2

PEB 3265

SLIC-x

2..8 x

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Solutions for Small PBX systems

Solution Guide 20 04.99

Figure 13 DSP based small PBX with up to four S-interfaces (SICOFI solution)

4.5.3 Explanation

The DELPHI/VIP concept consists of two devices, one is the DELPHI PEB 20571, a

telecom DSP that handles all digital tasks, including HDLC controllers, microcontroller

interface, DSP routines, the digital part of S- and Up-transceivers, and many more. The

second device is the VIP, PEB 20590. This device contains four S-transceivers (that can

also be switched to work as four Up-transceivers) and additional four Up-transceivers. In

this application only the four S-transceivers are used. The two devices DELPHI and VIP

are conn ected via a new se rial bus, the IOM-200 0 bus, that has a higher bitrate. Up to

three VIPs can be connected to one DELPHI.

The four S-int erfac es of th e VIP can be dis tributed f reely either o n the s ubscrib er or on

the trunk interface. The necessary PLL is included in the DELPHI and each S-transceiver

can be programmed separately into LT-T (trunk line) or LT-S (subscriber line) mode.

As described above the analog interface consists either of the DuSLIC chipset or the

SICOFI-TE and SLICs. As difference now the DTMF receivers can be realized at the

SICOFI solution within the DSP of the DELPHI-PB.

Depending on the dataport that should be realized, two controllers can be connected.

For sole RS-232/V.24 operation the C161PI is sufficient to shuffle the data from the V.24

interface to the DELPHI, that d oes HDLC frami ng and sendin g it via the IOM-2000 bu s

to the trunk line interface. As soon as an optional USB interface should be provided, the

software compatible C161U can be used.

VIP

PEB 20590

SLIC

C161U

IOM-2000

SCI

par.

µC-if

S/T

t/r

Status LEDs

DELPHI-PB

PEB 20571

PCM / IOM-2

V.24

3 x

: :

AC/DC

TL E 4263

(Low Dropout

Voltage Regulator)

USB

POTS

Supply

220V

SLIC

SICOFI-TE

PSB

2134

2..8 x

Solution Guide Small PBX Systems

Future Additions to Existing Concepts

Solution Guide 21 04.99

5 Future Additions to Existing Concepts

As an outlook into the future of small PBX systems, the foll owing concepts and de vic es

should be described shortly.

5.1 DuSLIC Concept

From July 199 9 on, a new concep t for the analog int erface will remo ve the SICOFI-TE

and mount the DuSLIC, consisting of SLICOFI-2 and SLIC-x.

Figure 14 Common realization of an analog POTS interface

In all PBX systems a bove the analog line interface was shown l ike in Figure 14. Al l the

functionality shown in this figure can now be realized with the DuSLIC concept,

consistin g of one SLIC OFI-2 handl ing the low vo ltag e part an d tw o SLIC-x han dling the

high voltage part. The SLICOFI-2 is a two channel DSP based codec filter, that handles

the A/D conversion, the line adaptation, the DTMF receiver and sender, the FSK

generation, TTX pulses generation, line test features, Three-Party-Conferencing and

more. The analog high voltage part is realized by the SLIC-x. There are several types of

SLICs available, that show the same interface and pinning, but are made for different

requirements , e.g. balan ced or unba lanced ringi ng and pow er consumptio n. Figure 15

shows how the entire solution for two lines looks like.

As a special feature of the DuSLIC concept the Three-Party-Conferencing feature should

be mentioned f or the PBX systems. With out using exte rnal compone nts it is possible to

mix three l ines together an d control the ga in of each lin e. It does not matter where the

three callers are connected to, both PCM/IOM interface and the analog lines are

supported and can be programmed individually for each channel.

SLIC

TTX

PCM/IOM

FSK DTMF

Codec and

line adap tati on

Relay

Ringing voltage

t/r

Solution Guide Small PBX Systems

Future Additions to Existing Concepts

Solution Guide 22 04.99

Figure 15 Transition from SICOFI to SLICOFI

5.2 New S-Transceivers

Also a short overview of the new S-transceivers should be given. The IPAC-x, ISAC-SX

and SBCX-X are the next generation of the devices mentioned above (more details in

Chapter 6). The ISAC-SX consists of one S-transceiver and one HDLC controller for

D-channel data and a rudimentary B-channel HDLC controller in order to achieve remote

downloading. The SBCX-X has one single S-transceiver. The IPAC-x integrates one

S-transceiv er, one D-channel H DLC controller an d two B-channel HDLC controllers for

data access.

The new generation of S-transceivers is more flexible than the ISAC-S PEB 2086 or the

SBCX PEB 2081. Now it is possible to select the timeslots individually for each B channel

or provide IDSL functionality (144 kbit/s). They now support 3,3 V supply voltage, a new

monitor and C/I code handler and several microcontroller interfaces.

SLIC

TTX

SICOFI-2 PCM/IOM

FSK DTMF

SLIC

TTX

FSK DTMF

SLICOFI-2

SLIC-E/P

SLIC-E/P PCM/ IOM select ab le

Relay

Ring Voltage

Relay

Original solution:

New DuSLIC solution:

Solution Guide Small PBX Systems

Application Specific Details on Chipsets

Solution Guide 23 04.99

6 Application Specific Details on Chipsets

6.1 ISAC-S TE PSB 2186

The PSB 2186 ISAC ® -S TE implemen ts the fou r-wire S/T inte rface use d to link voi ce/

data terminals to an ISDN.

The PSB 2186 combine s the functions of the S-Bus Interface Circuit (SBC: PEB 2080)

and the ISDN Communications Controller (ICC: PEB 2070) on one chip.

The component switches B- and D-channels between the S/T and the ISDN Oriented

Modular (IOM ®) interfaces, the latter being a standard backplane interface for the

ISDN-basic access.

The device provides all electrical and logical functions of the S/T interface, such as:

activation/deactivation, mode dependent timing recovery and D-channel access and

priority control. The HDLC packets of the ISDN D-channel are handled by the ISAC-S

which interfaces them to the associated microcontroller. In one of its operating modes

the device offers high level support of layer-2 functions of the LAPD protocol.

6.1.1 Features

• Terminal IOM ® -2 terminal specific version of the PEB 2086

• Pin and software compatible to PEB 2086

• Full duplex 2B+D S/T interface transceiver

• Conversion of the frame structure between the S/T interface and IOM-2

• Receive timing recovery

• D-channel access control

• Activation and deactivation procedures with automatic wake-up from power-down

state

• Access to S and Q bits of S/T interface

• Adaptively switched receive thresholds

• Support of LAPD protocol

• FIFO buffer (2 x 64 bytes) for efficient transfer of D-channel packets

• 8-bit microprocessor interface, multiplexed or non-multiplexed

• Serial interface: IOM-2 interface including bit clock and strobe signal

• Implementation of IOM-2 MONITOR and C/I-channel protocol to control peripheral

devices

• Microprocessor access to B- and intercommunication-channels

• Watch dog timer

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Application Specific Details on Chipsets

Solution Guide 24 04.99

6.1.2 Documentation Links

– ISDN Subscriber Access Controller for Terminals (ISAC-S TE, PSB 2186), User’s

Manual 10.94

– ISDN Subscriber Access Controller for Terminals (ISAC-S TE, PSB 2186 V1.1), Delta

Sheet 06.96

– ISDN Subscriber Access Controller for Terminals (ISAC-S TE, PSD 2186 V1.1), Delta

Sheet 04.97

– http://www.siemens.de/semiconductor/products/ics/33/isac_ste.htm

6.2 ISAC-S PEB 2086

The PEB 2086 ISAC ® -S implements the four-wire S/T interface used to link voice/data

terminals to ISDN. The PEB 2086 combines the functions of the S-Bus Interface Circuit

(SBC: PEB 2080) and the ISDN Communications Controller (ICC: PEB 2070) on one

chip.

The component switches B and D channels between the S/T and the ISDN Oriented

Modular (IOM ®) interfaces, the latter being a standard backplane interface for the ISDN

basic access.

The device provides all electrical and logical functions of the S/T interface, such as:

activation/deactivation, mode dependent timing recovery and D channel access and

priority control. The HDLC packets of the ISDN D channel are handled by the ISAC-S

which interfaces them to the associated microcontroller. In one of its operating modes

the device offers high level support of layer-2 functions of the LAPD protocol.

6.2.1 Features

• Full duplex 2B + D S/T interface transceiver

• Conversion of the frame structure between the S/T interface and IOM

• Receive timing recovery according to selected operating mode

• Multiframe sync hronization

• D-channel access control

• Activation and deactivation procedures, with automatic wake-up from power-down

state

• Access to S and Q bits of S/T interface

• Adaptively switched receive thresholds

• Frame alignment with absorption of phase wander in NT2 network side applications

• Support of LAPD protocol

• FIFO buffer (2 ´ 64 bytes) for efficient transfer of D-channel packets

• 8-bit microprocessor interface, multiplexed or non-multiplexed

• Serial interfaces: IOM-1, SLD, SSI, IOM-2

Solution Guide Small PBX Systems

Application Specific Details on Chipsets

Solution Guide 25 04.99

• Implementation of IOM-1/IOM-2 MONITOR and C/I channel protocol to control

peripheral devices

• Microcontroller access to B-channels and intercommunication channels

• B-channel sw itc hing

• B-channel mapping on SSI-interface

• Watch dog timer

• Test loops

• Low power consumption: standby 8 mW, active 80 mW

6.2.2 Documentation Links

– ISDN Subscriber Access Controller (ISAC-S, PEB 2086), User’s Manual 10.94

– ISDN Subscriber Access Controller (ISAC-S, PEB 2086 V1.1), Errata Sheet 10.95

– ISDN Subscriber Access Controller (ISAC-S, PED 2086 V1.1), Delta Sheet 11.97

– ISDN Subscriber Access Controller (ISAC-S, PEB 2086 V1.4), Delta Sheet 01.98

– ISDN Subscriber Access Controller (ISAC-S, PED 2086 V1.4), Delta Sheet 01.98

– http://www.siemens.de/semiconductor/products/ics/33/isac_s.htm

6.3 IPAC PSB 2115

The ISDN PC Adapter Circuit IPAC PSB 2115 integrates all necessary functions for a

ho st bas ed ISDN access solution on a single chip.

It includes the S-transceiver (Layer 1), an HDLC controller for the D-channel and two

protocol controllers for each B-channel. They can be used for HDLC protocol or

transparent access. The system integration is simplified by several host interface

configurations selected via pin strapping. They include multiplexed and demultiplexed

interface options as well as the optional indirect register access mechanism which

reduces the number of necessary registers in the address space to 2 locations.

The IPAC combines the functions of the ISDN Subscriber Access Controller (ISAC-S

PEB 2086) and the High-Level Serial Communications Controller Extended for

Terminals (HSCX-TE PSB 21525) providing additional features and enhanced

functional ity. The FIFO s iz e of t he B-c han nel buffe rs is 2x 64 bytes per cha nne l and per

direction. The S-transceiver supports other terminal relevant operation modes like line

termination subscriber side (LT-S) and line termination trunk side (LT-T). A multi-line

ISDN solution to support both S and U (2B1Q t ogether with IEC-Q/N TC-Q) line coding

is simplified as well as multi-line solution with up to 3 S-interfaces.

An auxiliary I/O port has been added with interrupt capabilities on two input lines. These

programmable I/O lines may be used to connect a DTMF receiver or other peripheral

components to the IPAC which need software control or have to forward status

information to the host. Peripheral data controllers can transfer data on a PCM interface

which is mapped into the B-channels on the IOM-2 interface. Three programmable LED

Solution Guide Small PBX Systems

Application Specific Details on Chipsets

Solution Guide 26 04.99

outputs can be used to indicate certain status information, one of them is capable to

indicate the activation status of the S-interface automatically.

6.3.1 Features

• Integrates S-transceiver, D-channel, B-channel protocol controller

• Replaces solutions based on ISAC-S TE PSB 2186 and HSCX-TE PSB 21525

• Software reset (required for Windows95)

• Programmable I/O interface with 2 interrupt inputs

• PCM interface for non IOM-2 compatible peripheral data controllers with switching

functionality

• Programmable timer (1 ... 63 ms) for continuous or single interrupts

• Reduced register address space due to indirect address mode option

• 3 programmable LED outputs, one can indicate S bus activation status automatically

• 8-bit multiplexed or demultiplexed bus interface, Siemens/Intel or Motorola µP

interface

• Single chip host based ISDN solution

• Various types of protocol support depending on operating mode (Non-auto mode,

transparent mode)

• Efficient transfer of data blocks from/to system memory by DMA or interrupt request

• Enlarged FIFO buffers (2x64 byte) per B-channel and per direction

• S-transceiver with TE, LT-S and LT-T modes (easy realization of connection of

several IPACs due to 1.536 MHz output)

• D-channel FIFO buffers with 2x32byte

• D-channel access mechanism in all modes

• D-channel priority handler on IOM-2 for intelligent NT applications

6.3.2 Documentation Links

– ISDN PC Adapter Circuit (IPAC, PSB 2115 Version 1.1), Product Overview 09.96

– ISDN PC Adapter Circuit (IPAC, PSB 2115 Version 1.1), Data Sheet 11.97

– ISDN PC Adap ter Circuit (IPAC, PSB 2115 Vers ion 1.1 and PSF 2115 Vers ion 1.1),

Errata Sheet 09.98

– ISDN PC Adapter Circuit (IPAC PSB 2115 Version 1.2 and PSF 2115 Version 1.2),

Delta Sheet 09.98

– http://www.siemens.de/semiconductor/products/ics/33/ipac.htm

6.4 SBCX PEB 2081

The PEB 2081 S/T Bus In terface Circ uit Exte nded (SBCX) imp lements the fou r-wire S/

T-interface used to link voice/data ISDN terminals, network terminators and PABX trunk

lines to a Central Office.

Solution Guide Small PBX Systems

Application Specific Details on Chipsets

Solution Guide 27 04.99

The SBCX provides the electrical and functional link between the analog S/T-interface

according to ITU re com men dati on I.430, ETS 300 012 and T1. 605 Basi c U s er Netw ork

Interface Specification respectively, and the ISDN Oriented Modular interface Rev. 2

(IOM®-2).

6.4.1 Features

• Full duplex 2B+D S/T-in terface transceiver according to the followin g specifications:

ETS 300 012, ANSI T1.605

• 192 kbit/s transmission rate

• Pseudo-ternary coding with 100 % pulse width

• Activation and deactivation procedures

• Extended loop-length up to 2 km

• Handling of commands and indications contained in the IOM®-2 C/I channel for

activation, deactivation and testing

• Switching of test-loops

• Fully compliant NT2 trunk mode including multipoint operation

• Frame alignment with absorption of phase wander in NT2 network side applications

• D channel access control, also in trunk application

• Access to S and Q bits of S/T-interface (S1, S2 and Q channel)

• Software controlled maintenance interface (I/O ports)

• Switching of test loops

• Supported Operation Modes

TE : Terminal Mode

NT : Network termination connected to IEC-Q

LT-T : Trunk mode in private exchange

LT-S : Line termination in public or private exchanges

6.4.2 Documentation Links

– http://www.siemens.de/semiconductor/products/ics/33/3303.htm

– SBCX PEB 2081 v3.4 User’s Manual 11.96

– Errata Sheet PEE/PEA 03.97

6.5 SICOFI-2/-4 TE PSB 2132/34

The Signal Processing Codec Filter for terminal applications PSB 2132/4 SICOFI2/4-TE

is a special derivative of the Infineon Technologies programmable codec-filter-IC family

designed for terminal applications featuring two or four POTS interfaces.

It can be directly connected to the IOM-2 interface in terminal mode running at 1.536

MHz clock rate. PCM data is transferred using the bit clock signal at 768 kHz.

Programming of internal registers is done via the serial microcontroller interface.

Solution Guide Small PBX Systems

Application Specific Details on Chipsets

Solution Guide 28 04.99

Only two external capacitors per channel are needed to complete the functionality of the

PSB 2132/4. The internal level accuracy is based on a very accurate bandgap reference.

The frequency behavior is mainly determined by digital filters, which do not have any

fluct uations . As a result o f the new ADC - and DAC - concept s linearit y is only limited by

second order parasitic effects. Although the device works only from one single 5 V

supply there is a very good dynamic range available.

The PSB 2132/4 is a DSP based codec which allows the integration of filters and tone

generators besides the regular A- or µ-law conversion. In addition it integrates I/O

extensions to the microcontroller and provides the necessary I/O pins to control the SLIC

or discrete SLIC replacement. Interrupts are generated to the microcontroller if changes

(e.g. Off-Hook detection) have been occurred. The PSB 2132/4 provides a ring

frequency output pin. This pin has a programmable clock frequency to meet the

European and US ringing frequency requirements using only one external divider.

The IOM-2 data lines DU and DD can both be used for transmitting or receiving voice

data. The position of each receive and transmit timeslot is programmable. Internal

communication between analog ports is supported by programming each channel to the

same timeslot but reversing the data lines. Thus the transmitted PCM data is transmitted

by one p ort and recei ved by the s econd po rt via the sam e timeslo t. An add itional IC for

switch matrix is eliminated.

The PSB 2132/4 is specially of interest for applications which need to serve different

country specific characteristics on the POTS interface. Since all filters are

programmab le, ad aptatio n to these country s pecific requireme nts may be done on ly by

software parameters using the same hardware.

6.5.1 Features

• Single chip programmable CODEC and FILTER to handle two or four POTS interfaces

• IOM-2 compatible interface (1.536 MHz DCL, 768 kHz Bit clock)

• Internal communication between POTS interfaces

• Programmable I/O lines for signaling information per channel

• Programmable ring generator output

• Two programmable tone generators per channel

• Serial microcontroller interface

• Digital signal processing technique

• High analog driving capability (300 Ohms) for direct driving of transformers

• Programmable digital filters to adapt the transmission behavior especially for

– AC impedan ce matc hing

– transhybrid balancing

– frequency response

– gain

– A/µ-law conversion

• Single 5 V power supply

Solution Guide Small PBX Systems

Application Specific Details on Chipsets

Solution Guide 29 04.99

• Advanced test capabilities

6.5.2 Documentation Links

– Two/Four Channel Codec Filter for Terminal Applications (SICOFI-2/4-TE PSB 2132/

34 Version 1.2) Data Sheet 09.97

– Two/Four Channel Codec Filter for Terminal Applications (SICOFI-2/4-TE PSB 2132/

34 Version 1.2) Errata S heet 09.97

– Two/Four Channel Codec Filter for Terminal Applications (SICOFI-2/4-TE PSB 2132/

34 Version 1.4) Delta Sheet 04.98

– http://www.siemens.de/semiconductor/products/ics/33/sico2_te.htm

– http://www.siemens.de/semiconductor/products/ics/33/sico4_te.htm

6.6 C513A/C513AO

The C511, C511A, C513 and C513A are low cost members of the Infineon Technologies

C500 family of 8-bit microcontroller which is compatible to the 80C51/C52 standard

architecture. A wide range of tools such as HLL (High-Level-Language)-compilers,

debuggers and emulators are available.

Among other segments the low power design makes the C511/C513 family ideal for

telecom and consumer applications as well as automotive or industrial solutions.

Note: For new designs, the C513AO should be used.

6.6.1 Features

• Fully compatible to standard 8051 microcontroller

• Up to 16 MHz operating frequency – 750 ns instruction cycle time @16 MHz

• 16 K bytes of on-chip OTP memory (C513A-2E and C513AO-2E only)

• 16 K bytes of on-chip ROM memory (C513AO-2E only)

• 256 byte on-chip RAM

• 256 byte on-chip XRAM

• Four 8- bit digita l I/O ports

• Three 16-bit timers/counters (timer 2 with Up/Down and 16-bit auto-reload features)

• Full duplex serial interface (USART)

• Synchronous Serial Channel (SSC)

• Seven interrupt sources with two priority levels

• On-chip emulation support logic (Enhanced Hooks)

• Programmable 15-bit Watchdog Timer (C513AO only)

• Oscillator Watchdog (C513AO only)

• Fast Power On Reset (C513AO only)

• Power Saving Modes

– Slow-down mode (C513AO only)

– Idle mode

Solution Guide Small PBX Systems

Application Specific Details on Chipsets

Solution Guide 30 04.99

– Software power-down mode with optional wake up capability

6.6.2 Documentation Links

– C511, User’s Manual 06.96 (http://www.siemens.de/semiconductor/products/ics/34/

u511.htm)

– C511, Data Sheet 06.96 (http://www.siemens.de/semiconductor/products/ics/34/

d511.htm)

– http://www.siemens.de/semiconductor/products/ics/34/c511.htm

Solution Guide Small PBX Systems

Application Specific Details on Chipsets

Solution Guide 31 04.99

6.7 C161V/-K/-O/-RI/-PI/-OR/

These members of the C166 family offer all benefits of a full 16-bit controller at the

average price of an 8-bit controller. The C161 product range is focused on price sensitive

applications such as in consumer products.

Grouped around the 16MHz C166 core a variety of basic peripherals have been chosen

for optimal product and system costs.

The C161PI i s the 3,3V v ersion of the C161RI. The C161OR is th e 3,3V versio n of the

C161O with add itio nal pow er mana geme nt.

6.7.1 Features

• High Performance 16-bit CPU with 4-stage pipeline

• 125 ns Instruction Cycle Time at 16 MHz CPU Clock

• 625 ns Multiplication (16 x 16 bit), 1,25 µs Division (32/16 bit)

• Clock Generation via Prescaler or via Direct Clock Input

• Enhanced Boolean Bit Manipulation Facilities

• Additional Instructions to Support HLL and Operating Systems

• Register-Based Design with Multiple Variable Register Banks

• Single-Cycle Context Switching Support

• Up to 4 MBytes Linear Address Space for Code and Data

• 1 KBytes On-Chip IRAM (C161OR only)

• 2 KBytes On-Chip XRAM (C 161PI only)

• Programmable External Bus Characteristics for Different Address Ranges

• 8-bit or 16-bit External Data Bus

• Multiplexed or Demultiplexed External Address/Data Buses (C161V provides MUX

Bus only)

• 1024 Bytes On-Chip Special Function Register Area

• Idle and Power Down Modes

• 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via Peripheral Event

Controller (PEC)

• 16-Priority-Level Interrupt System with 20 Sources (14 Sources on C161V)

• Multi-Functional General Purpose Timer Units with up to five 16-bit Timers

• Two Serial Channels (Synchronous/Asynchronous and High-Speed-Synchronous)

• Programmable Chip-Select Signals (not on C161V)

• Programmable Watchdog Timer

• Up to 63 General Purpose I/O Lines

• Supported by a large Range of Development Tools including C-Compilers,

Makro-Assembler Packages, Real-Time Operating Systems, Emulators, Evaluation

Boards, HLL-Debuggers, Simulators, Logic Analyzers Disassemblers, Programming

Boards

• On-Chip Bootstrap Loader (not on C161V)

Solution Guide Small PBX Systems

Application Specific Details on Chipsets

Solution Guide 32 04.99

6.7.2 Documentation Links

– C161RI, Product Overview 05.97 (http://www.siemens.de/semiconductor/products/

ics/34/pdf/p161ri.pdf)

– C161RI, Data Sheet 01.98 Advance Information (http://www.siemens.de/

semiconductor/products/ics/34/pdf/d161ri.pdf)

– C161V/-K/-O, U ser’s Man ual 12.97 (htt p://www. siemen s.de/se micond uctor/prod ucts/

ics/34/u161.htm)

– http://www.siemens.de/semiconductor/products/ics/34/c161.htm

Note: The C161RI is not for new designs.

6.8 C165 UTAH

The C165 UTAH, as an Embedded C166 core with Universal Serial Bus (USB) Interface

and Terminal Adapter (TA) supporting hardwired HDLC formatter, will be a new

derivative of the Infineon Technologies SAB C166 family of full-featured single-chip

CMOS microcontrollers using C7NA/H technology.

This new device fits all needs for todays low-cost design implementations with or without

USB support of small PBXs, full-featured ISDN-Terminal Adapters and ISDN-Modems

for LAN-to-WAN interworking at a maximum ratio of performance and flexibility to cost.

The embedded 16-bit C166 core excels in both high performance and low cost. The

architecture provides m aximum flexibility and performance for all ki nds of value-added

software features by providing hardwired level-1 support for USB, IOM-2 and HDLC.

Therefore the most significant part of the CPU performance can be used e.g. for protocol

interworking between USB and ISDN or PBX features such as Answering Machines,

Comfort Noise generation and Local Calling.

Note: This chip is not yet available. Engineering samples of the C165 UTAH will be

available in June, 1999.

6.8.1 Features

• C166 Static Core with Peripherals including:

– Peripheral Event Controller (PEC) for 8 independent DMA channels

– 16 Dynamically Programmable Priority-Level Interrupt System

– Five External Interrupts

– SW-configurative Input/Output (I/O) Ports, some with Interrupt Capabilities

– 8-Bit or 16-Bit External Data Bus

– Multiplexed or Demultiplexed Address/Data Bus

– Up to 16-Mbyte Linear Address Space for Code and Data

– Five Programmable Chip-Select Lines with Wait-State Generator Logic

– On-Chip 3,074-Byte Dual-Port IRAM

Solution Guide Small PBX Systems

Application Specific Details on Chipsets

Solution Guide 33 04.99

– On-Chip 1,024-Byte Special Function Register Area

– On-Chip PLL with Output Clock Signal

– Five Multimode General Purpose Timers

– On-Chip Programmable Watchdog Timer

– Glueless Interface to EPROM, Flash EPROM, and SRAM

– Low-Power Management Supporting Idle-, Power-Down- and Sleep-Mode and

additional CPU clock slow-down mode

– USART interface with Auto Baud Rate detection up to 230,400 kbps

– High speed Se rial Synchronous Cha nnel In terfa ce (SSC) with ALIS-3.0 and AC97

compatibility.

• USB Interface including:

– USB Specification 1.1 c omplia nt

– 12 Mbit/s Full-Speed Mode

– Seven SW-configurable Endpoints, in addition to the bidirectional Control

Endpoint 0

– Each non-Control Endpoint can be either Isochronous, Bulk or Interrupt

– < 500uA suspend current and <500mA operating current in USB bus-powered

mode @ 5V

– Autonomous DMA Transfer by On-Chip EPEC

• ISDN Terminal Adapter Features including (C165 UTAH only):

– Four Independent Full-Duplex HDLC Controllers

– IOM-2 (also known as General Circuit Interface)

– MON and CI0/CI1-Handler

– Two D-Channels (Local plus ISDN Layer-2, i.e. LAPD)

– Two B-Channels Supported

– Concatenated 2B+D channel Support

– Two Intercommunication Channels IC1, IC2

– D-Channel Access Control to first IOM channel-0 by TIC/BAC and S/G

– CDA Channel Access to individual IOM-2 channels by SW

• On-Chip PLL for CPU and USB clock generation

• Variable oscillator clock input frequency

• On-Chip Debug Support (OCDS)

• JTAG Boundary Scan Test Support according to IEEE 1149.1

• Static 0..40 MHz Core Design

• 3.3V Single Supply Voltage

• 5V (TTL-) Tolerant I/Os

6.8.2 Documentation Links

– SAB C165 UTAH Product Brief 10.98

Solution Guide Small PBX Systems

Application Specific Details on Chipsets

Solution Guide 34 04.99

6.9 C161U

The C161 U features the same peripherals and the same core as the SAB-C165 UTAH.

The o nly difference is the fact that the C161U do es not ha ve HDLC co ntrollers and an

IOM interface integrated on chip.

Note: This chip is not yet available. Engineering samples of the C161 U will be available

in June, 1999.

6.9.1 Documentation Links

no documentation available up to now

6.10 DELPHI PEB 20750

DELPHI is a part of the Infineon Technologies Telecom DSP product line , addressing a

broad range of telecom applications. Together with the transceiver part VIP PEB 20590,

this optimized chip-set provides the functionality required for building line cards and

small PBXs.

The DELP HI i nteg rates a hig h performance DSP core , sup porti ng telecom feature s lik e

switching, signaling control, and layer-1 control. It also provides a programmable Master/

Slave clock generator with two PLLs, a parallel µP interface, and a DMA interface

The VIP contains UPN and S/T transceivers for up to 8 layer-1 subscriber or trunk lines.

Key applications of the DELPHI include:

• Line card and PBX controller for up to 40 ISDN or 32 analog subscribers with

integrated switching and signaling functionality.

The PBX version (DELPHI-PB) provides a DSP programming option for on-chip

implementations of user PBX software.

• Up to 32 full-duplex HDLC controllers for ISDN D- and B-channels (16 or 64 kbit/s)

Optimiz ed firmw are solution s guaran tee a ma ximum o f performa nce usi ng t he DELPHI

hardware and DSP power in each application.

6.10.1 Features of DELPHI-PB

• Programmable 16-bit 62 MIPS DSP core OAK + for:

– Transceivers control: layer-1 ICs on IOM-2000 or IOM-2 interfaces,

– Switching,

– Signaling (user or application specific functionality)

• On-chip memory:

– 4K program RAM

– 2K data RAM

• New generation IOM-2000 interface supporting 24layer-1 subscriber ports,

configurable to Upn or S/T standard

Solution Guide Small PBX Systems

Application Specific Details on Chipsets

Solution Guide 35 04.99

• 2 IOM-2 (GCI) interfaces with 32 time slots (2 x 2.048 Mbit/s) supporting up to 16 ISDN

subscribers or 16 analog subscribers

• 4 PCM highways with up to 2.048 Mbit/s each (32 TS)

• 32HDLC controllers for ISDN D- or B-channels (at 16 kbit/s or 64 kbit/s)

• Serial communication controller supporting a data rate of up to 16.384 Mbit/s

• A-/µ-law conversion for all B-channels

• Firmware for DSP work load measurement for statistics

• 8-bit multiplexed and de-multiplexed µP interface: Siemens, Intel or Motorola mode

• Communication between an external µP and the DSP core via on-chip mailbox

• DMA support lines for a special mailbox (serving a fast HDLC channel)

• Programmable clock generator providing all required system clocks

• Master and slave configurations

• JTAG compliant test interface with additional serial interface option connecting to the

On-chip Emulation Module (OCEM) for DSP program debugging

6.10.2 Documentation Links

– DSP Embedded Line Ports Controller with HDLC Integration (DELPHI PEB 20570

Version 1.1) Preliminary Product Overview 11.98

– DSP Embedded Line Ports Controller with HDLC Integration (DELPHI PEB 20570

Version 1.1) Preliminary Data Sheet 03.99

6.11 VIP PEB 20590

The VIP is a line transceiver IC for different line interface modes (S/T and Upn).

6.11.1 Features

• Eight 2B+D interfaces with full duplex transceivers in total, with up to four S/T (4-wire)

or eight Upn (2-wire ping-pong) interfaces:

– S/T interfaces at 192 kbit/s with analog line transceivers according to ITU I.430,

ETSI 300 012 and ANSI T1.605; compatible to QUAT-S, PEB 2084

– Upn interfaces at 384 kbit/s with analog line transceivers according to ZVEI

standard; compatible to OCTAT-P, PEB 2096

– Receive timing recovery

– Conversion between pseudo-ternary and binary codes

– Execution of test loops

– Frame alignment in trunk applications with maximum wander correction of 25 µs

– Programmable selection of S/T channels for reference clock sources in trunk

applications

• IOM-2 000 interf ace to DELPHI-PB sup porting up to 12 Upn and 12confi gurable Upn

or S/T subscriber/trunk lines

• JTAG complia nt test inte rface

Solution Guide Small PBX Systems

Application Specific Details on Chipsets

Solution Guide 36 04.99

Note: Upn refers to a version of the Up0 interface (according to ZVEI standard) with a

reduced loop length

6.11.2 Documentation Links

– Versatile Interface Port (VIP PEB 20590 Version 1.1) Preliminary Product Overview

11.98

– Versatile Interface Port (VIP PEB 20590 Version 1.1) Preliminary Data Sheet 03.99

6.12 IPAC-X, ISAC-SX and SBCX-X

The ISAC-SX implements the four-wire S/T interface used to link voice/data terminals to

ISDN. It is the successor to the ISAC-X PEB 2086.

The component switches B and D channels between the S/T and the ISDN Oriented

Modular (IOM ®) interfaces, the latter being a standard backplane interface for the ISDN

basic access.

The device provides all electrical and logical functions of the S/T interface, such as:

activation/deactivation, mode dependent timing recovery and D channel access and

priority control. The HDLC packets of the ISDN D channel are handled by the ISAC-S

which interfaces them to the associated microcontroller. In one of its operating modes

the device offers high level support of layer-2 functions of the LAPD protocol.

In addition to the ISAC-S the ISAC-SX has also a rudimentary B-channel HDLC

controller for remote download.

The IPAC-X integrates the same functionality as the ISAC-SX but has two fully

functionally B-channel HDLC controllers.

The SBCX-X does not have any HDLC controllers.

All of the three devices can be programmed either via IOM or SCI bus and have a flexible

timeslot ass ign ment.

6.12.1 Features

• Full duplex 2B + D S/T interface transceiver

• Conversion of the frame structure between the S/T interface and IOM

• Receive timing recovery according to selected operating mode

• Multiframe sync hronization

• D-channel access control (only IPAC-X and ISAC-SX)

• Activation and deactivation procedures, with automatic wake-up from power-down

state

• Access to S and Q bits of S/T interface

• Adaptively switched receive thresholds

• Frame alignment with absorption of phase wander in NT2 network side applications

Solution Guide Small PBX Systems

Application Specific Details on Chipsets

Solution Guide 37 04.99

• Support of LAPD protocol

• FIFO buffer (2 ´ 32bytes) for efficient transfer of D-channel packets

• 8-bit microprocessor interface, multiplexed or non-multiplexed

• Serial interfaces: IOM-2, SCI

• Implementation of IOM-1/IOM-2 MONITOR and C/I channel protocol to control

peripheral devices

• Microcontroller access to B-channels and intercommunication channels

• B-channel sw itc hing

• B-channel mapping on SSI-interface

• 2 B-channel HDLC controllers (only IPAC-X)

• 2 FIFO buffer (2 ´ 64 bytes) for efficient transfer of B-channel packets (only IPAC-X)

• Rudimentary B-channel HDLC controller for remote download (only ISAC-SX)

• Watch dog timer

• Test loops

Note: This chip is n ot y et available . Engineeri ng s amp les of the new S-transceivers w ill

be available in Q3, 1999.

6.12.2 Documentation Links

documentation not yet availab le

6.13 DuSLIC

DuSLIC is a chip set, comprising on e dual chann el SLICOFI-2 CODE C and two sin gle

channel SLIC chips. It is a highly flexible CODEC/SLIC solution for an analog line circuit

and is tota lly pro grammabl e via soft ware. Use rs can now a ccess dif ferent ma rkets with

a single hardware design that meets all line circuit requirements worldwide.

There are three DuSLIC options: DuSLIC-S (Standard), DuSLIC-E (Extended) and

DuSLIC-P (Power Management), optimized for different applications. They differ in both

power management and ringing features. All DuSLICs consist of the same SLICOFI-2

chip with either two SLIC-S, SLIC-E or SLIC-P chips. The employment of SLIC-S,

SLIC-E or SLIC-P depends on the application. SLIC-S (PEB 4264) and SLIC-E (PEB

4265) are optimized for access network requirements, while the power management

SLIC-P (PEB 4266) is an enhanced version f or extremely power-sen sitive ap plications

or when internal unbalanced ringing is required.

Unlike traditional designs, DuSLIC splits the SLIC function into high-voltage SLIC

functions and low -vo ltag e SLIC funct ions .

6.13.1 Features

• Internal unbalanced/balanced ringing capability up to 85 V RMS

• Programmable metering generation

• Programmable battery feed with long-loop-driving facility

Solution Guide Small PBX Systems

Application Specific Details on Chipsets

Solution Guide 38 04.99

• Fully programmable dual-channel CODEC

• Ground/loop start signaling

• Polar ity reve rsal

• Integrated test and diagnosis functions

• On-hook transmission

• Integrated DTMF generator

• Integrated DTMF decoder

• Integrated caller ID (FSK) generator

• Integrated fax/modem detection

• Optimized filter structure for modem transmission

• Three party conferencing (in PCM/mC mode)

• Message waiting lamp support (PBX)

• Power optimized architecture

• Power Management capability (Integrated battery switches)

• 8 and 16 kHz PCM Transmission

• Specification in accordance with ITU-T Recommendation Q.552 for Z-interface and

applicable LSSGR

Note: This chip is not yet available. Engineering samples of the DuSLIC will be available

in 07, 1999.

6.13.2 Documentation Links

documentation not yet available

6.14 Voltage Regulator TLE 4263

TLE 4263 G is a 5-V low-drop voltage regulator in a P-DSO-20-6 SMD package. The

maximum input voltage is 45 V. The maximum output current is more than 200 mA. The

IC is s hort-circuit proof and i ncorporates temperature protec tion that disabl es the IC at

overtemperature.

The IC reg ula tes an i npu t voltage VI in the rang e of 6 V < V I < 45 V to V Qrated = 5.0 V. A

reset signal is generated for an output voltage of VQ < 4.5 V. This voltage threshold can

be decrea se d to 3.5 V by ex ternal c onn ecti on. The reset dela y can be set e xternally by

a capacitor. The integrated watchdog logic controls the connected microcontroller.

6.14.1 Features

• Output voltage tolerance <= ± 2%

• Low-drop voltage

• Very low standby current consumption

• Overtempe ra ture prote ctio n

• Reverse polarity protection

• Short-circuit proof

Solution Guide Small PBX Systems

Application Specific Details on Chipsets

Solution Guide 39 04.99

• Setable reset threshold

• Watchdog

• Wide temperature range

6.14.2 Documentation Links

– http://www.siemens.de/semiconductor/products/36/365.htm

6.15 LED LxS269

Surface mount LED in three colors (x=S:red, x=G:green, x=Y=yellow) with very low

power consumption:

• colored, diffused package

• extreme wide-angle LED

• for use as optical indicator

• high luminous intensity at very low currents (typ. 2 mA)

• suitable for all SMT assembly and soldering methods

As throughhole version, e.g. Lx 5469 has similar features as described above.

6.15.1 Documentation Links

– http://www.siemens.de/semiconductor/products/37/371.htm

Solution Guide Small PBX Systems

Glossary

Solution Guide 40 04.99

7 Glossary

A-law Coding schem e as u sed in A/D conve rsio n for sp eech sign als

in Europe and Asia. Defined in ITU G.711.

Basic Rate BASIC RATE INTERFACE (BRI)

An ISDN service referred to as 2B+D. BRI provides two

64-kbps digital channels. It is capable of simultaneously

transmitting or receiving any digital signal (voice, video or

data). ISDN Te rminal Adapters (TAs) replace modems as the

customer-premise connection to this service, to make direct

connections of data terminals and telephones.

BORSCHT Battery Overvoltage Ringing Supervision Codec Hybrid

Testing. The seven features on an analog interface.

DSP Digital Signaling Processor

Hardware that is optimized to multiply and accumulate (MAC).

Thus fast calculations of filters are possible

DSS1 Digital Subscriber Signaling System No. 1

European Standard for the signaling on the D-channel of the

ISDN network

DTMF Dual Tone Multi Frequency

Dialin g informati on on analog interfaces (PO TS) realized with

standardized frequencies.

Frequency Shift Key

(FSK) Modem transmission technique. In this case used to transfer

Caller ID data.

FSK -> Frequency Shift Key

HDLC High Level Data Link Protocol

Secure transmission protocol using flags and checksums.

IOM ISDN Oriented Modular

4 wire s erial bus syste m to con nect ISDN device s. IOM-2 and

IOM-2000 are subsets of IOM.

ISDN INTEGRATED SERVICES DIGITAL NETWO RK (ISDN)

A set of standards for transmission of simultaneous voice, data

and video information over fewer channels than would

otherwise be needed, through the use of out-of-band

signalling. The most common ISDN system provides 144 kbps

data rate via two voice/data "B" channels at 64 kbps each plus

one signalling "D" channel at 16 kbps over a traditional copper

wire pair. Two different realizations are distinguished: -> Basic

Rate and -> Primary Rate.

Solution Guide Small PBX Systems

Glossary

Solution Guide 41 04.99

Metering Pulses -> Teletax Pulses

µ- law Coding sch eme as us ed in A/D conv ersion for spee ch signal s

in USA, Japan and Australia. Defined in ITU G.711.

PBX PRIVATE BRANCH EXCHANGE (PBX)

A Customer Premise Communication Switch used to connect

customer telephones (and related equipment) to LEC central

office lines (trunks) and to switch internal calls within the

customer’s telephone system.

Modern PBXs offer numerous software-controlled features

such as call forwarding and call pickup. A PBX uses

technolog y s imi lar to that use d b y a c entra l o ffic e s witch (on a

smaller scale).

The acronym PBX originally stood for "Plug Board Exchange".

PCM Pulse Cod e Mo dul atio n. A c odin g me chanism used to c onv ert

analog speech signals into digital data (8-bit resolution). Two

additional coding schemes apply: A-law (used in Europe and

Asia) and µ -law (used in USA, Japan, Australia). PSM is also

referred as the bus between different telecommunication

devices and consists usually of four lines: frame strobe,

clocking, data in, data out. The typical operating range of these

buses is between 128 kbit/s and 8192 kbit/s.

PLL Phased Lock Loop (PLL)

PLLs generate arbitrary synchronous clocks out of an incoming

clock signal.

POTS PLAIN OLD TELEPHONE SERVICE (POTS)

Referring to analog telephone service, nominal 0,3-3,4 kHz

bandwidth. The basic service provided by the public telephone

network, without any added facilities such as conditioning.

Primary Rate PRIMARY RATE INTERFACE (PRI)

An ISDN service that operates within USA at a rate of 1.544

Mbps (T1). This service provides 23 B channels at 64 kbps and

1 D channel at 64 kbps. The system uses 8 kbps for framing

bits.

In Europe (2.048 Mbps) the service provides 30 B channels at

64 kbps and 1 D channel at 64 kbps and uses 64 kbps for

framing bits (E1).

The service allows simultaneous transmission over all B

channels and the D channel.

RS-232 EIA hardware standard for serial transmission. V.24 is the

protocol running on the RS-232 interface.

Solution Guide Small PBX Systems

Glossary

Solution Guide 42 04.99

S-interface Bus system running over 4 wires, capable of bearing a datarate

of 144 kbit/s. It is used between the terminal equipment and the

PBX or NT and between the NT and the PBX. Up to eight

devices can be connected at the same time to the bus.

This interface is often also referred as S-bus or

S-reference-point.

SCI -> Serial Controller Interface

Serial Controller

Interface A se rial interfac e c onsis ting of a chi pse lect, a clock l ine an d a

receive and transmit line (that also can be shared). Typically

not time critical information is transferred over this connection.

Data rates from 0 kbit/s up to 1 or 2 Mbit/s are possible.

Small PBX A small PBX is used within households or small companies

and typically does not consist of more than ten telephones

connected to it.

SLIC Subscriber Line Interface Circuit. Used in analog ->POTS

connections on the subscriber side as amplifier for the ac

speech signals and for providing a DC current to operate the

connected telephone.

SPI -> Serial Controller Interface

SOHO -> Small PBX

Subscriber Line The sub scri ber lin e o r s ide is lo cat ed as the phys ical interf ace

between the terminals and the PBX. This term is used to

distinguish the two possible S-interfaces of a PBX: Subscriber

Line and (->)Trunk Line.

Teletax Pulses Short packages of 12 or 16 kHz sine waves used to signal

analog telephone sets connection fee information.

Trunk Line As trunk line of a PBX the connection to the NT of network is

defined.

TTX -> Teletax Pulses

USB Unive rsal Serial Bu s. Bus concept fo r PCs to conn ect all kind

of peripherals.

TA -> Terminal Adapter

Terminal Adapter Device consisting of an S-interface and analog -> POTS and/or

data interfaces. The transfer of data and signalling is handled

by a microcontroller running the protocol stack.

V.24 -> RS-232

Solution Guide Small PBX Systems
Index
Solution Guide  43 04.99
8Index
B
block diagram    5
BORSCHT    10
C
C161    16
C161U    20, 34
C161V/-K/-O/-RI    31
C165 UTAH    16, 18, 32
C513A    29
Caller ID    11
Concept Selection    7
D
DELPHI    19
DELPHI PEB 20750    34
DSP    20
DSP based small PBX with up to four S-interfaces    19
DSS1    9
DTMF    11
DTMF receiver    21
DTMF sender    21
DuSLIC Concept    21
F
Frequency Shift Key    11
FSK    11, 21
H
HDLC    9, 13, 16, 18, 20
I
IOM-2    9
IOM-2000    20
IPAC PSB 2115    13, 16, 25
ISAC-S PEB 2086    24
ISAC-S TE PSB 2186    9, 23
ISAC-SX    22
ISDN    5

Solution Guide Small PBX Systems
Index
Solution Guide  44 04.99
L
LED LxS269     39
line adaptation    11, 21
line test    21
Low cost, extended feature small PBX    12
Low-cost, basic feature small PBX    8
M
metering pulses    11
microcontroller    10
P
PLL    18, 20
POTS interface    10
primary rate    5
Q
Questionnaire    6
R
RS-232    16
S
SBCX PEB 2081    13, 18
SBCX-X    22
SICOFI-2/-4 TE PSB 2132/34    27
SICOFI-2/4 TE PSB 2132/PSB 2134    11
S-interface    5, 9
SL IC    10
SLICOFI-2    21
SLIC-x    21
Small Office and Ho me PBX    5
Small PBX with RS-232 dataport    14
Small PBX with USB/RS-232 dataport    16
SOHO    5
S-transceiver    9, 13
subscriber line    5
Subscriber S-interface    14
T
TA    14
teletax    11

Solution Guide Small PBX Systems
Index
Solution Guide  45 04.99
Terminal Adaptor    14
Three-Party-Conferencing    21
trunk interface    13
trunk line    5
TTX    11, 21
U
USB    16, 18, 20
V
V.24    16
VIP    19
VIP PEB 20590    35
Voltage Regulator TLE 4263    38