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July 2015

FDMC7660DC Rev.1.3 www.fairchildsemi.com

1

FDMC7660DC N-Channel Dual CoolTM 33 PowerTrench® MOSFET

FDMC7660DC

N-Channel Dual CoolTM 33 PowerTrench® MOSFET

30 V, 40 A, 2.2 mΩ

Features

Dual CoolTM Top Side Cooling PQFN package

Max rDS(on) = 2.2 mΩ at VGS = 10 V, ID = 22 A

Max rDS(on) = 3.3 mΩ at VGS = 4.5 V, ID = 18 A

High performance technology for extremely low rDS(on)

SyncFET Schottky Body Diode

RoHS Compliant

General Description

This N-Channel MOSFET is produced using Fairchild

Semiconductor’s advanced PowerTrench® process.

Advancements in both silicon and Dual CoolTM package

technologies have been combined to offer the lowest rDS(on)

while maintaining excellent switching performance by extremely

low Junction-to-Ambient thermal resistance.

Applications

Synchronous Rectifier for DC/DC Converters

Telecom Secondary Side Rectification

High End Server/Workstation

MOSFET Maximum Ratings TA= 25°C unless otherwise noted

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Ratings Units

VDS Drain to Source Voltage 30 V

VGS Gate to Source Voltage (Note 4) ±20 V

ID

Drain Current -Continuous (Package limited) TC = 25 °C 40

A

-Continuous (Silicon limited) TC = 25 °C 150

-Continuous TA = 25 °C (Note 1a) 30

-Pulsed 200

EAS Single Pulse Avalanche Energy (Note 3) 220 mJ

dv/dt Peak Diode Recovery dv/dt (Note 5) 1.0 V/ns

PDPower Dissipation TC = 25 °C 78 W

Power Dissipation TA = 25 °C (Note 1a) 3.0

TJ, TSTG Operating and Storage Junction Temperature Range -55 to + 150 °C

RθJC Thermal Resistance, Junction to Case (Top Source) 4.3

°C/W

RθJC Thermal Resistance, Junction to Case (Bottom Drain) 1.6

RθJA Thermal Resistance, Junction to Ambient (Note 1a) 42

RθJA Thermal Resistance, Junction to Ambient (Note 1b) 105

RθJA Thermal Resistance, Junction to Ambient (Note 1i) 17

RθJA Thermal Resistance, Junction to Ambient (Note 1j) 26

RθJA Thermal Resistance, Junction to Ambient (Note 1k) 12

Device Marking Device Package Reel Size Tape Width Quantity

7660 FDMC7660DC Dual CoolTM 33 13’’ 12 mm 3000 units

Top Dual CoolTM 33 Bottom

D

G

S

Pin 1

G

S

D

5

6

7

8

3

2

1

4

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2

FDMC7660DC Rev.1.3

FDMC7660DC N-Channel Dual CoolTM 33 PowerTrench® MOSFET

Electrical Characteristics TJ = 25°C unless otherwise noted

Off Characteristic s

On Characteristics

Dynamic Characteristics

Switching Characteristics

Drain-Source Diode Characteristics

Symbol Parameter Test Conditions Min Typ Max Units

BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V30 V

ΔBVDSS

ΔTJ

Breakdown Voltage Temperature

Coefficient ID = 250 μA, referenced to 25 °C 15 mV/°C

IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V1μA

IGSS Gate to Source Leakage Current, Forward VGS = 20 V, VDS = 0 V 100nA

VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA 1.2 2 2.5 V

ΔVGS(th)

ΔTJ

Gate to Source Threshold Voltage

Temperature Coefficient ID = 250 μA, referenced to 25 °C -7 mV/°C

rDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 22 A 1.62.2

mΩVGS = 4.5 V, ID = 18 A2.53.3

VGS = 10 V, ID = 22 A, TJ = 125°C 2.2 3.3

gFS Forward Transconductance VDS = 5 V, ID = 22 A 147 S

Ciss Input Capacitance VDS = 15 V, VGS = 0 V,

f = 1MHz

3885 5170 pF

Coss Output Capacitance 1215 1620 pF

Crss Reverse Transfer Capacitance 100 150 pF

RgGate Resistance 0.7 1.5 Ω

td(on) Turn-On Delay Time VDD = 15 V, ID = 22 A,

VGS = 10 V, RGEN = 6 Ω

17 31 ns

trRise Time 6.6 13 ns

td(off) Turn-Off Delay Time 36 58 ns

tfFall Time 510ns

QgTotal Gate Charge VGS = 0 V to 10 VVDD = 15 V,

ID = 22 A

54 76 nC

QgTotal Gate Charge VGS = 0 V to 4.5 V2434nC

Qgs Gate to Source Charge 13 nC

Qgd Gate to Drain “Miller” Charge 5.5 nC

VSD Source-Drain Diode Forward Voltage VGS = 0 V, IS = 22 A (Note 2) 0.8 1.2 V

VGS = 0 V, IS = 1.9 A (Note 2) 0.7 1.2

trr Reverse Recovery Time IF = 22 A, di/dt = 100 A/μs 43 69 ns

Qrr Reverse Recovery Charge 24 38 nC

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3

FDMC7660DC Rev.1.3

FDMC7660DC N-Channel Dual CoolTM 33 PowerTrench® MOSFET

Thermal Characteristics

RθJC Thermal Resistance, Junction to Case (Top Source) 4.3

°C/W

RθJC Thermal Resistance, Junction to Case (Bottom Drain) 1.6

RθJA Thermal Resistance, Junction to Ambient (Note 1a) 42

RθJA Thermal Resistance, Junction to Ambient (Note 1b) 105

RθJA Thermal Resistance, Junction to Ambient (Note 1c) 29

RθJA Thermal Resistance, Junction to Ambient (Note 1d) 40

RθJA Thermal Resistance, Junction to Ambient (Note 1e) 19

RθJA Thermal Resistance, Junction to Ambient (Note 1f) 23

RθJA Thermal Resistance, Junction to Ambient (Note 1g) 30

RθJA Thermal Resistance, Junction to Ambient (Note 1h) 79

RθJA Thermal Resistance, Junction to Ambient (Note 1i) 17

RθJA Thermal Resistance, Junction to Ambient (Note 1j) 26

RθJA Thermal Resistance, Junction to Ambient (Note 1k) 12

RθJA Thermal Resistance, Junction to Ambient (Note 1l) 16

NOTES:

1. RθJA is determined with the device mounted on a FR-4 board using a specified pad of 2 oz copper as shown below. RθJC is guaranteed by design while RθCA is determined

by the user's board design.

c. Still air, 20.9x10.4x12.7mm Aluminum Heat Sink, 1 in2 pad of 2 oz copper

d. Still air, 20.9x10.4x12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper

e. Still air, 45.2x41.4x11.7mm Aavid Thermalloy Pa rt # 10-L41B-11 Heat Sink, 1 in2 pad of 2 oz copper

f. Still air, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper

g. 200FPM Airflow, No Heat Sink,1 in2 pad of 2 oz copper

h. 200FPM Airflow, No Heat Sink, minimum pad of 2 oz copper

i. 200FPM Airflow, 20.9x10.4x12.7mm Aluminum Heat Sink, 1 in2 pad of 2 oz copper

j. 200FPM Airflow, 20.9x10.4x12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper

k. 200FPM Airflow, 45.2x41.4x11.7mm Aavid Thermallo y Part # 10-L41B-11 Heat Sink, 1 in2 pad of 2 oz copper

l. 200FPM Airflow, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper

2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.

3. EAS of 220 mJ is based on starting TJ = 25 oC; N-ch: L = 1 mH, IAS = 21 A, VDD = 27 V, VGS = 10 V. 100% test at L = 0.3 mH, IAS = 33.5 A.

4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.

5. ISD ≤ 22 A, di/dt ≤ 100 A/μs, VDD ≤ BVDSS, Starting TJ = 25 oC.

a. 42 °C/W when mounted on

a 1 in2 pad of 2 oz copper b. 105 °C/W when mounted on

a minimum pad of 2 oz copper

www.fairchildsemi.com

4

FDMC7660DC Rev.1.3

FDMC7660DC N-Channel Dual CoolTM 33 PowerTrench® MOSFET

Typical Characteristics TJ = 25°C unless otherwise noted

Figure 1.

0.00.20.40.60.81.0

0

50

100

150

200

VGS = 6 V

VGS = 4.5 V

VGS = 8 V

VGS = 4 V

PULSE D U R ATION = 80 μs

DUTY CYCLE = 0.5% MA X

VGS = 10 V

ID, DRAIN CURRENT (A)

VDS, DRAIN TO SOURCE VOLTAGE (V)

On Region Characteristics Figure 2.

0 50 100 150 200

0

1

2

3

4

VGS = 8 V

PULSE D U R ATION = 80 μs

DUTY CYCLE = 0.5% MAX

NORMALIZED

DRAIN TO SOURCE ON-RESISTANCE

ID, DRAIN CURRENT (A)

VGS = 4 V

VGS = 4.5 V

VGS = 6 V

VGS = 10 V

Normalized On-Resistance

vs Drain Current and Gate Voltage

Figure 3. Normalized On Resistance

-75 -50 -25 0 25 50 75 100 125 150

0.8

1.0

1.2

1.4

1.6

ID = 22 A

VGS = 10 V

NORMALIZED

DRAIN TO SOURCE ON-RESISTANCE

TJ, JUNCTION TEM PER ATURE (oC)

vs Junction Te mperature Figure 4.

246810

0

5

10

15

TJ = 125oC

ID = 22 A

TJ = 25 oC

VGS, GATE TO SOU R CE VOLT AGE (V)

rDS(on), DRAIN TO

SOURCE ON-RESISTANCE (mΩ)

PULSE D U R ATION = 80 μs

DUTY CYCLE = 0.5% MAX

On-Resistance vs Gate to

Source Voltage

Figure 5. Transfer Characteristics

2.02.53.03.54.04.5

0

50

100

150

200

TJ = 150 oC

VDS = 3 V

PULSE DU R ATION = 80 μs

DUTY CYCLE = 0.5% MAX

TJ = -55 oC

TJ = 25 oC

ID, DRAIN CURRENT (A)

VGS, GATE TO SOURCE VOLTAGE (V)

Figure 6.

0.2 0.4 0.6 0.8 1.0 1.2

0.1

1

10

100

TJ = -55 oC

TJ = 25 oC

TJ = 150 oC

VGS = 0 V

IS, REVERSE DRAIN CURRENT (A)

VSD, BODY DIODE FORWARD VOLTAGE (V)

500

Source to Drain Diode

Forward Voltage vs Source Current

www.fairchildsemi.com

5

FDMC7660DC Rev.1.3

FDMC7660DC N-Channel Dual CoolTM 33 PowerTrench® MOSFET

Figure 7.

0 102030405060

0

2

4

6

8

10 ID = 22 A

VDD = 20 V

VDD = 10 V

VGS, GATE TO SOURCE VOLTAGE (V)

Qg, GATE CHARGE (nC)

VDD = 15 V

Gate Charge Characteristics Figure 8.

0.1 1 10

50

100

1000

6000

f = 1 MHz

VGS = 0 V

CAPACITANCE (pF)

VDS, DRAIN TO SOURCE VOLTAGE (V)

Crss

Coss

Ciss

30

Capacitance vs Drain

to Source Voltage

Figure 9.

0.01 0.1 1 10 100 300

1

10

30

TJ = 100 oC

TJ = 25 oC

TJ = 125 oC

tAV, TIME IN AVALANCHE (ms)

IAS, AVALANCHE CURRENT (A)

Unc l amp e d Ind u ctiv e

Switching Capability Figure 10.

25 50 75 100 125 150

0

40

80

120

160

Limited by Package

VGS = 4.5 V

RθJC = 1.6 oC/W

VGS = 10 V

ID, DRAIN CURRENT (A)

TC, CASE TEMPERATURE (oC)

Maximum Continuous Drain

Current vs Case Temperature

Figure 11. Forward Bias Safe

Operating Area

0.01 0.1 1 10 100

0.01

0.1

1

10

100

500

100 us

DC

100 ms

10 ms

1 ms

1s

ID, DRAIN CURRENT (A)

VDS, DRAIN to SO U R CE VOLTAGE (V)

TH IS AREA IS

LIMITED BY rDS(on)

SINGLE PULSE

TJ = MAX RATED

RθJA = 105 oC/W

TA = 25 oC

10s

Figure 12.

10-4 10-3 10-2 10-1 110

100 1000

0.2

1

10

102

103

104

SINGLE PULSE

RθJA = 105 oC/W

TA = 25 oC

P(PK), PEAK TRANSIENT POWER (W)

t, PULSE WIDTH (sec)

Single Pulse Maximum

Power Dissipation

Typical Characteristics TJ = 25°C unless otherwise noted

www.fairchildsemi.com

6

FDMC7660DC Rev.1.3

FDMC7660DC N-Channel Dual CoolTM 33 PowerTrench® MOSFET

Figure 13. Junction-to-Ambient Transient Thermal Response Curve

10-4 10-3 10-2 10-1 110

100 1000

0.0001

0.001

0.01

0.1

1

SINGLE PULSE

RθJA = 105 oC/W

DUTY CYCLE-DESCENDING ORDER

NORMALIZED THERMAL

IMPEDANCE, ZθJA

t, RECTANGU LAR PULSE DUR ATION (sec)

D = 0.5

0.2

0.1

0.0 5

0.0 2

0.0 1

2

PDM

t1t2

NOTES:

DUTY FA CTOR: D = t1/t2

PEAK TJ = PDM x ZθJA x RθJA + TA

Typical Characteristics TJ = 25°C unless otherwise noted

SCALE: 2X

41

85

LAND PATTERN

RECOMMENDATION

L

C

SYM

PKG

C

L

NOTES: UNLESS OTHERWISE SPECIFIED

A) PACKAGE STANDARD REFERENCE:

JEDEC MO-240, ISSUE A, VAR. BA,

DATED OCTOBER 2002.

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) DIMENSIONS DO NOT INCLUDE BURRS

OR MOLD FLASH. MOLD FLASH OR

BURRS DOES NOT EXCEED 0.10MM.

D) DIMENSIONING AND TOLERANCING PER

ASME Y14.5M-2009.

E) DRAWING FILE NAME: PQFN08CREV3

14

85

3.30

C

L

PKG

A

3.30

B

C

L

PKG

2.37 MIN

(0.45)

(0.40)

(0.65) 0.70 MIN

0.42 MIN0.65

1.95

2.15 MIN

SEE DETAIL 'A'

1.00±0.05

0.10 C

0.08 C

0.20±0.025

0.05

0.00

SEATING

PLANE

C

0.32±0.05

1.95

0.65

0.40±0.10

2.00±0.10

(2.27)

0.52

(0.20)

(0.39)

0.10 C A B

14

85

PKG

C

L

KEEP

OUT

AREA

3.40

3.30±0.10

www.onsemi.com

1

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent

coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.

ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,

regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer

application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not

designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification

in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized

application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and

expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such

claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This

literature is subject to all applicable copyright laws and is not for resale in any manner.

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