LMC6484
CMOS Quad Rail-to-Rail Input and Output Operational
Amplifier
General Description
The LMC6484 provides a common-mode range that extends
to both supply rails. This rail-to-rail performance combined
with excellent accuracy, due to a high CMRR, makes it
unique among rail-to-rail input amplifiers.
It is ideal for systems, such as data acquisition, that require
a large input signal range. The LMC6484 is also an excellent
upgrade for circuits using limited common-mode range am-
plifiers such as the TLC274 and TLC279.
Maximum dynamic signal range is assured in low voltage
and single supply systems by the LMC6484’s rail-to-rail out-
put swing. The LMC6484’s rail-to-rail output swing is guaran-
teed for loads down to 600Ω.
Guaranteed low voltage characteristics and low power dissi-
pation make the LMC6484 especially well-suited for
battery-operated systems.
See the LMC6482 data sheet for a Dual CMOS operational
amplifier with these same features.
Features
(Typical unless otherwise noted)
nRail-to-Rail Input Common-Mode Voltage Range
(Guaranteed Over Temperature)
nRail-to-Rail Output Swing (within 20 mV of supply rail,
100 kΩload)
nGuaranteed 3V, 5V and 15V Performance
nExcellent CMRR and PSRR: 82 dB
nUltra Low Input Current: 20 fA
nHigh Voltage Gain (R
L
= 500 kΩ): 130 dB
nSpecified for 2 kΩand 600Ωloads
Applications
nData Acquisition Systems
nTransducer Amplifiers
nHand-held Analytic Instruments
nMedical Instrumentation
nActive Filter, Peak Detector, Sample and Hold, pH
Meter, Current Source
nImproved Replacement for TLC274, TLC279
3V Single Supply Buffer Circuit
Rail-to-Rail Input
DS011714-1 DS011714-2
Rail-to-Rail Output
DS011714-3
August 2000
LMC6484 CMOS Quad Rail-to-Rail Input and Output Operational Amplifier
© 2000 National Semiconductor Corporation DS011714 www.national.com
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2) 2.0 kV
Differential Input Voltage ±Supply Voltage
Voltage at Input/Output Pin (V
+
) + 0.3V, (V
−
) − 0.3V
Supply Voltage (V
+
−V
−
) 16V
Current at Input Pin (Note 12) ±5mA
Current at Output Pin
(Notes 3, 8) ±30 mA
Current at Power Supply Pin 40 mA
Lead Temp. (Soldering, 10 sec.) 260˚C
Storage Temperature Range −65˚C to +150˚C
Junction Temperature (Note 4) 150˚C
Operating Ratings (Note 1)
Supply Voltage 3.0V ≤V
+
≤15.5V
Junction Temperature Range
LMC6484AM −55˚C ≤T
J
≤+125˚C
LMC6484AI, LMC6484I −40˚C ≤T
J
≤+85˚C
Thermal Resistance (θ
JA
)
N Package, 14-Pin Molded DIP 70˚C/W
M Package, 14-Pin
Surface Mount 110˚C/W
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J
= 25˚C, V
+
= 5V, V
−
= 0V, V
CM
=V
O
=V
+
/2 and R
L
>1M. Boldface
limits apply at the temperature extremes.
Typ LMC6484AI LMC6484I LMC6484M
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
V
OS
Input Offset Voltage 0.110 0.750 3.0 3.0 mV
1.35 3.7 3.8 max
TCV
OS
Input Offset Voltage 1.0 µV/˚C
Average Drift
I
B
Input Current (Note 13) 0.02 4.0 4.0 100 pA max
I
OS
Input Offset Current (Note 13) 0.01 2.0 2.0 50 pA max
C
IN
Common-Mode 3 pF
Input Capacitance
R
IN
Input Resistance >10 Tera Ω
CMRR Common Mode 0V ≤V
CM
≤15.0V, 82 70 65 65 dB
min
Rejection Ratio V
+
= 15V 67 62 60
0V ≤V
CM
≤5.0V 82 70 65 65
V
+
=5V 67 62 60
+PSRR Positive Power Supply 5V ≤V
+
≤15V, 82 70 65 65 dB
Rejection Ratio V
−
= 0V, V
O
= 2.5V 67 62 60 min
−PSRR Negative Power Supply −5V ≤V
−
≤−15V, 82 70 65 65 dB
Rejection Ratio V
+
= 0V, V
O
= −2.5V 67 62 60 min
V
CM
Input Common-Mode V
+
= 5V and 15V V
−
− 0.3 −0.25 −0.25 −0.25 V
Voltage Range For CMRR ≥50 dB 000max
V
+
+ 0.3 V
+
+ 0.25 V
+
+ 0.25 V
+
+ 0.25 V
V
+
V
+
V
+
min
A
V
Large Signal R
L
=2kΩSourcing 666 140 120 120 V/mV
Voltage Gain (Notes 7, 13) 84 72 60 min
Sinking 75 35 35 35 V/mV
20 20 18 min
R
L
= 600ΩSourcing 300 80 50 50 V/mV
(Notes 7, 13) 48 30 25 min
Sinking 35 20 15 15 V/mV
13 10 8 min
LMC6484
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DC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for T
J
= 25˚C, V
+
= 5V, V
−
= 0V, V
CM
=V
O
=V
+
/2 and R
L
>1M. Boldface
limits apply at the temperature extremes.
Typ LMC6484AI LMC6484I LMC6484M
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
V
O
Output Swing V
+
= 5V 4.9 4.8 4.8 4.8 V
R
L
=2kΩto V
+
/2 4.7 4.7 4.7 min
0.1 0.18 0.18 0.18 V
0.24 0.24 0.24 max
V
+
= 5V 4.7 4.5 4.5 4.5 V
R
L
= 600Ωto V
+
/2 4.24 4.24 4.24 min
0.3 0.5 0.5 0.5 V
0.65 0.65 0.65 max
V
+
= 15V 14.7 14.4 14.4 14.4 V
R
L
=2kΩto V
+
/2 14.2 14.2 14.2 min
0.16 0.32 0.32 0.32 V
0.45 0.45 0.45 max
V
+
= 15V 14.1 13.4 13.4 13.4 V
R
L
= 600Ωto V
+
/2 13.0 13.0 13.0 min
0.5 1.0 1.0 1.0 V
1.3 1.3 1.3 max
I
SC
Output Short Circuit Sourcing, V
O
=0V 20161616mA
Current 12 12 10 min
V+ = 5V Sinking, V
O
=5V 15111111mA
9.5 9.5 8.0 min
I
SC
Output Short Circuit Sourcing, V
O
=0V 30282828mA
Current 22 22 20 min
V
+
= 15V Sinking, V
O
= 12V 30 30 30 30 mA
(Note 8) 24 24 22 min
I
S
Supply Current All Four Amplifiers 2.0 2.8 2.8 2.8 mA
V
+
= +5V, V
O
=V
+
/2 3.6 3.6 3.8 max
All Four Amplifiers 2.6 3.0 3.0 3.0 mA
V
+
= +15V, V
O
=V
+
/2 3.8 3.8 4.0 max
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J
= 25˚C, V
+
= 5V, V
−
= 0V, V
CM
=V
O
=V
+
/2 and R
L
>1M. Boldface
limits apply at the temperature extremes.
Typ LMC6484A LMC6484I LMC6484M
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
SR Slew Rate (Note 9) 1.3 1.0 0.9 0.9 V/µs
0.7 0.63 0.54 min
GBW Gain-Bandwidth Product V
+
= 15V 1.5 MHz
φ
m
Phase Margin 50 Deg
G
m
Gain Margin 15 dB
Amp-to-Amp Isolation (Note 10) 150 dB
e
n
Input-Referred f = 1 kHz 37
Voltage Noise V
CM
=1V
i
n
Input-Referred f = 1 kHz 0.03
Current Noise
LMC6484
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AC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for T
J
= 25˚C, V
+
= 5V, V
−
= 0V, V
CM
=V
O
=V
+
/2 and R
L
>1M. Boldface
limits apply at the temperature extremes.
Typ LMC6484A LMC6484I LMC6484M
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
T.H.D. Total Harmonic Distortion f = 1 kHz, A
V
= −2 0.01 %
R
L
=10kΩ,V
O
= 4.1 V
PP
f = 10 kHz, A
V
=−2
R
L
=10kΩ,V
O
= 8.5 V
PP
0.01 %
V
+
= 10V
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J
= 25˚C, V
+
= 3V, V
−
= 0V, V
CM
=V
O
=V
+
/2 and R
L
>1M
Typ LMC6484AI LMC6484I LMC6484M
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
V
OS
Input Offset Voltage 0.9 2.0 3.0 3.0 mV
2.7 3.7 3.8 max
TCV
OS
Input Offset Voltage 2.0 µV/˚C
Average Drift
I
B
Input Bias Current 0.02 pA
I
OS
Input Offset Current 0.01 pA
CMRR Common Mode 0V ≤V
CM
≤3V 74 64 60 60 dB
Rejection Ratio min
PSRR Power Supply 3V ≤V
+
≤15V, V
−
=0V80686060dB
Rejection Ratio min
V
CM
Input Common-Mode For CMRR ≥50 dB V
−
− 0.25 0 0 0 V
Voltage Range max
V
+
+ 0.25 V
+
V
+
V
+
V
min
V
O
Output Swing R
L
=2kΩto V
+
/2 2.8 V
0.2 V
R
L
= 600Ωto V
+
/2 2.7 2.5 2.5 2.5 V
min
0.37 0.6 0.6 0.6 V
max
I
S
Supply Current All Four Amplifiers 1.65 2.5 2.5 2.5 mA
3.0 3.0 3.2 max
AC Electrical Characteristics
Unless otherwise specified, V
+
= 3V, V
−
= 0V, V
CM
=V
O
=V
+
/2 and R
L
>1M
Typ LMC6484AI LMC6484I LMC6484M
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
SR Slew Rate (Note 11) 0.9 V/µs
GBW Gain-Bandwidth Product 1.0 MHz
T.H.D. Total Harmonic Distortion f = 10 kHz, A
V
= −2 0.01 %
R
L
=10kΩ,V
O
=2V
PP
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is in-
tended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5 kΩin series with 100 pF. All pins rated per method 3015.6 of MIL-STD-883. This is a class 2 device rating.
LMC6484
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AC Electrical Characteristics (Continued)
Note 3: Applies to both single supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maxi-
mum allowed junction temperature of 150˚C. Output currents in excess of ±30 mA over long term may adversely affect reliability.
Note 4: The maximum power dissipation is a function of TJ(max),θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD=(T
J(max)
−T
A
)/θJA. All numbers apply for packages soldered directly into a PC board.
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: V+= 15V, VCM = 7.5V and RLconnected to 7.5V. For Sourcing tests, 7.5V ≤VO≤11.5V. For Sinking tests, 3.5V ≤VO≤7.5V.
Note 8: Do not short circuit output to V+, when V+is greater than 13V or reliability will be adversely affected.
Note 9: V+= 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of either the positive or negative slew rates.
Note 10: Input referred, V+= 15V and RL= 100 kΩconnected to 7.5V. Each amp excited in turn with 1 kHz to produce VO=12V
PP.
Note 11: Connected as Voltage Follower with 2V step input. Number specified is the slower of either the positive or negative slew rates.
Note 12: Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings.
Note 13: Guaranteed limits are dictated by tester limitations and not device performance. Actual performance is reflected in the typical value.
Note 14: For guaranteed Military Temperature Range parameters see RETSMC6484X.
Typical Performance Characteristics V
S
= +15V, Single Supply, T
A
= 25˚C unless otherwise
specified
Supply Current vs
Supply Voltage
DS011714-39
Input Current vs
Temperature
DS011714-40
Sourcing Current vs
Output Voltage
DS011714-41
Sourcing Current vs
Output Voltage
DS011714-42
Sourcing Current vs
Output Voltage
DS011714-43
Sinking Current vs
Output Voltage
DS011714-44
LMC6484
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Typical Performance Characteristics V
S
= +15V, Single Supply, T
A
= 25˚C unless otherwise
specified (Continued)
Sinking Current vs
Output Voltage
DS011714-45
Sinking Current vs
Output Voltage
DS011714-46
Output Voltage Swing
vs Supply Voltage
DS011714-47
Input Voltage Noise
vs Frequency
DS011714-48
Input Voltage Noise
vs Input Voltage
DS011714-49
Input Voltage Noise
vs Input Voltage
DS011714-50
Input Voltage Noise
vs Input Voltage
DS011714-51
Crosstalk Rejection
vs Frequency
DS011714-52
LMC6484
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Typical Performance Characteristics V
S
= +15V, Single Supply, T
A
= 25˚C unless otherwise
specified (Continued)
Crosstalk Rejection
vs Frequency
DS011714-53
Positive PSRR
vs Frequency
DS011714-54
Negative PSRR
vs Frequency
DS011714-55
CMRR vs Frequency
DS011714-56
CMRR vs Input Voltage
DS011714-57
CMRR vs Input Voltage
DS011714-58
CMRR vs Input Voltage
DS011714-59
∆V
OS
vs CMR
DS011714-60
∆V
OS
vs CMR
DS011714-61
LMC6484
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Typical Performance Characteristics V
S
= +15V, Single Supply, T
A
= 25˚C unless otherwise
specified (Continued)
Input Voltage
vs Output Voltage
DS011714-62
Input Voltage
vs Output Voltage
DS011714-63
Open Loop
Frequency Response
DS011714-64
Open Loop Frequency
Response
DS011714-65
Open Loop Frequency
Response vs Temperature
DS011714-66
Maximum Output Swing
vs Frequency
DS011714-67
Gain and Phase
vs Capacitive Load
DS011714-68
Gain and Phase
vs Capacitive Load
DS011714-69
Open Loop Output
Impedance vs Frequency
DS011714-70
LMC6484
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Typical Performance Characteristics V
S
= +15V, Single Supply, T
A
= 25˚C unless otherwise
specified (Continued)
Open Loop Output
Impedance vs Frequency
DS011714-71
Slew Rate vs
Supply Voltage
DS011714-72
Non-Inverting Large Signal
Pulse Response
DS011714-73
Non-Inverting Large Signal
Pulse Response
DS011714-74
Non-Inverting Large Signal
Pulse Response
DS011714-75
Non-Inverting Small Signal
Pulse Response
DS011714-76
Non-Inverting Small Signal
Pulse Response
DS011714-77
Non-Inverting Small Signal
Pulse Response
DS011714-78
Inverting Large Signal
Pulse Response
DS011714-79
LMC6484
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Typical Performance Characteristics V
S
= +15V, Single Supply, T
A
= 25˚C unless otherwise
specified (Continued)
Inverting Large Signal
Pulse Response
DS011714-80
Inverting Large Signal
Pulse Response
DS011714-81
Inverting Small Signal
Pulse Response
DS011714-82
Inverting Small Signal
Pulse Response
DS011714-83
Inverting Small Signal
Pulse Response
DS011714-84
Stability vs
Capacitive Load
DS011714-85
Stability vs
Capacitive Load
DS011714-86
Stability vs
Capacitive Load
DS011714-87
Stability vs
Capacitive Load
DS011714-88
LMC6484
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Typical Performance Characteristics V
S
= +15V, Single Supply, T
A
= 25˚C unless otherwise
specified (Continued)
Application Information
1.0 Amplifier Topology
The LMC6484 incorporates specially designed
wide-compliance range current mirrors and the body effect to
extend input common mode range to each supply rail.
Complementary paralleled differential input stages, like the
type used in other CMOS and bipolar rail-to-rail input ampli-
fiers, were not used because of their inherent accuracy prob-
lems due to CMRR, cross-over distortion, and open-loop
gain variation.
The LMC6484’s input stage design is complemented by an
output stage capable of rail-to-rail output swing even when
driving a large load. Rail-to-rail output swing is obtained by
taking the output directly from the internal integrator instead
of an output buffer stage.
2.0 Input Common-Mode Voltage Range
Unlike Bi-FET amplifier designs, the LMC6484 does not ex-
hibit phase inversion when an input voltage exceeds the
negative supply voltage.
Figure 1
shows an input voltage ex-
ceeding both supplies with no resulting phase inversion on
the output.
The absolute maximum input voltage is 300 mV beyond ei-
ther supply rail at room temperature. Voltages greatly ex-
ceeding this absolute maximum rating, as in
Figure 2
, can
cause excessive current to flow in or out of the input pins
possibly affecting reliability.
Applications that exceed this rating must externally limit the
maximum input current to ±5 mA with an input resistor as
shown in
Figure 3
.
3.0 Rail-To-Rail Output
The approximated output resistance of the LMC6484 is
180Ωsourcing and 130Ωsinking at V
S
= 3V and 110Ω
sourcing and 83Ωsinking at V
S
= 5V. Using the calculated
output resistance, maximum output voltage swing can be es-
timated as a function of load.
4.0 Capacitive Load Tolerance
The LMC6484 can typically directly drive a 100 pF load with
V
S
= 15V at unity gain without oscillating. The unity gain fol-
lower is the most sensitive configuration. Direct capacitive
Stability vs
Capacitive Load
DS011714-89
Stability vs
Capacitive Load
DS011714-90
DS011714-10
FIGURE 1. An Input Voltage Signal Exceeds the
LMC6484 Power Supply Voltages with
No Output Phase Inversion
DS011714-12
FIGURE 2. A ±7.5V Input Signal Greatly
Exceeds the 3V Supply in
Figure 3
Causing
No Phase Inversion Due to R
I
DS011714-11
FIGURE 3. R
I
Input Current Protection for
Voltages Exceeding the Supply Voltage
LMC6484
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Application Information (Continued)
loading reduces the phase margin of op-amps. The combi-
nation of the op-amp’s output impedance and the capacitive
load induces phase lag. This results in either an under-
damped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in
Figure 4
. This simple tech-
nique is useful for isolating the capacitive input of multiplex-
ers and A/D converters.
Improved frequency response is achieved by indirectly driv-
ing capacitive loads as shown in
Figure 6
.
R1 and C1 serve to counteract the loss of phase margin by
feeding forward the high frequency component of the output
signal back to the amplifier’s inverting input, thereby preserv-
ing phase margin in the overall feedback loop. The values of
R1 and C1 are experimentally determined for the desired
pulse response. The resulting pulse response can be seen in
Figure 7
.
5.0 Compensating for Input Capacitance
It is quite common to use large values of feedback resis-
tance with amplifiers that have ultra-low input current, like
the LMC6484. Large feedback resistors can react with small
values of input capacitance due to transducers, photo-
diodes, and circuit board parasitics to reduce phase
margins.
The effect of input capacitance can be compensated for by
adding a feedback capacitor. The feedback capacitor (as in
Figure 8
), C
f
, is first estimated by:
or R
1
C
IN
≤R
2
C
f
which typically provides significant overcompensation.
Printed circuit board stray capacitance may be larger or
smaller than that of a breadboard, so the actual optimum
value for C
f
may be different. The values of C
f
should be
checked on the actual circuit. (Refer to the LMC660 quad
CMOS amplifier data sheet for a more detailed discussion.)
6.0 Printed-Circuit-Board Layout for High-Impedance
Work
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. when one wishes to take advantage
DS011714-17
FIGURE 4. Resistive Isolation
of a 330 pF Capacitive Load
DS011714-18
FIGURE 5. Pulse Response of
the LMC6484 Circuit in
Figure 4
DS011714-15
FIGURE 6. LMC6484 Non-Inverting Amplifier,
Compensated to Handle a 330 pF Capacitive Load
DS011714-16
FIGURE 7. Pulse Response of
LMC6484 Circuit in
Figure 6
DS011714-19
FIGURE 8. Canceling the Effect of Input Capacitance
LMC6484
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Application Information (Continued)
of the ultra-low input current of the LMC6484, typically less
than 20 fA, it is essential to have an excellent layout. Fortu-
nately, the techniques of obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear accept-
ably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC6484’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals, etc. connected to the op-amp’s inputs, as in
Fig-
ure 9
. To have a significant effect, guard rings should be
placed in both the top and bottom of the PC board. This PC
foil must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 10
12
Ω, which is nor-
mally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of the input. This
would cause a 250 times degradation from the LMC6484’s
actual performance. However, if a guard ring is held within 5
mV of the inputs, then even a resistance of 10
11
Ωwould
cause only 0.05 pA of leakage current. See
Figure 10
for
typical connections of guard rings for standard op-amp
configurations.
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don’t insert the amplifier’s input pin into the
board at all, but bend it up in the air and use only air as an in-
sulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board con-
struction, but the advantages are sometimes well worth the
effort of using point-to-point up-in-the-air wiring.
See
Figure 11
.
DS011714-20
FIGURE 9. Example of Guard Ring in P.C. Board
Layout
DS011714-21
Inverting Amplifier
DS011714-22
Non-Inverting Amplifier
DS011714-23
Follower
FIGURE 10. Typical Connections of Guard Rings
DS011714-24
(Input pins are lifted out of PC board and soldered directly to components.
All other pins connected to PC board.)
FIGURE 11. Air Wiring
LMC6484
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Application Information (Continued)
7.0 Offset Voltage Adjustment
Offset voltage adjustment circuits are illustrated in
Figures
13, 14
. Large value resistances and potentiometers are used
to reduce power consumption while providing typically ±2.5
mV of adjustment range, referred to the input, for both con-
figurations with V
S
=±5V.
8.0 Upgrading Applications
The LMC6484 quads and LMC6482 duals have industry
standard pin outs to retrofit existing applications. System
performance can be greatly increased by the LMC6484’s
features. The key benefit of designing in the LMC6484 is in-
creased linear signal range. Most op-amps have limited in-
put common mode ranges. Signals that exceed this range
generate a non-linear output response that persists long af-
ter the input signal returns to the common mode range.
Linear signal range is vital in applications such as filters
where signal peaking can exceed input common mode
ranges resulting in output phase inversion or severe distor-
tion.
9.0 Data Acquisition Systems
Low power, single supply data acquisition system solutions
are provided by buffering the ADC12038 with the LMC6484
(
Figure 14
). Capable of using the full supply range, the
LMC6484 does not require input signals to be scaled down
to meet limited common mode voltage ranges. The
LMC6484 CMRR of 82 dB maintains integral linearity of a
12-bit data acquisition system to ±0.325 LSB. Other
rail-to-rail input amplifiers with only 50 dB of CMRR will de-
grade the accuracy of the data acquisition system to only 8
bits.
DS011714-25
FIGURE 12. Inverting Configuration
Offset Voltage Adjustment
DS011714-26
FIGURE 13. Non-Inverting Configuration
Offset Voltage Adjustment
LMC6484
www.national.com 14
Application Information (Continued)
10.0 Instrumentation Circuits
The LMC6484 has the high input impedance, large
common-mode range and high CMRR needed for designing
instrumentation circuits. Instrumentation circuits designed
with the LMC6484 can reject a larger range of
common-mode signals than most in-amps. This makes in-
strumentation circuits designed with the LMC6484 an excel-
lent choice for noisy or industrial environments. Other appli-
cations that benefit from these features include analytic
medical instruments, magnetic field detectors, gas detectors,
and silicon-based transducers.
A small valued potentiometer is used in series with Rg to set
the differential gain of the 3 op-amp instrumentation circuit in
Figure 15
. This combination is used instead of one large val-
ued potentiometer to increase gain trim accuracy and reduce
error due to vibration.
DS011714-28
FIGURE 14. Operating from the same
Supply Voltage, the LMC6484 buffers the
ADC12038 maintaining excellent accuracy
DS011714-29
FIGURE 15. Low Power 3 Op-Amp Instrumentation Amplifier
LMC6484
www.national.com15
Application Information (Continued)
A 2 op-amp instrumentation amplifier designed for a gain of
100 is shown in
Figure 16
. Low sensitivity trimming is made
for offset voltage, CMRR and gain. Low cost and low power
consumption are the main advantages of this two op-amp
circuit.
Higher frequency and larger common-mode range applica-
tions are best facilitated by a three op-amp instrumentation
amplifier.
11.0 Spice Macromodel
A spice macromodel is available for the LMC6484. This
model includes accurate simulation of:
•input common-mode voltage range
•frequency and transient response
•GBW dependence on loading conditions
•quiescent and dynamic supply current
•output swing dependence on loading conditions
and many more characteristics as listed on the macromodel
disk.
Contact your local National Semiconductor sales office to
obtain an operational amplifier spice model library disk.
Typical Single-Supply Applications
The circuit in
Figure 17
use a single supply to half wave rec-
tify a sinusoid centered about ground. R
I
limits current into
the amplifier caused by the input voltage exceeding the sup-
ply voltage. Full wave rectification is provided by the circuit in
Figure 19
.
DS011714-30
FIGURE 16. Low-Power Two-Op-Amp Instrumentation Amplifier
DS011714-31
FIGURE 17. Half-Wave Rectifier with
Input Current Protection (RI)
DS011714-32
FIGURE 18. Half-Wave Rectifier Waveform
DS011714-33
FIGURE 19. Full Wave Rectifier
with Input Current Protection (R
I
)
LMC6484
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Typical Single-Supply Applications (Continued)
DS011714-34
FIGURE 20. Full Wave Rectifier Waveform
DS011714-35
FIGURE 21. Large Compliance Range Current Source
DS011714-36
FIGURE 22. Positive Supply Current Sense
LMC6484
www.national.com17
Typical Single-Supply Applications (Continued)
In
Figure 23
dielectric absorption and leakage is minimized by using a polystyrene or polyethylene hold capacitor. The droop rate
is primarily determined by the value of C
H
and diode leakage current. The ultra-low input current of the LMC6484 has a negligible
effect on droop.
The LMC6484’s high CMRR (85 dB) allows excellent accuracy throughout the circuit’s rail-to-rail dynamic capture range.
The low pass filter circuit in
Figure 25
can be used as an anti-aliasing filter with the same voltage supply as the A/D converter.
Filter designs can also take advantage of the LMC6484 ultra-low input current. The ultra-low input current yields negligible offset
error even when large value resistors are used. This in turn allows the use of smaller valued capacitors which take less board
space and cost less.
DS011714-37
FIGURE 23. Low Voltage Peak Detector with Rail-to-Rail Peak Capture Range
DS011714-38
FIGURE 24. Rail-to-Rail Sample and Hold
DS011714-27
FIGURE 25. Rail-to-Rail Single Supply Low Pass Filter
LMC6484
www.national.com 18
Connection Diagram
Ordering Information
Package Temperature Range NSC
Drawing Transport
Media
Military Industrial
−55˚C to +125˚C −40˚C to +85˚C
14-pin LMC6484AIN N14A Rail
Molded DIP LMC6484IN
14-pin LMC6484AIM, AIMX M14A Rail
Small Outline LMC6484IM, IMX Tape and
Reel
14-pin Ceramic
DIP LMC6484AMJ/883 J14A Rail
DS011714-4
LMC6484
www.national.com19
Physical Dimensions inches (millimeters) unless otherwise noted
14-Pin Ceramic Dual-In-Line Package
Order Number LMC6484AMJ/883
NS Package Number J14A
LMC6484
www.national.com 20
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Pin Small Outline
Order Package Number LMC6484AIM, LMC6484AIMX, LMC6484IM or LMC6484IMX
NS Package Number M14A
LMC6484
www.national.com21
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
National Semiconductor
Corporation
Americas
Tel: 1-800-272-9959
Fax: 1-800-737-7018
Email: support@nsc.com
National Semiconductor
Europe Fax: +49 (0) 180-530 85 86
Email: europe.support@nsc.com
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English Tel: +44 (0) 870 24 0 2171
Français Tel: +33 (0) 1 41 91 8790
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Response Group
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Email: ap.support@nsc.com
National Semiconductor
Japan Ltd.
Tel: 81-3-5639-7560
Fax: 81-3-5639-7507
www.national.com
14-Pin Molded DIP
Order Package Number LMC6484AIN, LMC6484IN or LMC6484MN
NS Package Number N14A
LMC6484 CMOS Quad Rail-to-Rail Input and Output Operational Amplifier
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
