SN65HVD05, SN65HVD06 SN75HVD05, SN65HVD07 SN75HVD06, SN75HVD07 SLLS533E - MAY 2002 - REVISED AUGUST 2009 www.ti.com HIGH OUTPUT RS-485 TRANSCEIVERS Check for Samples: SN65HVD05, SN65HVD06, SN75HVD05, SN65HVD07, SN75HVD06, SN75HVD07 FEATURES 1 * * * * * * * * * Minimum Differential Output Voltage of 2.5 V Into a 54- Load Open-Circuit, Short-Circuit, and Idle-Bus Failsafe Receiver 1/8th Unit-Load Option Available (Up to 256 Nodes on the Bus) Bus-Pin ESD Protection Exceeds 16 kV HBM Driver Output Slew Rate Control Options Electrically Compatible With ANSI TIA/EIA-485-A Standard Low-Current Standby Mode: 1 A Typical Glitch-Free Power-Up and Power-Down Protection for Hot-Plugging Applications Pin Compatible With Industry Standard SN75176 APPLICATIONS * * * * * * * Data Transmission Over Long or Lossy Lines or Electrically Noisy Environments Profibus Line Interface Industrial Process Control Networks Point-of-Sale (POS) Networks Electric Utility Metering Building Automation Digital Motor Control DESCRIPTION The SN65HVD05, SN75HVD05, SN65HVD06, SN75HVD06, SN65HVD07, and SN75HVD07 combine a 3-state differential line driver and differential line receiver. They are designed for balanced data transmission and interoperate with ANSI TIA/EIA-485-A and ISO 8482E standard-compliant devices. The driver is designed to provide a differential output voltage greater than that required by these standards for increased noise margin. The drivers and receivers have active-high and active-low enables respectively, which can be externally connected together to function as direction control. The driver differential outputs and receiver differential inputs connect internally to form a differential input/ output (I/O) bus port that is designed to offer minimum loading to the bus whenever the driver is disabled or not powered. These devices feature wide positive and negative common-mode voltage ranges, making them suitable for party-line applications. D OR P PACKAGE (TOP VIEW) R RE DE D V O - Differential Output Voltage - V 5 4 60 Load Line 3.5 TA = 25C DE at VCC D at VCC VCC = 5 V R RE 30 Load Line 3 DE 2.5 8 2 7 3 6 4 5 VCC B A GND LOGIC DIAGRAM (POSITIVE LOGIC) DIFFERENTIAL OUTPUT VOLTAGE vs DIFFERENTIAL OUTPUT CURRENT 4.5 1 1 2 3 6 2 D 1.5 1 4 7 A B 0.5 0 0 20 40 60 80 100 120 IOD - Differential Output Current - mA 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2002-2009, Texas Instruments Incorporated SN65HVD05, SN65HVD06 SN75HVD05, SN65HVD07 SN75HVD06, SN75HVD07 SLLS533E - MAY 2002 - REVISED AUGUST 2009 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION (1) MARKED AS DRIVER OUTPUT SLOPE CONTROL SIGNALING RATE UNIT LOAD 40 Mbps 1/2 No 10 Mbps 1/8 Yes (1) (2) PART NUMBER (2) TA -40C to 85C PLASTIC DUAL-IN-LINE PACKAGE (PDIP) SMALL OUTLINE IC (SOIC) PACKAGE SN65HVD05D SN65HVD05P 65HVD05 VP05 SN65HVD06D SN65HVD06P 65HVD06 VP06 1 Mbps 1/8 Yes SN65HVD07D SN65HVD07P 65HVD07 VP07 40 Mbps 1/2 No SN75HVD05D SN75HVD05P 75HVD05 VN05 10 Mbps 1/8 Yes SN75HVD06D SN75HVD06P 75HVD06 VN06 1 Mbps 1/8 Yes SN75HVD07D SN75HVD07P 75HVD07 VN07 0C to 70C For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. The D package is available taped and reeled. Add an R suffix to the device type (i.e., SN65HVD05DR). PACKAGE DISSIPATION RATINGS (See Figure 12 and Figure 13) PACKAGE TA 25C POWER RATING DERATING FACTOR (1) ABOVE TA = 25C TA = 70C POWER RATING TA = 85C POWER RATING D (2) 710 mW 5.7 mW/C 455 mW 369 mW 1282 mW 10.3 mW/C 821 mW 667 mW 1000 mW 8.0 m W/C 640 mW 520 mW D (3) P (1) (2) (3) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow. Tested in accordance with the Low-K thermal metric definitions of EIA/JESD51-3 Tested in accordance with the High-K thermal metric definitions of EIA/JESD51-7 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted (1) (2) SN65HVD05, SN65HVD06, SN65HVD07 SN75HVD05, SN75HVD06, SN75HVD07 -0.3 V to 6 V Supply voltage range, VCC -9 V to 14 V Voltage range at A or B -0.5 V to VCC + 0.5 V Input voltage range at D, DE, R or RE Voltage input range, transient pulse, A and B, through 100 (see Figure 11) Electrostatic discharge Human body model (3) Charged-device model (4) Continuous total power dissipation (1) (2) (3) (4) 2 -50 V to 50 V -11 mA to 11mA Receiver output current, IO A, B, and GND 16 kV All pins 4 kV All pins 1 kV See Dissipation Rating Table Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under" recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values, except differential I/O bus voltages, are with respect to network ground terminal. Tested in accordance with JEDEC Standard 22, Test Method A114-A. Tested in accordance with JEDEC Standard 22, Test Method C101. Submit Documentation Feedback Copyright (c) 2002-2009, Texas Instruments Incorporated Product Folder Link(s): SN65HVD05 SN65HVD06 SN75HVD05 SN65HVD07 SN75HVD06 SN75HVD07 SN65HVD05, SN65HVD06 SN75HVD05, SN65HVD07 SN75HVD06, SN75HVD07 SLLS533E - MAY 2002 - REVISED AUGUST 2009 www.ti.com RECOMMENDED OPERATING CONDITIONS MIN NOM MAX Supply voltage, VCC Voltage at any bus terminal (separately or common mode) VI or VIC High-level input voltage, VIH D, DE, RE Low-level input voltage, VIL D, DE, RE 5.5 V -7 (1) 12 V 2 High-level output current, IOH Low-level output current, IOL V -12 Differential input voltage, VID (see Figure 7) 0.8 V 12 V -100 Driver UNIT 4.5 mA -8 Receiver Driver 100 Receiver 8 mA SN65HVD05 SN65HVD06 Operating free-air temperature, TA -40 85 C 0 70 C SN65HVD07 SN75HVD05 SN75HVD06 SN75HVD07 (1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet. DRIVER ELECTRICAL CHARACTERISTICS over operating free-air temperature range unless otherwise noted PARAMETER VIK Input clamp voltage |VOD| Differential output voltage MIN TYP (1) TEST CONDITIONS II = -18 mA Change in magnitude of differential output voltage VOC(SS) Steady-state common-mode output voltage VOC(SS) Change in steady-state common-mode output voltage VOC(PP) Peak-to-peak common-mode output voltage VCC RL = 54 , See Figure 4 2.5 Vtest = -7 V to 12 V, See Figure 2 2.2 See Figure 4 and Figure 2 See Figure 3 0.2 V 2.2 3.3 V -0.1 0.1 V 600 See Figure 3 500 HVD07 IOZ High-impedance output current See receiver input currents D Input current IOS Short-circuit output current -7 V VO 12 V C(diff) Differential output capacitance VID = 0.4 sin (4E6t) + 0.5 V, DE at 0 V (1) mV 900 II ICC V -0.2 HVD05 HVD06 UNIT V No Load |VOD| MAX -1.5 DE Supply current -100 0 0 100 -250 250 16 A mA pF RE at VCC, D and DE at VCC, No load Receiver disabled and driver enabled 9 15 mA RE at VCC, D at VCC DE at 0 V, No load Receiver disabled and driver disabled (standby) 1 5 A RE at 0 V, D and DE at VCC, No load Receiver enabled and driver enabled 9 15 mA All typical values are at 25C and with a 5-V supply. Copyright (c) 2002-2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN65HVD05 SN65HVD06 SN75HVD05 SN65HVD07 SN75HVD06 SN75HVD07 3 SN65HVD05, SN65HVD06 SN75HVD05, SN65HVD07 SN75HVD06, SN75HVD07 SLLS533E - MAY 2002 - REVISED AUGUST 2009 www.ti.com DRIVER SWITCHING CHARACTERISTICS over operating free-air temperature range unless otherwise noted MIN TYP (1) MAX HVD05 6.5 11 HVD06 27 40 HVD07 250 400 HVD05 6.5 11 PARAMETER tPLH Propagation delay time, low-to-high-level output tPHL Propagation delay time, high-to-low-level output TEST CONDITIONS HVD06 27 40 HVD07 250 400 3.6 6 HVD05 tr Differential output signal rise time HVD06 HVD07 HVD05 tf Differential output signal fall time tsk(p) tsk(pp) tPZH1 Pulse skew (|tPHL - tPLH|) (2) Part-to-part skew Propagation delay time, high-impedance-to-high-level output tPZL1 18 28 55 150 300 450 2.7 3.6 6 18 28 55 HVD07 150 300 450 HVD05 2 HVD06 2.5 HVD07 10 HVD05 3.5 HVD06 14 HVD07 100 HVD05 25 HVD06 45 HVD05 Propagation delay time, high-level-to-high-impedance output RL = 54 , CL = 50 pF, See Figure 4 HVD06 HVD07 tPHZ 2.7 RE at 0 V, RL = 110 , See Figure 5 60 250 HVD05 Propagation delay time, high-impedance-to-low-level HVD06 output HVD07 15 45 Propagation delay time, low-level-to-high-impedance HVD06 output HVD07 tPLZ ns ns ns ns ns ns 25 HVD07 RE at 0 V, RL = 110 , See Figure 6 ns 250 HVD06 HVD05 UNIT ns ns 200 14 90 ns 550 tPZH2 Propagation delay time, standby-to-high-level output RL = 110 , RE at 3 V, See Figure 5 6 s tPZL2 Propagation delay time, standby-to-low-level output RL = 110 , RE at 3 V, See Figure 6 6 s (1) (2) 4 All typical values are at 25C and with a 5-V supply. tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits. Submit Documentation Feedback Copyright (c) 2002-2009, Texas Instruments Incorporated Product Folder Link(s): SN65HVD05 SN65HVD06 SN75HVD05 SN65HVD07 SN75HVD06 SN75HVD07 SN65HVD05, SN65HVD06 SN75HVD05, SN65HVD07 SN75HVD06, SN75HVD07 SLLS533E - MAY 2002 - REVISED AUGUST 2009 www.ti.com RECEIVER ELECTRICAL CHARACTERISTICS over operating free-air temperature range unless otherwise noted PARAMETER TEST CONDITIONS MIN VIT+ Positive-going input threshold voltage IO = -8 mA VIT- Negative-going input threshold voltage IO = 8 mA Vhys Hysteresis voltage (VIT+ - VIT-) VIK Enable-input clamp voltage II = -18 mA VOH High-level output voltage VID = 200 mV, IOH = -8 mA, See Figure 7 VOL Low-level output voltage VID = -200 mV, IOL = 8 mA, See Figure 7 IOZ High-impedance-state output current VO = 0 or VCC RE at VCC V Other inputat 0 V VA or VB = 12 V, V 4 V Other inputat 0 V VA or VB = 12 V, VA or VB = -7 V VA or VB = -7 V, IIH IIL Low-level input current, RE VIL = 0.8 V C(diff) Differential input capacitance (1) VCC = 0 V VIH = 2 V VI = 0.4 sin (4E6t) + 0.5 V, DE at 0 V V 1 A 0.5 0.3 0.5 0.13 -0.4 0.15 VCC = 0 V 0.4 0.23 -0.4 VA or VB = 12 V High-level input current, RE Supply current VCC = 0 V VCC = 0 V mV -1.5 -1 VA or VB = -7 V VA or VB = -7 V, Bus input current HVD06 HVD07 UNIT -0.2 35 HVD05 ICC MAX -0.01 VA or VB = 12 V II TYP (1) 0.06 0.1 0.08 0.13 mA mA -0.1 0.05 -0.05 0.03 -60 26.4 A -60 27.4 A 16 pF RE at 0 V, D and DE at Receiver enabled and driver disabled 0 V, No load 5 10 mA RE at VCC, DE at 0 V, D at VCC, No load Receiver disabled and driver disabled (standby) 1 5 A RE at 0 V, D and DE at VCC, No load Receiver enabled and driver enabled 9 15 mA All typical values are at 25C and with a 5-V supply. Copyright (c) 2002-2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN65HVD05 SN65HVD06 SN75HVD05 SN65HVD07 SN75HVD06 SN75HVD07 5 SN65HVD05, SN65HVD06 SN75HVD05, SN65HVD07 SN75HVD06, SN75HVD07 SLLS533E - MAY 2002 - REVISED AUGUST 2009 www.ti.com RECEIVER SWITCHING CHARACTERISTICS over operating free-air temperature range unless otherwise noted PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT tPLH Propagation delay time, low-to-high-level output 1/2 UL HVD05 14.6 25 ns tPHL Propagation delay time, high-to-low-level output 1/2 UL HVD05 14.6 25 ns HVD06 55 70 HVD07 55 70 55 70 55 70 tPLH Propagation delay time, low-to-high-level output 1/8 UL tPHL Propagation delay time, high-to-low-level output 1/8 UL HVD06 VID = -1.5 V to 1.5 V, CL = 15 pF, See Figure 8 HVD07 HVD05 Pulse skew (|tPHL - tPLH|) tsk(p) tsk(pp) (2) Part-to-part skew tr Output signal rise time tf Output signal fall time tPZH1 Output enable time to high level tPZL1 Output enable time to low level tPHZ Output disable time from high level tPLZ Output disable time from low level tPZH2 Propagation delay time, standby-to-high-level output tPZL2 Propagation delay time, standby-to-low-level output (1) (2) ns 2 HVD06 4.5 HVD07 4.5 HVD05 6.5 HVD06 14 HVD07 14 CL = 15 pF, See Figure 8 ns 2 3 2 3 ns ns ns 10 CL = 15 pF, DE at 3 V, See Figure 9 10 15 ns 15 CL = 15 pF, DE at 0, See Figure 10 6 6 s All typical values are at 25C and with a 5-V supply. tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits. PARAMETER MEASUREMENT INFORMATION VCC DE II A IOA VOD 0 or 3 V B 54 1% IOB VI VOB VOA Figure 1. Driver VOD Test Circuit and Voltage and Current Definitions 375 1% VCC DE D A VOD 0 or 3 V 60 1% + -7 V < V(test) _ < 12 V B 375 1% Figure 2. Driver VOD With Common-Mode Loading Test Circuit 6 Submit Documentation Feedback Copyright (c) 2002-2009, Texas Instruments Incorporated Product Folder Link(s): SN65HVD05 SN65HVD06 SN75HVD05 SN65HVD07 SN75HVD06 SN75HVD07 SN65HVD05, SN65HVD06 SN75HVD05, SN65HVD07 SN75HVD06, SN75HVD07 SLLS533E - MAY 2002 - REVISED AUGUST 2009 www.ti.com VCC DE D Input 27 1% A A VA B VB VOC(PP) 27 1% B CL = 50 pF 20% VOC VOC(SS) VOC CL Includes Fixture and Instrumentation Capacitance Input: PRR = 500 kHz, 50% Duty Cycle,tr<6ns, tf<6ns, ZO = 50 Figure 3. Test Circuit and Definitions for the Driver Common-Mode Output Voltage 3V VCC DE D Input Generator VI VOD 1.5 V 0V CL Includes Fixture and Instrumentation Capacitance RL = 54 1% B 50 1.5 V VI CL = 50 pF 20% A tPLH tPHL 90% VOD 2V 90% 0V 10% -2 V 0V 10% tr tf Generator: PRR = 500 kHz, 50% Duty Cycle, tr <6 ns, tf <6 ns, Zo = 50 Figure 4. Driver Switching Test Circuit and Voltage Waveforms A 3V D 3V S1 VO VI 1.5 V 1.5 V B DE Input Generator VI RL = 110 1% CL = 50 pF 20% 50 CL Includes Fixture and Instrumentation Capacitance 0V 0.5 V tPZH(1 & 2) VOH VO 2.3 V 0V tPHZ Generator: PRR = 100 kHz, 50% Duty Cycle, tr <6 ns, tf <6 ns, Zo = 50 Figure 5. Driver High-Level Enable and Disable Time Test Circuit and Voltage Waveforms VCC A 3V D VI 3V VI S1 1.5 V 1.5 V VO DE Input Generator RL = 110 1% 50 B 0V tPZL(1 & 2) tPLZ CL = 50 pF 20% CL Includes Fixture and Instrumentation Capacitance VCC 0.5 V VO 2.3 V VOL Generator: PRR = 100 kHz, 50% Duty Cycle, tr <6 ns, tf <6 ns, Zo = 50 Figure 6. Driver Low-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms Copyright (c) 2002-2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN65HVD05 SN65HVD06 SN75HVD05 SN65HVD07 SN75HVD06 SN75HVD07 7 SN65HVD05, SN65HVD06 SN75HVD05, SN65HVD07 SN75HVD06, SN75HVD07 SLLS533E - MAY 2002 - REVISED AUGUST 2009 www.ti.com IA VA VIC VA + VB 2 VB A IO R VID B VO IB Figure 7. Receiver Voltage and Current Definitions A Input Generator R VI 50 1.5 V 0V B 3V VO CL = 15 pF 20% RE CL Includes Fixture and Instrumentation Capacitance Generator: PRR = 100 kHz, 50% Duty Cycle, tr <6 ns, tf <6 ns, Zo = 50 1.5 V VI 1.5 V 0V tPLH VO tPHL 90% 90% 1.5 V 10% tr VOH 1.5 V 10% V OL tf Figure 8. Receiver Switching Test Circuit and Voltage Waveforms 8 Submit Documentation Feedback Copyright (c) 2002-2009, Texas Instruments Incorporated Product Folder Link(s): SN65HVD05 SN65HVD06 SN75HVD05 SN65HVD07 SN75HVD06 SN75HVD07 SN65HVD05, SN65HVD06 SN75HVD05, SN65HVD07 SN75HVD06, SN75HVD07 SLLS533E - MAY 2002 - REVISED AUGUST 2009 www.ti.com A D 0 V or 3 V Generator: PRR = 100 kHz, 50% Duty Cycle, tr <6 ns, tf <6 ns, Zo = 50 3V B DE RE Input Generator VI 50 A VCC VO S1 R 1 k 1% B CL = 15 pF 20% CL Includes Fixture and Instrumentation Capacitance 3V VI 1.5 V 1.5 V 0V tPZH(1) tPHZ VOH -0.5 V VOH D at 3 V S1 to B 1.5 V VO 0V tPZL(1) tPLZ VCC VO 1.5 V D at 0 V S1 to A VOL +0.5 V VOL Figure 9. Receiver Enable and Disable Time Test Circuit and Voltage Waveforms With Drivers Enabled Copyright (c) 2002-2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN65HVD05 SN65HVD06 SN75HVD05 SN65HVD07 SN75HVD06 SN75HVD07 9 SN65HVD05, SN65HVD06 SN75HVD05, SN65HVD07 SN75HVD06, SN75HVD07 SLLS533E - MAY 2002 - REVISED AUGUST 2009 www.ti.com Generator: PRR = 100 kHz, 50% Duty Cycle, tr <6 ns, tf <6 ns, Zo = 50 0V DE RE Input Generator VI 50 A A VCC VO S1 R B 1 k 1% B 0 V or 1.5 V 1.5 V or 0 V CL = 15 pF 20% CL Includes Fixture and Instrumentation Capacitance 3V 1.5 V VI 0V tPZH(2) A at 1.5 V B at 0 V S1 to B VOH 1.5 V VO GND tPZL(2) A at 0 V B at 1.5 V S1 to A VCC 1.5 V VO VOL Figure 10. Receiver Enable Time From Standby (Driver Disabled) 0 V or 3 V A RE R Pulse Generator, 15 s Duration, 1% Duty Cycle tr, tf 100 ns 100 1% B D + _ DE 3 V or 0 V NOTE: This test is conducted to test survivability only. Data stability at the R output is not specified. Figure 11. Test Circuit, Transient Over Voltage Test 10 Submit Documentation Feedback Copyright (c) 2002-2009, Texas Instruments Incorporated Product Folder Link(s): SN65HVD05 SN65HVD06 SN75HVD05 SN65HVD07 SN75HVD06 SN75HVD07 SN65HVD05, SN65HVD06 SN75HVD05, SN65HVD07 SN75HVD06, SN75HVD07 SLLS533E - MAY 2002 - REVISED AUGUST 2009 www.ti.com FUNCTION TABLES Table 1. DRIVER INPUT ENABLE D DE OUTPUTS A B H L X Open X H H L H Open H L Z H Z L H Z L Z Table 2. RECEIVER (1) DIFFERENTIAL INPUTS ENABLE OUTPUT VID = VA - VB RE R L L L H L L L Open L ? H Z H H H Z VID -0.2 V -0.2 V < VID < -0.01 V -0.01 V VID X Open Circuit Short Circuit IDLE Bus X (1) H = high level; L = low level; Z = high impedance; X = irrelevant; ? = indeterminate Receiver Failsafe The differential receiver is "failsafe" to invalid bus states caused by: * open bus conditions such as a disconnected connector, * shorted bus conditions such as cable damage shorting the twisted-pair together, or * idle bus conditions that occur when no driver on the bus is actively driving In any of these cases, the differential receiver outputs a failsafe logic High state, so that the output of the receiver is not indeterminate. Receiver failsafe is accomplished by offsetting the receiver thresholds so that the "input indeterminate" range does not include zero volts differential. To comply with the RS-422 and RS-485 standards, the receiver output must output a High when the differential input VID is more positive than +200 mV, and must output a Low when the VID is more negative than -200 mV. The receiver parameters which determine the failsafe performance are VIT+ and VIT- and VHYS. As seen in the Receiver Electrical Characteristics table, differential signals more negative than -200 mV will always cause a Low receiver output. Similarly, differential signals more positive than +200 mV will always cause a High receiver output. When the differential input signal is close to zero, it will still be above the VIT+ threshold, and the receiver output is High. Only when the differential input is more negative than VIT- will the receiver output transition to a Low state. So, the noise immunity of the receiver inputs during a bus fault condition includes the receiver hysteresis value VHYS (the separation between VIT+ and VIT- ) as well as the value of VIT+. Copyright (c) 2002-2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN65HVD05 SN65HVD06 SN75HVD05 SN65HVD07 SN75HVD06 SN75HVD07 11 SN65HVD05, SN65HVD06 SN75HVD05, SN65HVD07 SN75HVD06, SN75HVD07 SLLS533E - MAY 2002 - REVISED AUGUST 2009 www.ti.com EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS D and RE Inputs DE Input VCC VCC 100 k 1 k 1 k Input Input 100 k 9V 9V A Input B Input VCC VCC 16 V 100 k 16 V R3 R1 R3 Input Input 16 V R2 R1 100 k 16 V A and B Outputs R2 R Output VCC VCC 16 V 5 Output Output 9V 16 V SN65HVD05 SN65HVD06 SN65HVD07 12 Submit Documentation Feedback R1/R2 9 k 36 k 36 k R3 45 k 180 k 180 k Copyright (c) 2002-2009, Texas Instruments Incorporated Product Folder Link(s): SN65HVD05 SN65HVD06 SN75HVD05 SN65HVD07 SN75HVD06 SN75HVD07 SN65HVD05, SN65HVD06 SN75HVD05, SN65HVD07 SN75HVD06, SN75HVD07 SLLS533E - MAY 2002 - REVISED AUGUST 2009 www.ti.com HVD06 MAXIMUM RECOMMENDED STILL-AIR OPERATING TEMPERATURE vs SIGNALING RATE (D-PACKAGE) IIIIIIIIIIII IIIIIIIIIIII IIIIIIIIIIII IIIIIIIIIIII IIIIIIIIIIII IIIIIIIIIIII IIIIIIIIIIII IIIIIIIIIIII IIIIIIIIIIII IIIIIIIIIIIII IIIIIIIIIIIII IIIIIIIIIIIII IIIIIIIIIIIII IIIIIIIIIIIII IIIIIIIIIIIII IIIIIIIIIIIII IIIIIIIIIIIII IIIIIIIIIIIII Maximum Recommended Still-Air Operating Temperature - T A ( C) Maximum Recommended Still-Air Operating Temperature - T A ( C) TYPICAL CHARACTERISTICS HVD05 MAXIMUM RECOMMENDED STILL-AIR OPERATING TEMPERATURE vs SIGNALING RATE (D-PACKAGE) 85 High K Board 25 Low K Board 1 10 85 High K Board 25 Low K Board 1 40 10 Signaling Rate - Mbps 120 Figure 13. HVD05 RMS SUPPLY CURRENT vs SIGNALILNG RATE HVD06 RMS SUPPLY CURRENT vs SIGNALING RATE 120 RL = 54 CL = 50 pF VCC = 5 V RL = 54 CL = 50 pF VCC = 5 V TA = 25C RE at VCC DE at VCC I CC - RMS Supply Current - mA I CC - RMS Supply Current - mA Figure 12. TA = 25C RE at VCC DE at VCC 110 Signaling Rate - Mbps 100 90 80 70 60 50 100 80 60 40 40 30 0 5 10 15 20 25 30 35 40 0 2.5 5 Signaling Rate - Mbps Signaling Rate - Mbps Figure 14. Figure 15. Copyright (c) 2002-2009, Texas Instruments Incorporated 7.5 Submit Documentation Feedback Product Folder Link(s): SN65HVD05 SN65HVD06 SN75HVD05 SN65HVD07 SN75HVD06 SN75HVD07 10 13 SN65HVD05, SN65HVD06 SN75HVD05, SN65HVD07 SN75HVD06, SN75HVD07 SLLS533E - MAY 2002 - REVISED AUGUST 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) HVD07 RMS SUPPLY CURRENT vs SIGNALING RATE 110 90 80 70 60 100 HVD05 50 0 HVD06 HVD07 -50 -150 40 100 400 700 Signaling Rate - kbps -200 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 12 VI - Bus Input Voltage - V 1000 Figure 16. Figure 17. DRIVER HIGH-LEVEL OUTPUT CURRENT vs HIGH-LEVEL OUTPUT VOLTAGE DRIVER LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE 160 0 TA = 25C DE at VCC D at VCC VCC = 5 V -20 -40 I OL- Driver Low-Level Output Current - mA I OH - Driver High-Level Output Current - mA 150 -100 50 -60 -80 -100 -120 -140 -160 0 0.5 1 1.5 2 2.5 3 3.5 4 VO - High-Level Output Voltage - V Figure 18. 14 TA = 25C DE at 0 V VCC = 5 V 200 I I - Bus Input Current - A I CC - RMS Supply Current - mA 250 RL = 54 CL = 50 pF VCC = 5 V TA = 25C RE at VCC DE at VCC 100 BUS INPUT CURRENT vs BUS INPUT VOLTAGE Submit Documentation Feedback 4.5 5 TA = 25C DE at VCC D at 0 V VCC = 5 V 140 120 100 80 60 40 20 0 0 0.5 1 1.5 2 2.5 3 3.5 4 VO - Low-Level Output Voltage - V 4.5 5 Figure 19. Copyright (c) 2002-2009, Texas Instruments Incorporated Product Folder Link(s): SN65HVD05 SN65HVD06 SN75HVD05 SN65HVD07 SN75HVD06 SN75HVD07 SN65HVD05, SN65HVD06 SN75HVD05, SN65HVD07 SN75HVD06, SN75HVD07 SLLS533E - MAY 2002 - REVISED AUGUST 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) DIFFERENTIAL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE DRIVER OUTPUT CURRENT vs SUPPLY VOLTAGE 70 4 3.6 TA = 25C DE at VCC D at VCC RL = 54 60 I O - Driver Output Current - mA VOD - Differential Output Voltage - V 3.8 DE at VCC D at VCC VCC = 5 V RL = 54 3.4 3.2 3 2.8 2.6 2.4 50 40 30 20 10 2.2 2 -40 0 -15 10 35 60 TA - Free-Air Temperature - C 85 0.6 1.2 1.8 2.4 3 3.6 4.2 VCC - Supply Voltage - V 4.8 Figure 20. Figure 21. DIFFERENTIAL OUTPUT VOLTAGE vs DIFFERENTIAL OUTPUT CURRENT ENABLE TIME vs COMMON-MODE VOLTAGE (SEE Figure 24) 5.4 600 5 4 60 Load Line 3.5 TA = 25C DE at VCC D at VCC VCC = 5 V 500 30 Load Line 3 HVD07 HVD5 Enable Time - ns 4.5 VO - Differential Output Voltage - V 0 2.5 2 1.5 1 400 300 HVD06 200 100 0.5 0 0 0 20 40 60 80 100 IOD - Differential Output Current - mA Figure 22. Copyright (c) 2002-2009, Texas Instruments Incorporated 120 -7 -2 3 8 13 V(TEST) - Common-Mode Voltage - V Figure 23. Submit Documentation Feedback Product Folder Link(s): SN65HVD05 SN65HVD06 SN75HVD05 SN65HVD07 SN75HVD06 SN75HVD07 15 SN65HVD05, SN65HVD06 SN75HVD05, SN65HVD07 SN75HVD06, SN75HVD07 SLLS533E - MAY 2002 - REVISED AUGUST 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) 375 W 1% Y D 0 or 3 V -7 V < V(TEST) < 12 V VOD 60 W 1% Z DE 375 W 1% Input Generator V 50 W 50% tpZH(diff) VOD (high) 1.5 V 0V tpZL(diff) -1.5 V VOD (low) Figure 24. Driver Enable Time From DE to VOD The time tpZL(x) is the measure from DE to VOD(x). VOD is valid when it is greater than 1.5 V. 16 Submit Documentation Feedback Copyright (c) 2002-2009, Texas Instruments Incorporated Product Folder Link(s): SN65HVD05 SN65HVD06 SN75HVD05 SN65HVD07 SN75HVD06 SN75HVD07 SN65HVD05, SN65HVD06 SN75HVD05, SN65HVD07 SN75HVD06, SN75HVD07 SLLS533E - MAY 2002 - REVISED AUGUST 2009 www.ti.com APPLICATION INFORMATION RT RT Device HVD05 HVD06 HVD07 Number of Devices on Bus 64 256 256 NOTE: The line should be terminated at both ends with its characteristic impedance (RT = ZO). Stub lengths off the main line should be kept as short as possible. Figure 25. Typical Application Circuit REVISION HISTORY Changes from Revision D (July 2006) to Revision E Page * Added IDLE Bus to the Receivers Function Table ............................................................................................................. 11 * Added the Receiver Failsafe paragraph. ............................................................................................................................ 11 Copyright (c) 2002-2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN65HVD05 SN65HVD06 SN75HVD05 SN65HVD07 SN75HVD06 SN75HVD07 17 PACKAGE OPTION ADDENDUM www.ti.com 27-Aug-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN65HVD05D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65HVD05DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65HVD05DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65HVD05DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65HVD05P ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN65HVD05PE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN65HVD06D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65HVD06DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65HVD06DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65HVD06DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65HVD06P ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN65HVD06PE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN65HVD07D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65HVD07DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65HVD07DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65HVD07DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN65HVD07P ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN65HVD07PE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN75HVD05D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75HVD05DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75HVD05P ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN75HVD05PE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN75HVD06D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75HVD06DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75HVD06DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 27-Aug-2009 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN75HVD06DRG4 ACTIVE SOIC D 8 SN75HVD06P ACTIVE PDIP P 8 50 SN75HVD06PE4 ACTIVE PDIP P 8 SN75HVD07D ACTIVE SOIC D SN75HVD07DG4 ACTIVE SOIC SN75HVD07DR ACTIVE SN75HVD07DRG4 2500 Green (RoHS & no Sb/Br) Lead/Ball Finish MSL Peak Temp (3) CU NIPDAU Level-1-260C-UNLIM Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75HVD07P ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN75HVD07PE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 13-Aug-2009 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN65HVD05DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN65HVD06DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN65HVD07DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN75HVD06DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN75HVD07DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 13-Aug-2009 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN65HVD05DR SOIC D 8 2500 340.5 338.1 20.6 SN65HVD06DR SOIC D 8 2500 340.5 338.1 20.6 SN65HVD07DR SOIC D 8 2500 340.5 338.1 20.6 SN75HVD06DR SOIC D 8 2500 340.5 338.1 20.6 SN75HVD07DR SOIC D 8 2500 340.5 338.1 20.6 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as "components") are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI's terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. TI assumes no liability for applications assistance or the design of Buyers' products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers' products and applications, Buyers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications. In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI's goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms. No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use. Only those TI components which TI has specifically designated as military grade or "enhanced plastic" are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI has specifically designated certain components which meet ISO/TS16949 requirements, mainly for automotive use. Components which have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such components to meet such requirements. Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP(R) Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright (c) 2012, Texas Instruments Incorporated