1. General description
The HEF4794B is an 8-stage serial shift register. It has a storage latch associated with
each stage for strobing data from the serial input (D) to the parallel LED driver outputs
(QP0 to QP7). Data is shifted on the positive-going clock (CP) transitions. The data in
each shift register stage is transferred to the storage register when the strobe input (STR)
is HIGH. Data in the storage register appears at the outputs whenever the output enable
input (OE) signal is HIGH.
Two serial outputs (QS1 and QS2) are available for cascading a number of HEF4794B
devices. Serial dat a is available at QS1 on positive-goi ng clock edges to allow high-speed
operation in cascaded systems with a fast clock rise time. The same serial data is
available at QS2 on the next negative going clock edge. This is used for cascading
HEF4794B de vices when the clock has a slow rise time.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input. It is
also suitab le for use over both the industrial (−40 °C to +85 °C) and automotive (−40 °C to
+125 °C) temperature ranges.
2. Features
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Operates across the automotive temperature range −40 °C to +125 °C
Complies with JEDEC standard JESD 13-B
3. Applications
Automotive and industrial
4. Ordering information
HEF4794B
8-stage shift-and-store register LED driver
Rev. 04 — 22 December 2009 Product data sheet
Table 1. Ordering information
All types operate from
−
40
°
C to +125
°
C.
Type number Package
Name Description Version
HEF4794BP DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
HEF4794BT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
HEF4794B_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 22 December 2009 2 of 17
NXP Semiconductors HEF4794B
8-stage shift-and-store register LED driver
5. Functional diagram
Fig 1. Logic symbol Fig 2. Functional di agram
15
2
OE
D
CP STR
31
QP0
QP1
QP2
QP3
QP4
QP5
QP6
QP7
QS1
QS2
9
10
4
5
6
7
14
13
12
11
001aaf11
1
001aag79
8
8-STAGE SHIFT
REGISTER
8-BIT STORAGE
REGISTER
OPEN-DRAIN
OUTPUTS
4
QP0
5
QP1
6
QP2
7
QP3
14
QP4
13
QP5
12
QP6
11
QP7
10 QS2
9QS1
D2
CP 3
STR 1
OE 15
Fig 3. Logic diag ra m
001aag799
DD
CP
CP
Q
FF 0
D
CP
Q
LATCH 0
D
CP
Q
FF 7
D
CP
Q
LATCH 7
D
CP
Q
STAGES 1 TO 6STAGE 0 STAGE 7
QP2
QP0
D QS2
QS1
CP
Q
LATCH
QP1
QP4
QP3
QP6
QP5 QP7
STR
OE
HEF4794B_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 22 December 2009 3 of 17
NXP Semiconductors HEF4794B
8-stage shift-and-store register LED driver
6. Pinning information
6.1 Pinning
Fig 4. Pin configuratio n
HEF4794B
STR V
DD
DOE
CP QP4
QP0 QP5
QP1 QP6
QP2 QP7
QP3 QS2
V
SS
QS1
001aag800
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
HEF4794B_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 22 December 2009 4 of 17
NXP Semiconductors HEF4794B
8-stage shift-and-store register LED driver
6.2 Pin description
7. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state;
↑= LOW-to-HIGH clock transition; ↓= HIGH-to-LOW clock transition.
[2] Q6S = the data in register stage 6 before the LOW to HIGH clock transition.
[3] Q7S = the data in register stage 7 before the HIGH to LOW clock transition.
Table 2. Pin description
Symbol Pin Description
D 2 serial input
QP0 to QP7 4, 5, 6, 7, 14, 13, 12, 11 parallel output
QS1 9 serial output
QS2 10 serial output
CP 3 clock input
STR 1 strobe input
OE 15 output enable input
VDD 16 supply voltage
VSS 8 ground (0 V)
Table 3. Function table[1]
Input Parallel output Serial output
CP OE STR DQP0 QPn QS1[2] QS2[3]
↑L X X Z Z Q6S no change
↓LXXZZn.c.Q7S
↑H L X no change no change Q6S no change
↑HHLZQPn−1 Q6S no change
↑HHHLQPn−1 Q6S no change
↓H H H no change no change no change Q7S
HEF4794B_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 22 December 2009 5 of 17
NXP Semiconductors HEF4794B
8-stage shift-and-store register LED driver
8. Limiting values
[1] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 °C.
[2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C.
Fig 5. Timing diag ram
001aag80
1
clock input
data input
strobe input
output enable
input
internal Q0S
(FF0)
QP0 output
internal Q6S
(FF6)
QP6 output
serial QS1
output
serial QS2
output
Z-state
Z-state
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDD supply voltage −0.5 +18 V
IIK input clamping current VI<−0.5 V or VI>V
DD + 0.5 V - ±10 mA
VIinput voltage −0.5 VDD + 0.5 V
IOK output clamping current QSn outputs;
VO<−0.5 V or VO>V
DD + 0.5 V -±10 mA
QPn outputs; VO<−0.5 V - 40 mA
IIinput current - ±10 mA
IOoutput current QSn outputs - ±10 mA
QPn outputs - 40 mA
Tstg storage temperature −65 +150 °C
Tamb ambient temperature −40 +125 °C
Ptot total power dissipation Tamb = −40 °C to +125 °C
DIP16 package [1] -750mW
SO16 package [2] -500mW
P power dissipation - 100 mW
HEF4794B_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 22 December 2009 6 of 17
NXP Semiconductors HEF4794B
8-stage shift-and-store register LED driver
9. Recommended operating conditions
10. Static characteristics
Table 5. Recommended operating con ditions
Symbol Parameter Conditions Min Max Unit
VDD supply voltage 3 15 V
VIinput voltage 0 VDD V
Tamb ambient temperature in free air −40 +125 °C
Δt/ΔV input transition rise and fall rate VDD = 5 V - 3.7 5 μs/V
VDD = 10 V - 0.5 μs/V
VDD = 15 V - 0.08 μs/V
Table 6. Static characteristics
VSS = 0 V; VI = VSS or VDD; unless otherwise spec ified.
Symbol Parameter Conditions VDD Tamb = −40 °C Tamb = 25 °C Tamb = 85 °C Tamb = 125 °CUnit
Min Max Min Max Min Max Min Max
VIH HIGH-level
input voltage |IO| < 1 μA 5 V 3.5 - 3.5 - 3.5 - 3.5 - V
10 V 7.0 - 7.0 - 7.0 - 7.0 - V
15 V 11.0 - 11.0 - 11.0 - 11.0 - V
VIL LOW-level
input voltage |IO| < 1 μA 5 V - 1.5 - 1.5 - 1.5 - 1.5 V
10 V - 3.0 - 3.0 - 3.0 - 3.0 V
15 V - 4.0 - 4.0 - 4.0 - 4.0 V
VOH HIGH-level
output voltage QSn outputs;
|IO| < 1 μA5 V 4.95 - 4.95 - 4.95 - 4.95 - V
10 V 9.95 - 9.95 - 9.95 - 9.95 - V
15 V 14.95 - 14.95 - 14.95 - 14.95 - V
VOL LOW-level
output voltage QSn outputs;
|IO| < 1 μA5 V - 0.0 5 - 0.05 - 0.05 - 0.05 V
10 V - 0.05 - 0.05 - 0.05 - 0.05 V
15 V - 0.05 - 0.05 - 0.05 - 0.05 V
QP outputs;
|IO|< 20 mA 5 V - 0.75 - 0.75 - 1.5 - 1.5 V
10 V - 0.75 - 0.75 - 1.5 - 1.5 V
15 V - 0.75 - 0.75 - 1.5 - 1.5 V
IOH HIGH-level
output current QSn outputs
VO = 2.5 V 5 V −1.7 - −1.4 - −1.1 - −1.1 - mA
VO= 4.6 V 5 V −0.64 - −0.5 - −0.36 - −0.36 - mA
VO = 9.5 V 10 V −1.6 - −1.3 - −0.9 - −0.9 - mA
VO = 13.5 V 15 V −4.2 - −3.4 - −2.4 - −2.4 - mA
IOL LOW-level
output current QSn outputs
VO = 0.4 V 5 V 0.64 - 0.5 - 0.36 - 0.36 - mA
VO = 0.5 V 10 V 1.6 - 1.3 - 0 .9 - 0.9 - mA
VO = 1.5 V 15 V 4.2 - 3.4 - 2 .4 - 2.4 - mA
IIinput leakage
current 15 V - ±0.1 - ±0.1 - ±1.0 - ±1.0 μA
HEF4794B_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 22 December 2009 7 of 17
NXP Semiconductors HEF4794B
8-stage shift-and-store register LED driver
11. Dynamic characteristics
IOZ OFF-state
output current QPn output
is HIGH;
VO=15V
5 V - 2 - 2 - 15 - 15 μA
10 V - 2 - 2 - 15 - 15 μA
15 V - 2 - 2 - 15 - 15 μA
IDD supply current IO = 0 A 5 V - 5 - 5 - 150 - 150 μA
10 V - 10 - 10 - 300 - 300 μA
15 V - 20 - 20 - 600 - 600 μA
CIinput
capacitance -----7.5----
Table 6. Static characteristics …continued
VSS = 0 V; VI = VSS or VDD; unless otherwise spec ified.
Symbol Parameter Conditions VDD Tamb = −40 °C Tamb = 25 °C Tamb = 85 °C Tamb = 125 °CUnit
Min Max Min Max Min Max Min Max
Table 7. Dynamic characteristics
VSS = 0 V; Tamb = 25
°
C unless otherwise specified. For test circuit, see Figure 10.
Symbol Parameter Conditions VDD Extrapolation formula Min Typ Max Unit
tPHL HIGH to LOW
propagation delay CP to QS1;
see Figure 6 5 V [1] 132 ns + (0.55 ns/pF) CL-160320ns
10 V 53 ns + (0.23 ns/pF)CL- 65 130 ns
15 V 37 ns + (0.16 ns/pF)CL-4590ns
CP to QS2;
see Figure 6 5 V 92 ns + (0.55 ns/pF)CL-120240ns
10 V 39 ns + (0.23 ns/pF)CL- 50 100 ns
15 V 32 ns + (0.16 ns/pF)CL-4080ns
tPLH LOW to HIGH
propagation delay CP to QS1;
see Figure 6 5 V [1] 102 ns + (0.55 ns/pF) CL-130260ns
10 V 44 ns + (0.23 ns/pF)CL-55110ns
15 V 32 ns + (0.16 ns/pF)CL-4080ns
CP to QS2;
see Figure 6 5 V 102 ns + (0.55 ns/pF)CL-130260ns
10 V 49 ns + (0.23 ns/pF)CL- 60 120 ns
15 V 37 ns + (0.16 ns/pF)CL-4590ns
tPZL OFF-state to LOW
propagation delay CP to QPn;
see Figure 6 5 V - 240 480 ns
10 V - 80 160 ns
15 V - 55 110 ns
STR to QPn;
see Figure 7 5 V - 140 280 ns
10 V - 70 140 ns
15 V - 55 110 ns
tPLZ LOW to OFF-state
propagation delay CP to QPn;
see Figure 6 5 V - 170 340 ns
10 V - 75 150 ns
15 V - 60 120 ns
STR to QPn;
see Figure 7 5 V - 100 200 ns
10 V - 40 100 ns
15 V - 35 70 ns
HEF4794B_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 22 December 2009 8 of 17
NXP Semiconductors HEF4794B
8-stage shift-and-store register LED driver
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
[2] ten is the same as tPZL and tdis is the same as tPLZ
[3] tt is the same as tTLH and tTHL
ten enable time OE to QPn;
see Figure 8 5 V [2] -100200ns
10 V - 55 110 ns
15 V - 50 100 ns
tdis disable time OE to QPn;
see Figure 8 5 V [2] - 80 160 ns
10 V - 40 80 ns
15 V - 30 60 ns
tttransition time QS1, QS2;
see Figure 6 5 V [1]
[3] 35 ns + (1.00 ns/pF)CL- 85 170 ns
10 V 19 ns + (0.42 ns/pF)CL-4080ns
15 V 16 ns + (0.28 ns/pF)CL-3060ns
tWpulse width CP; LOW and
HIGH;
see Figure 6
5 V 60 30 - ns
10 V 30 15 - ns
15 V 24 12 - ns
STR; HIGH;
see Figure 7 5 V 80 40 - ns
10 V 60 30 - ns
15 V 24 12 - ns
tsu set-up time D to CP;
see Figure 9 5 V 60 30 - ns
10 V 20 10 - ns
15 V 15 5 - ns
thhold time D to CP;
see Figure 9 5 V +5 −15 - ns
10 V 20 5 - ns
15 V 20 5 - ns
fclk(max) maximum clock
frequency CP; see Figure 6 5 V 5 10 - MHz
10 V 11 22 - MHz
15 V 14 28 - MHz
Table 7. Dynamic characteristics …continued
VSS = 0 V; Tamb = 25
°
C unless otherwise specified. For test circuit, see Figure 10.
Symbol Parameter Conditions VDD Extrapolation formula Min Typ Max Unit
Table 8. Dynamic power dissipation
PD can be calculated from the formulas shown. VSS = 0 V; tr = tf
≤
20 ns; Tamb = 25
°
C.
Symbol Parameter VDD Typical formula Where
PDdynamic power dissipation 5 V PD = 1200 × fi + Σ(fo × CL) × VDD2 μWf
i = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
Σ(fo × CL) = sum of the outputs;
VDD = supply voltage in V.
10 V PD = 5550 × fi + Σ(fo × CL) × VDD2μW
15 V PD = 15000 × fi + Σ(fo × CL) × VDD2 μW
HEF4794B_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 22 December 2009 9 of 17
NXP Semiconductors HEF4794B
8-stage shift-and-store register LED driver
12. Waveforms
Parallel output measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 6. Prop a ga tio n de la y c loc k (CP) to outpu t (QPn, QS1, QS2), clock puls e width and maximum clock
frequency
001aag222
tPLH
1/fclk(max)
VM
VM
VX
VI
VSS
VDD
VOL
VOL
VOL
tW
tPLZ
tPLH
tPZL
VY
CP input
QS1 output
QS2 output
tTHL
tTLH
90 %
10 %
VM
90 %
10 %
tPHL
tTHL
tTLH
QPn output
tW
tPHL
VOH
VOH
Table 9. Measurement points
Supply Input Output
VDD VMVMVXVY
5 V to 15 V 0.5VDD 0.5VDD 0.1VO0.9VO
Measurement points are given in Table 9.
VOL is the typical output voltage level that occurs with the output load.
Fig 7. Strobe (STR) to output (QPn) propagation delays and the strobe pulse width
001aag80
2
CP input
tW
tPLZ tPZL
VM
VM
VX
VY
VI
VSS
VI
VSS
STR input
VDD
VOL
QPn output
HEF4794B_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 22 December 2009 10 of 17
NXP Semiconductors HEF4794B
8-stage shift-and-store register LED driver
Measurement points are given in Table 9.
VOL is the typical output voltage level that occurs with the output load.
Fig 8. Enable and disable times for input OE
001aag80
3
OE input
output
LOW to OFF-state
OFF-state to LOW
VI
VM
VX
tPZL
tPLZ
outputs
disabled
outputs
enabled
outputs
enabled
VY
VSS
VDD
VOL
Measurement points are given in Table 9.
The shaded areas indicate when the input is permitted to change for predictable output performance.
VOL is the typical output voltage level that occurs with the output load.
Fig 9. Set-up and hold times for the data input (D)
VI
VM
tsu
th
tsu
th
VM
VSS
VI
VSS
VDD
CP input
D input
QPn output
001aag80
5
VOL
HEF4794B_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 22 December 2009 11 of 17
NXP Semiconductors HEF4794B
8-stage shift-and-store register LED driver
Test data is given in Table 10.
Definitions for test circuit:
DUT - Device Under Test.
RL = Load resistance.
CL = load capacitance.
RT = Termination resistance should be equal to output impedance of Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 10. Test circuit for measuring switching times
001aag80
4
DUT
V
EXT
RTCL
RL
t
r
10 %
90 %
t
f
V
I
V
I
V
O
V
DD
V
SS
input pulse
G
Table 10. Test data
Supply Input VEXT Load
VDD VItr, tftPLZ, tPZL tPLH, tPHL CLRL
5 V to 15 V VDD ≤ 20 ns VDD open 50 pF 1 kΩ
HEF4794B_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 22 December 2009 12 of 17
NXP Semiconductors HEF4794B
8-stage shift-and-store register LED driver
13. Application information
Application example: serial-to-parallel data converting LED drivers.
Fig 11. Serial-to-parallel converting LED drivers
001aag806
QP0
DS2
PWM
dimmer input
OE STR
data
from remote
control panel
clock
CP
CONTROL
AND
SYNC
CIRCUITRY
QP7
HEF4794B
QP0
DS2
VCC
VDD
OE STR CP
QP7
HEF4794B
HEF4794B_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 22 December 2009 13 of 17
NXP Semiconductors HEF4794B
8-stage shift-and-store register LED driver
14. Package outline
Fig 12. Package outline SOT38-4 (DIP16)
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT38-4 95-01-14
03-02-13
MH
c
(e )
1
ME
A
L
seating plane
A1
wM
b1
b2
e
D
A2
Z
16
1
9
8
E
pin 1 index
b
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
UNIT A
max. 12 b1(1) (1) (1)
b2cD E e M Z
H
L
mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
min. A
max. bmax.
w
ME
e1
1.73
1.30
0.53
0.38
0.36
0.23
19.50
18.55
6.48
6.20
3.60
3.05 0.2542.54 7.62 8.25
7.80
10.0
8.3 0.764.2 0.51 3.2
inches 0.068
0.051
0.021
0.015
0.014
0.009
1.25
0.85
0.049
0.033
0.77
0.73
0.26
0.24
0.14
0.12 0.010.1 0.3 0.32
0.31
0.39
0.33 0.030.17 0.02 0.13
D
IP16: plastic dual in-line package; 16 leads (300 mil) SOT38
-4
HEF4794B_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 22 December 2009 14 of 17
NXP Semiconductors HEF4794B
8-stage shift-and-store register LED driver
Fig 13. Package outline SOT109-1 (SO16)
X
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
e
c
L
vMA
(A )
3
A
8
9
1
16
y
pin 1 index
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
1.75 0.25
0.10
1.45
1.25 0.25 0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8 1.27 6.2
5.8
0.7
0.6
0.7
0.3 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.0
0.4
SOT109-1 99-12-27
03-02-19
076E07 MS-012
0.069 0.010
0.004
0.057
0.049 0.01 0.019
0.014
0.0100
0.0075
0.39
0.38
0.16
0.15 0.05
1.05
0.041
0.244
0.228
0.028
0.020
0.028
0.012
0.01
0.25
0.01 0.004
0.039
0.016
0 2.5 5 mm
scale
S
O16: plastic small outline package; 16 leads; body width 3.9 mm SOT109
-1
HEF4794B_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 22 December 2009 15 of 17
NXP Semiconductors HEF4794B
8-stage shift-and-store register LED driver
15. Revision history
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
HEF4794B_4 20091222 Product data sheet - HEF4794B_3
Modifications: •Section 2 “Features” ESD data removed.
•Section 8 “Limiting values” IIK values updated.
•Section 8 “Limiting values” IOK values updated.
•Section 9 “Recommended operating conditions” Δt/ΔV values updated.
•Abbreviations section removed.
HEF4794B_3 20080812 Product data sheet - HEF4794B_2
HEF4794B_2 19990630 Product specification - HEF4794B_1
HEF4794B_1 19940701 Product specification - -
HEF4794B_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 22 December 2009 16 of 17
NXP Semiconductors HEF4794B
8-stage shift-and-store register LED driver
16. Legal information
16.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warrant ies as to t he accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short dat a sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre va il.
16.3 Disclaimers
General — In formation in this document is believed to be accurate and
reliable. However, NXP Semiconductors d oes not give any represent ations or
warranties, expressed or impli ed, as to the accuracy or completeness of such
information and shall have no liability for th e co nsequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environme ntal
damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for il lustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ra tings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other co nditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may af fect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between inf ormation in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Not hing in this document may be interpret ed or
construed as an of fer t o sell product s that is open for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
16.4 Trademarks
Notice: All refe renced brands, produc t names, service names and trademarks
are the property of their respective ow ners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors HEF4794B
8-stage shift-and-store register LED driver
© NXP B.V. 2009. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 22 December 2009
Document identifier: HEF4794B_4
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
18. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Functional description . . . . . . . . . . . . . . . . . . . 4
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
9 Recommended operating conditions. . . . . . . . 6
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
13 Application information. . . . . . . . . . . . . . . . . . 12
14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13
15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 15
16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16
16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16
16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
17 Contact information. . . . . . . . . . . . . . . . . . . . . 16
18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
