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FEATURES
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
NC
A1
A2
A3
A4
A5
A6
A7
A8
GND
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
DBQ, DGV, DW, OR PW PACKAGE
(TOP VIEW)
NC - No internal connection
RGY PACKAGE
(TOP VIEW)
1 20
10 11
2
3
4
5
6
7
8
9
19
18
17
16
15
14
13
12
OE
B1
B2
B3
B4
B5
B6
B7
A1
A2
A3
A4
A5
A6
A7
A8
B8 V
GND
CC
NC
NC - No internal connection
DESCRIPTION/ORDERING INFORMATION
SN74CBTLV3245ALOW-VOLTAGE OCTAL FET BUS SWITCH
SCDS034M – JULY 1997 – REVISED AUGUST 2005
•Standard '245-Type Pinout •Latch-Up Performance Exceeds 250 mA PerJESD 17•5- ΩSwitch Connection Between Two Ports
•ESD Protection Exceeds JESD 22•Rail-to-Rail Switching on Data I/O Ports
– 2000-V Human-Body Model (A114-A)•I
off
Supports Partial-Power-Down ModeOperation – 200-V Machine Model (A115-A)
The SN74CBTLV3245A provides eight bits of high-speed bus switching in a standard '245 device pinout. The lowon-state resistance of the switch allows connections to be made with minimal propagation delay.
The device is organized as one 8-bit switch. When output enable ( OE) is low, the 8-bit bus switch is on, and portA is connected to port B. When OE is high, the switch is open, and the high-impedance state exists between thetwo ports.
This device is fully specified for partial-power-down applications using I
off
. The I
off
feature ensures that damagingcurrent will not backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullupresistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
QFN – RGY Tape and reel SN74CBTLV3245ARGYR CL245ATube SN74CBTLV3245ADWSOIC – DW CBTLV3245ATape and reel SN74CBTLV3245ADWRSSOP (QSOP) – DBQ Tape and reel SN74CBTLV3245ADBQR CBTLV3245A–40 °C to 85 °C
TSSOP – PW Tape and reel SN74CBTLV3245APWR CL245ATVSOP – DGV Tape and reel SN74CBTLV3245ADGVR CL245AVFBGA – GQN Tape and reel SN74CBTLV3245AGQNR CL245AVFBGA – ZQN Tape and reel SN74CBTLV3245AZQNR CL245A
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available atwww.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1997–2005, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
www.ti.com
GQN OR ZQN PACKAGE
(TOP VIEW)
1 2 3 4
A
B
C
D
E
A1 SW B1
A8
OE
SW B8
2
9
19
18
11
A1 SW B1
A8
OE
SW B8
2
9
19
18
11
SN74CBTLV3245A
LOW-VOLTAGE OCTAL FET BUS SWITCH
SCDS034M – JULY 1997 – REVISED AUGUST 2005
TERMINAL ASSIGNMENTS
(1)
1234
AA1 NC V
CC
OE
BA3 B2 A2 B1
CA5 A4 B4 B3
DA7 B6 A6 B5
EGND A8 B8 B7
(1) NC - No internal connection
FUNCTION TABLE
INPUT
FUNCTIONOE
L A port = B portH Disconnect
LOGIC DIAGRAM (POSITIVE LOGIC)
SIMPLIFIED SCHEMATIC, EACH FET SWITCH
2
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Absolute Maximum Ratings
(1)
Recommended Operating Conditions
(1)
SN74CBTLV3245ALOW-VOLTAGE OCTAL FET BUS SWITCH
SCDS034M – JULY 1997 – REVISED AUGUST 2005
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage range –0.5 4.6 VV
I
Input voltage range
(2)
–0.5 4.6 VContinuous channel current 128 mAI
IK
Input clamp current V
I/O
< 0 –50 mADBQ package
(3)
68DGV package
(3)
92θ
JA
Package thermal impedance DW package
(3)
58 °C/WPW package
(3)
83RGY package
(4)
37T
stg
Storage temperature range –65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.(3) The package thermal impedance is calculated in accordance with JESD 51-7.(4) The package thermal impedance is calculated in accordance with JESD 51-5.
MIN MAX UNIT
V
CC
Supply voltage 2.3 3.6 VV
CC
= 2.3 V to 2.7 V 1.7V
IH
High-level control input voltage VV
CC
= 2.7 V to 3.6 V 2V
CC
= 2.3 V to 2.7 V 0.7V
IL
Low-level control input voltage VV
CC
= 2.7 V to 3.6 V 0.8T
A
Operating free-air temperature –40 85 °C
(1) All unused control inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
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Electrical Characteristics
Switching Characteristics
SN74CBTLV3245A
LOW-VOLTAGE OCTAL FET BUS SWITCH
SCDS034M – JULY 1997 – REVISED AUGUST 2005
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
Control inputs –1.2V
IK
V
CC
= 3 V, I
I
= –18 mA VData inputs –0.8I
I
V
CC
= 3.6 V, V
I
= V
CC
or GND ±60 µAI
off
V
CC
= 0, V
I
or V
O
= 0 to 3.6 V 40 µAI
CC
V
CC
= 3.6 V, I
O
= 0, V
I
= V
CC
or GND 20 µA∆I
CC
(2)
Control inputs V
CC
= 3.6 V, One input at 3 V, Other inputs at V
CC
or GND 300 µAC
i
Control inputs V
I
= 3 V or 0 4 pFC
io(OFF)
V
O
= 3 V or 0, OE = V
CC
9 pFI
O
= 64 mA 5 8V
I
= 0V
CC
= 2.3 V,
I
O
= 24 mA 5 8TYP at V
CC
= 2.5 V
V
I
= 1.7 V, I
O
= 15 mA 27 40r
on
(3)
ΩI
O
= 64 mA 5 7V
I
= 0V
CC
= 3 V I
O
= 24 mA 5 7V
I
= 2.4 V, I
O
= 15 mA 10 15
(1) All typical values are at V
CC
= 3.3 V (unless otherwise noted), T
A
= 25 °C.(2) This is the increase in supply current for each input that is at the specified voltage level, rather than V
CC
or GND.(3) Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance isdetermined by the lower of the voltages of the two (A or B) terminals.
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1 )
V
CC
= 2.5 V V
CC
= 3.3 VFROM TO
±0.2 V ±0.3 VPARAMETER UNIT(INPUT) (OUTPUT)
MIN MAX MIN MAX
t
pd
(1)
A or B B or A 0.15 0.25 nst
en
OE A or B 1 6 1 4.7 nst
dis
OE A or B 1 6.1 1 6.4 ns
(1) The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified loadcapacitance, when driven by an ideal voltage source (zero output impedance).
4
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PARAMETER MEASUREMENT INFORMATION
VCC/2
th
tsu
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
S1 2 × VCC
Open
GND
RL
RL
Data Input
Timing Input VCC
0 V
VCC
0 V
0 V
tw
Input
VOLTAGE WA VEFORMS
SETUP AND HOLD TIMES
VOLTAGE WA VEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WA VEFORMS
PULSE DURATION
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
VCC
0 V
Input
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
VCC
0 V
VOL + V∆
VOH − V∆
≈0 V
VCC
VOLTAGE WA VEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCC
GND
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Output
Control
VCC/2 VCC/2
VCC/2 VCC/2
VCC/2 VCC/2
VCC/2
VCC/2 VCC/2
VCC/2
VCC/2
VCC/2
VCC
VCC/2
VCC/2
2.5 V ±0.2 V
3.3 V ±0.3 V 500 Ω
500 Ω
VCC RL
0.15 V
0.3 V
V∆
CL
30 pF
50 pF
SN74CBTLV3245ALOW-VOLTAGE OCTAL FET BUS SWITCH
SCDS034M – JULY 1997 – REVISED AUGUST 2005
Figure 1. Load Circuit and Voltage Waveforms
5
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
74CBTLV3245ADBQRE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
74CBTLV3245ADBQRG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
74CBTLV3245ADGVRE4 ACTIVE TVSOP DGV 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74CBTLV3245ADGVRG4 ACTIVE TVSOP DGV 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74CBTLV3245ADWG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74CBTLV3245ADWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74CBTLV3245ADWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74CBTLV3245APWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74CBTLV3245APWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
74CBTLV3245ARGYRG4 ACTIVE VQFN RGY 20 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
SN74CBTLV3245ADBQR ACTIVE SSOP DBQ 20 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
SN74CBTLV3245ADGVR ACTIVE TVSOP DGV 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74CBTLV3245ADW ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74CBTLV3245ADWE4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74CBTLV3245ADWR ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74CBTLV3245AGQNR ACTIVE BGA
MICROSTAR
JUNIOR
GQN 20 1000 TBD SNPB Level-1-240C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
SN74CBTLV3245APW ACTIVE TSSOP PW 20 70 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74CBTLV3245APWE4 ACTIVE TSSOP PW 20 70 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74CBTLV3245APWG4 ACTIVE TSSOP PW 20 70 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74CBTLV3245APWR ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74CBTLV3245ARGYR ACTIVE VQFN RGY 20 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
SN74CBTLV3245AZQNR ACTIVE BGA
MICROSTAR
JUNIOR
ZQN 20 1000 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 3
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
74CBTLV3245APWRG4 TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
SN74CBTLV3245ADBQR SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74CBTLV3245ADGVR TVSOP DGV 20 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
SN74CBTLV3245ADWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
SN74CBTLV3245AGQNR BGA MI
CROSTA
R JUNI
OR
GQN 20 1000 330.0 12.4 3.3 4.3 1.6 8.0 12.0 Q1
SN74CBTLV3245APWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
SN74CBTLV3245APWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
SN74CBTLV3245ARGYR VQFN RGY 20 3000 330.0 12.4 3.8 4.8 1.6 8.0 12.0 Q1
SN74CBTLV3245AZQNR BGA MI
CROSTA
R JUNI
OR
ZQN 20 1000 330.0 12.4 3.3 4.3 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
74CBTLV3245APWRG4 TSSOP PW 20 2000 367.0 367.0 38.0
SN74CBTLV3245ADBQR SSOP DBQ 20 2500 367.0 367.0 38.0
SN74CBTLV3245ADGVR TVSOP DGV 20 2000 367.0 367.0 35.0
SN74CBTLV3245ADWR SOIC DW 20 2000 367.0 367.0 45.0
SN74CBTLV3245AGQNR BGA MICROSTAR
JUNIOR GQN 20 1000 340.5 338.1 20.6
SN74CBTLV3245APWR TSSOP PW 20 2000 364.0 364.0 27.0
SN74CBTLV3245APWR TSSOP PW 20 2000 367.0 367.0 38.0
SN74CBTLV3245ARGYR VQFN RGY 20 3000 367.0 367.0 35.0
SN74CBTLV3245AZQNR BGA MICROSTAR
JUNIOR ZQN 20 1000 340.5 338.1 20.6
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUAR Y 1996 – REVISED AUGUST 2000
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
14
3,70
3,50 4,90
5,10
20
DIM
PINS **
4073251/E 08/00
1,20 MAX
Seating Plane
0,05
0,15
0,25
0,50
0,75
0,23
0,13
112
24 13
4,30
4,50
0,16 NOM
Gage Plane
A
7,90
7,70
382416
4,90
5,103,70
3,50
A MAX
A MIN
6,60
6,20
11,20
11,40
56
9,60
9,80
48
0,08
M
0,07
0,40
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should
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