1N4531T/R - NXP SEMICONDUCTORS

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74VHC240 Octal Buffer/Line Driver with 3-STATE Outputs

April 2007

74VHC240 Rev. 1.3

74VHC240

Octal Buffer/Line Driver with 3-STATE Outputs

Features

■

High Speed: t

PD

=

3.6ns (typ) at T

A

=

25°C

■

Low power dissipation: I

CC

=

4µA (max) @ T

A

=

25°C

■

High noise immunity: V

NIH

=

V

NIL

=

28% V

CC

(min.)

■

Power down protection is provided on all inputs

■

Low noise: V

OLP

=

0.9V (max.)

■

Pin and function compatible with 74HC240

General Description

The VHC240 is an advanced high speed CMOS octal

bus buffer fabricated with silicon gate CMOS technology.

It achieves high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low

power dissipation. The VHC240 is an inverting 3-STATE

buffer having two active-LOW output enables. This

device is designed to drive buslines or buffer memory

address registers.

An input protection circuit ensures that 0V to 7V can be

applied to the input pins without regard to the supply

voltage. This device can be used to interface 5V to 3V

systems and two supply systems such as battery

backup. This circuit prevents device destruction due to

mismatched supply and input voltages.

Ordering Information

Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the

ordering number. Pb-Free package per JEDEC J-STD-020B.

Connection Diagram Pin Descriptions

Order Number

Package

Number Package Description

74VHC240M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74VHC240SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74VHC240MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

Pin Names Description

OE

1

, OE

2

3-STATE Output Enable Inputs

I

0

–I

7

Inputs

O

0

–O

7

Outputs 3-STATE Outputs

74VHC240 Octal Buffer/Line Driver with 3-STATE Outputs

74VHC240 Rev. 1.3 2

Logic Symbol

IEEE/IEC

Truth Tables

H

=

HIGH Voltage Level

L

=

LOW Voltage Level

X

=

Immaterial

Z

=

High Impedance

Inputs Outputs

OE

1

I

n

(Pins 12, 14, 16, 18)

LL H

LH L

HX Z

Inputs Outputs

OE

1

I

n

(Pins 3, 5, 7, 9)

LL H

LH L

HX Z

74VHC240 Octal Buffer/Line Driver with 3-STATE Outputs

74VHC240 Rev. 1.3 3

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.

The absolute maximum ratings are stress ratings only.

Recommended Operating Conditions

(1)

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not

recommend exceeding them or designing to absolute maximum ratings.

Note:

1. Unused inputs must be held HIGH or LOW. They may not float.

Symbol Parameter Rating

V

CC

Supply Voltage –0.5V to +7.0V

V

IN

DC Input Voltage –0.5V to +7.0V

V

OUT

DC Output Voltage –0.5V to V

CC

+ 0.5V

I

IK

Input Diode Current –20mA

I

OK

Output Diode Current ±20mA

I

OUT

DC Output Current ±25mA

I

CC

DC V

CC

/GND Current ±75mA

T

STG

Storage Temperature –65°C to +150°C

T

L

Lead Temperature (Soldering, 10 seconds) 260°C

Symbol Parameter Rating

V

CC

Supply Voltage 2.0V to +5.5V

V

IN

Input Voltage 0V to +5.5V

V

OUT

Output Voltage 0V to V

CC

T

OPR

Operating Temperature –40°C to +85°C

t

r

, t

f

Input Rise and Fall Time,

V

CC

=

3.3V ± 0.3V

V

CC

=

5.0V ± 0.5V

0ns/V

∼

100ns/V

0ns/V

∼

20ns/V

74VHC240 Octal Buffer/Line Driver with 3-STATE Outputs

74VHC240 Rev. 1.3 4

DC Electrical Characteristics

Noise Characteristics

Note:

2. Parameter guaranteed by design.

Symbol Parameter V

CC

(V) Conditions

T

A

=

Units

25°C –40°C to +85°C

Min. Typ. Max. Min. Max.

V

IH

HIGH Level

Input Voltage

2.0 1.50 1.50 V

3.0–5.5 0.7 x V

CC

0.7 x V

CC

V

IL

LOW Level Input

Voltage

2.0 0.50 0.50 V

3.0–5.5 0.3 x V

CC

0.3 x V

CC

V

OH

HIGH Level

Output

Voltage

2.0 V

IN

=

V

IH

or V

IL

I

OH

=

–50µA 1.9 2.0 1.9 V

3.0 2.9 3.0 2.9

4.5 4.4 4.5 4.4

3.0 I

OH

=

–4mA 2.58 2.48

4.5 I

OH

=

–8mA 3.94 3.80

V

OL

LOW Level

Output Voltage

2.0 V

IN

=

V

IH

or V

IL

I

OL

=

50µA 0.0 0.1 0.1 V

3.0 0.0 0.1 0.1

4.5 0.0 0.1 0.1

3.0 I

OL

=

4mA 0.36 0.44

4.5 I

OL

=

8mA 0.36 0.44

I

OZ

3-STATE Output

Off-State

Current

5.5 V

IN

=

V

IH

or V

IL

;

V

OUT

=

V

CC

or GND

±0.25 ±2.5 µA

I

IN

Input Leakage

Current

0–5.5 V

IN

=

5.5V or GND ±0.1 ±1.0 µA

I

CC

Quiescent

Supply Current

5.5 V

IN

=

V

CC

or GND 4.0 40.0 µA

Symbol Parameter V

CC

(V) Conditions

T

A

=

25°C

UnitsTyp. Limits

V

OLP(2)

Quiet Output Maximum

Dynamic V

OL

5.0 C

L

= 50pF 0.6 0.9 V

VOLV(2) Quiet Output Minimum

Dynamic VOL

5.0 CL = 50pF –0.6 –0.9 V

VIHD(2) Minimum HIGH Level

Dynamic Input Voltage

5.0 CL = 50pF 3.5 V

VILD(2) Maximum LOW Level

Dynamic Input Voltage

5.0 CL = 50pF 1.5 V

74VHC240 Octal Buffer/Line Driver with 3-STATE Outputs

74VHC240 Rev. 1.3 5

AC Electrical Characteristics

Notes:

3. Parameter guaranteed by design. tOSLH = |tPLHmax – tPLHmin|; tOSHL = |tPHLmax – tPHLmin|

4. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating

current consumption without load. Average operating current can be obtained by the equation:

ICC (opr.) = CPD • VCC • fIN + ICC / 8 (per bit).

Symbol Parameter VCC (V) Conditions

TA = 25°C

TA = –40°C

to +85°C

UnitsMin. Typ. Max. Min. Max.

tPLH, tPHL Propagation Delay

Time

3.3 ± 0.3 CL = 15pF 5.3 7.5 1.0 9.0 ns

CL = 50pF 7.8 11.0 1.0 12.5

5.0 ± 0.5 CL = 15pF 3.6 5.5 1.0 6.5

CL = 50pF 5.1 7.5 1.0 8.5

tPZL, tPZH 3-STATE Output

Enable Time

3.3 ± 0.3 RL = 1kΩCL = 15pF 6.6 10.6 1.0 12.5 ns

CL = 50pF 9.1 14.1 1.0 16.0

5.0 ± 0.5 CL = 15pF 4.7 7.3 1.0 8.5

CL = 50pF 6.2 9.3 1.0 10.5

tPLZ, tPHZ 3-STATE Output

Disable Time

3.3 ± 0.3 RL = 1kΩCL = 50pF 10.3 14.0 1.0 16.0 ns

5.0 ± 0.5 CL = 50pF 6.7 9.2 1.0 10.5

tOSLH,

tOSHL

Output to Output

Skew

3.3 ± 0.3 (3) CL = 50pF 1.5 1.5 ns

5.0 ± 0.5 CL = 50pF 1.0 1.0

CIN Input Capacitance VCC = Open 4 10 10 pF

COUT Output Capacitance VCC = 5.0V 6 pF

CPD Power Dissipation

Capacitance

(4) 17 pF

74VHC240 Octal Buffer/Line Driver with 3-STATE Outputs

74VHC240 Rev. 1.3 6

Physical Dimensions

Dimensions are in inches (millimeters) unless otherwise noted.

Figure 1. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

Package Number M20B

74VHC240 Octal Buffer/Line Driver with 3-STATE Outputs

74VHC240 Rev. 1.3 7

Physical Dimensions (Continued)

Dimensions are in millimeters unless otherwise noted.

Figure 2. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M20D

74VHC240 Octal Buffer/Line Driver with 3-STATE Outputs

74VHC240 Rev. 1.3 8

Physical Dimensions (Continued)

Dimensions are in millimeters unless otherwise noted.

Figure 3. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC20

74VHC240 Octal Buffer/Line Driver with 3-STATE Outputs

74VHC240 Rev. 1.3 9

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DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS

HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE

APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER

ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S

WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR

SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body or

(b) support or sustain life, and (c) whose failure to perform

when properly used in accordance with instructions for use

provided in the labeling, can be reasonably expected to

result in a significant injury of the user.

2. A critical component in any component of a life support,

device, or system whose failure to perform can be

reasonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In Design This datasheet contains the design specifications for product

development. Specifications may change in any manner without notice.

Preliminary First Production This datasheet contains preliminary data; supplementary data will be

published at a later date. Fairchild Semiconductor reserves the right to

make changes at any time without notice to improve design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor

reserves the right to make changes at any time without notice to improve

design.

Obsolete Not In Production This datasheet contains specifications on a product that has been

discontinued by Fairchild Semiconductor. The datasheet is printed for

reference information only.

Rev. I24