MC100LVEL16 3.3VECL Differential Receiver The MC100LVEL16 is a differential receiver. The device is functionally equivalent to the EL16 device, operating from a 3.3 V supply. The LVEL16 exhibits a wider VIHCMR range than its EL16 counterpart. With output transition times and propagation delays comparable to the EL16 the LVEL16 is ideally suited for interfacing with high frequency sources at 3.3 V supplies. Under open input conditions, the Q input will be pulled down to VEE and the Q input will be biased to VCC/2. This condition will force the Q output low. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. * 300 ps Propagation Delay * High Bandwidth Output Transitions * The 100 Series Contains Temperature Compensation * PECL Mode Operating Range: VCC = 3.0 V to 3.8 V with VEE = 0 V * NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -3.8 V * Internal Input Pulldown Resistors on D, Pullup and Pulldown Resistors on D * Q Output will Default LOW with Inputs Open or at VEE http://onsemi.com MARKING DIAGRAMS* 8 SO-8 D SUFFIX CASE 751 8 1 1 8 1 1 A L Y W = Assembly Location = Wafer Lot = Year = Work Week *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION Package Shipping MC100LVEL16D SO-8 98 Units / Rail MC100LVEL16DR2 SO-8 2500 Tape & Reel TSSOP-8 98 Units / Rail Device MC100LVEL16DTR2 TSSOP-8 1 8 VCC D 2 7 Q KV16 ALYW TSSOP-8 DT SUFFIX CASE 948R 8 MC100LVEL16DT NC KVL16 ALYW 2500 Tape & Reel For additional tape and reel information, refer to Brochure BRD8011/D. PIN DESCRIPTION D 3 6 Q VBB 4 5 VEE PIN FUNCTION D, D Q, Q VBB VCC VEE NC ECL Data Inputs ECL Data Outputs Reference Voltage Output Positive Supply Negative Supply No Connect Figure 1. Logic Diagram and Pinout Assignment Semiconductor Components Industries, LLC, 2003 March, 2003 - Rev. 2 1 Publication Order Number: MC100LVEL16/D MC100LVEL16 ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 75 k Internal Input Pullup Resistor 75 k ESD Protection Human Body Model Machine Model Charged Device Model > 4 KV > 400 V > 2 kV Moisture Sensitivity (Note 1) Flammability Rating Level 1 Oxygen Index: 28 to 34 UL 94 V-0 @ 0.125 in Transistor Count 79 Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. Refer to Application Note AND8003/D for additional information. MAXIMUM RATINGS (Note 2) Symbol Parameter Condition 1 Condition 2 Rating Units VCC PECL Mode Power Supply VEE = 0 V 8 to 0 V VEE NECL Mode Power Supply VCC = 0 V -8 to 0 V VI PECL Mode Input Voltage NECL Mode Input Voltage VEE = 0 V VCC = 0 V 6 to 0 -6 to 0 V V Iout Output Current Continuous Surge 50 100 mA mA IBB VBB Sink/Source 0.5 mA TA Operating Temperature Range -40 to +85 C Tstg Storage Temperature Range -65 to +150 C JA Thermal Resistance (Junction-to-Ambient) 0 LFPM 500 LFPM SO-8 SO-8 190 130 C/W C/W JC Thermal Resistance (Junction-to-Case) Standard Board SO-8 41 to 44 5% C/W JA Thermal Resistance (Junction-to-Ambient) 0 LFPM 500 LFPM TSSOP-8 TSSOP-8 185 140 C/W C/W JC Thermal Resistance (Junction-to-Case) Standard Board TSSOP-8 41 to 44 5% C/W Tsol Wave Solder <2 to 3 sec @ 248C 265 C 2. Maximum Ratings are those values beyond which device damage may occur. http://onsemi.com 2 VI VCC VI VEE MC100LVEL16 LVPECL DC CHARACTERISTICS VCC = 3.3 V; VEE = 0.0 V (Note 3) -40 C Symbol Min Characteristic 25C Typ Max 17 23 Min 85C Typ Max 17 23 Min Typ Max Unit 18 24 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 4) 2215 2295 2420 2275 2345 2420 2275 2345 2420 mV VOL Output LOW Voltage (Note 4) 1470 1605 1745 1490 1595 1680 1490 1595 1680 mV VIH Input HIGH Voltage (Single-Ended) 2135 2420 2135 2420 2135 2420 mV VIL Input LOW Voltage (Single-Ended) 1490 1825 1490 1825 1490 1825 mV VBB Output Voltage Reference 1.92 2.04 1.92 2.04 1.92 2.04 V VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 5) Vpp < 500 mV Vpp 500 mV 1.2 2.9 1.1 2.9 1.1 2.9 V 1.5 2.9 1.4 2.9 1.4 2.9 V 150 A IIH Input HIGH Current IIL Input LOW Current 150 D D 0.5 -600 150 0.5 -600 A A 0.5 -600 NOTE: Devices are designed to meet the DC specifications shown in the above table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 3. Input and output parameters vary 1:1 with VCC. VEE can vary 0.3 V. 4. Outputs are terminated through a 50 resistor to VCC - 2 V. 5. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V. LVNECL DC CHARACTERISTICS VCC = 0.0 V; VEE = -3.3 V (Note 6) -40 C Symbol Min Characteristic 25C Typ Max 17 23 Min 85C Typ Max 17 23 Min Typ Max Unit 18 24 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 7) -1085 -1005 -880 -1025 -955 -880 -1025 -955 -880 mV VOL Output LOW Voltage (Note 7) -1830 -1695 -1555 -1810 -1705 -1620 -1810 -1705 -1620 mV VIH Input HIGH Voltage (Single-Ended) -1 165 -880 -1 165 -880 -1 165 -880 mV VIL Input LOW Voltage (Single-Ended) -1810 -1475 -1810 -1475 -1810 -1475 mV VBB Output Voltage Reference -1.38 -1.26 -1.38 -1.26 -1.38 -1.26 V VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 8) Vpp < 500 mV Vpp 500 mV -2.1 -0.4 -2.2 -0.4 -2.2 -0.4 V -1.8 -0.4 -1.9 -0.4 -1.9 -0.4 V 150 A IIH Input HIGH Current IIL Input LOW Current 150 D D 0.5 -600 150 0.5 -600 0.5 -600 A A NOTE: Devices are designed to meet the DC specifications shown in the above table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained. 6. Input and output parameters vary 1:1 with VCC. VEE can vary 0.3 V. 7. Outputs are terminated through a 50 resistor to VCC - 2 V. 8. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V. http://onsemi.com 3 MC100LVEL16 AC CHARACTERISTICS VCC= 3.3 V; VEE= 0.0 V or VCC= 0.0 V; VEE= -3.3 V (Note 9) -40 C Symbol Min Characteristic fmax Maximum Toggle Frequency tPLH tPHL Propagation Delay to Output tSKEW Duty Cycle Skew (Differential) (Note 10) tJITTER Random Clock Jitter (RMS) VPP Input Swing (Note 11) 150 tr tf Output Rise/Fall Times Q (20% - 80%) 120 Typ 25C Max Min 1.75 85C Typ Max Min 1.75 Typ Max 1.75 Unit GHz ps Differential Single-Ended 150 100 275 275 400 450 5 30 225 175 0.7 220 300 300 375 425 5 20 240 190 0.7 1000 150 320 120 1000 150 320 120 220 D Receiver Device Driver Device Q D 50 50 VTT VTT = VCC - 2.0 V Figure 2. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020 - Termination of ECL Logic Devices.) Resource Reference of Application Notes AN1404 - ECLinPS Circuit Performance at Non-Standard VIH Levels AN1405 - ECL Clock Distribution Techniques AN1406 - Designing with PECL (ECL at +5.0 V) AN1503 - ECLinPS I/O SPICE Modeling Kit AN1504 - Metastability and the ECLinPS Family AN1560 - Low Voltage ECLinPS SPICE Modeling Kit AN1568 - Interfacing Between LVDS and ECL AN1596 - ECLinPS Lite Translator ELT Family SPICE I/O Model Kit AN1650 - Using Wire-OR Ties in ECLinPS Designs AN1672 - The ECL Translator Guide AND8001 - Odd Number Counters Design AND8002 - Marking and Date Codes AND8020 - Termination of ECL Logic Devices AND8090 - AC Characteristics of ECL Devices http://onsemi.com 4 390 440 5 20 0.7 9. VEE can vary 0.3 V. 10. Duty cycle skew is the difference between a tPLH and tPHL propagation delay through a device. 11. VPP(min) is minimum input swing for which AC parameters guaranteed. The device has a DC gain of 40. Q 315 315 220 ps ps 1000 mV 320 ps MC100LVEL16 PACKAGE DIMENSIONS SO-8 D SUFFIX PLASTIC SOIC PACKAGE CASE 751-07 ISSUE AA NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. -XA 8 5 0.25 (0.010) S B 1 M Y M 4 K -YG C N X 45 SEATING PLANE -Z- 0.10 (0.004) H D 0.25 (0.010) M Z Y S X M S http://onsemi.com 5 J DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0 8 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 8 0.010 0.020 0.228 0.244 MC100LVEL16 PACKAGE DIMENSIONS TSSOP-8 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948R-02 ISSUE A 8x 0.15 (0.006) T U K REF 0.10 (0.004) S 2X L/2 8 1 PIN 1 IDENT S T U S V NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. S 5 0.25 (0.010) B -U- L 0.15 (0.006) T U M M 4 A -V- F DETAIL E C 0.10 (0.004) -T- SEATING PLANE D -WG DETAIL E DIM A B C D F G K L M MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0 6 INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0 6 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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