Semiconductor Components Industries, LLC, 2001
June, 2001 – Rev. 3 1Publication Order Number:
CS2842A/D
CS2842A, CS3842A,
CS2843A, CS3843A
Off-Line Current Mode
PWM Control Circuit with
Undervoltage Lockout
The CS284XA, CS384XA provides all the necessary features to
implement off–line fixed frequency current–mode control with a
minimum number of external components.
The CS384XA family incorporates a new precision
temperature–controlled oscillator with an internally trimmed
discharge current to minimize variations in frequency. A precision
duty–cycle clamp eliminates the need for an external oscillator when a
50% duty–cycle is used. Duty–cycles greater than 50% are also
possible. On board logic ensures that VREF is stabilized before the
output stage is enabled. Ion implant resistors provide tighter control of
undervoltage lockout.
Other features include low startup current, pulse–by–pulse current
limiting, and a high–current totem pole output for driving capacitive
loads, such as the gate of power MOSFET. The output is LOW in the
off state, consistent with N–channel devices.
The CS384XA series of current–mode control ICs are available in
8 and14 lead packages f or surface m ount (SO) a pplications a s well a s
8 lead PDIP packages.
Features
•Optimized for Off–line Control
•Internally Trimmed Temperature Compensated Oscillator
•Maximum Duty–Cycle Clamp
•VREF Stabilized Before Output Stage is Enabled
•Low Startup Current
•Pulse–By–Pulse Current Limiting
•Improved Undervoltage Lockout
•Double Pulse Suppression
•1.0% Trimmed Bandgap Reference
•High Current Totem Pole Output
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x = 2 or 3
y = 2 or 3
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
DIP–8
N SUFFIX
CASE 626
1
8
SO–8
D SUFFIX
CASE 751
1
8
SO–14
D SUFFIX
CASE 751A
1
14
1
8
x84yA
AWL
YYWW
MARKING
DIAGRAM
1
x84yA
ALYWX
8
1
CSx84yA
AWLYWW
14
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
ORDERING INFORMATION
CS2842A, CS3842A, CS2843A, CS3843A
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2
PIN CONNECTIONS
GNDOSC VOUT
Sense VCC
VFB
VREF
COMP1
GNDOSC Pwr GNDNC VOUT
Sense VCC PwrNC
114
VCC
VFB
NCNC VREF
COMP
8
DIP–8 & SO–8 SO–14
Figure 1. Block Diagram
Set/
Reset 5.0 V
Reference
Undervoltage
Lock–out Circuit
16 V/10 V
(8.4 V/7.6 V)
34 V
VCC
GND
Output
Enable
Internal
Bias
OscillatorOSC
2.50 V
VCC Pwr
VREF
VOUT
+
–
VFB
COMP
Error
Amplifier
S
R
VC
2R
R1.0 V
Sense
Current
Sensing
Comparator
PWM
Latch Pwr GND
( ) Indicates CS2843A/3843A
NOR
CS2842A, CS3842A, CS2843A, CS3843A
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3
MAXIMUM RATINGS*
Rating Value Unit
Supply Voltage (ICC < 30 mA) Self Limiting –
Supply Voltage (Low Impedance Source) 30 V
Output Current ±1.0 A
Output Energy (Capacitive Load) 5.0 µJ
Analog Inputs (VFB, Sense) –0.3 to + 5.5 V
Error Amp Output Sink Current 10 mA
Package Thermal Resistance, PDIP–8
Junction–to–Case, RθJC
Junction–to–Ambient, RθJA 52
100 °CW
°CW
Package Thermal Resistance, SO–8
Junction–to–Case, RθJC
Junction–to–Ambient, RθJA 45
165 °CW
°CW
Package Thermal Resistance, SO–14
Junction–to–Case, RθJC
Junction–to–Ambient, RθJA 30
125 °CW
°CW
Lead Temperature Soldering: Wave Solder (through hole styles only) (Note 1)
Reflow (SMD styles only) (Note 2) 260 peak
230 peak °C
°C
1. 10 second maximum.
2. 60 second maximum above 183°C.
*The maximum package power dissipation must be observed.
ELECTRICAL CHARACTERISTICS (–25° ≤ TA ≤ 85°for CS2842A/CS2843A, 0° ≤ TA ≤ 70°for CS3842A/CS3843A.
VCC = 15 V*; RT = 680 Ω, CT = 0.022 µF for triangular mode, RT = 10 kΩ, CT = 3.3 nF for sawtooth mode (see Figure 7);
unless otherwise stated.)
CS2842A/CS2843A CS3842A/CS3843A
Characteristic Test Conditions Min Typ Max Min Typ Max Unit
Reference Section
Output Voltage TJ = 25°C, IOUT = 1.0 mA 4.95 5.00 5.05 4.90 5.00 5.10 V
Line Regulation 12 ≤ VIN ≤ 25 V – 6.0 20 – 6.0 20 mV
Load Regulation 1.0 ≤ IOUT ≤ 20 mA – 6.0 25 – 6.0 25 mV
Temperature Stability Note 3. – 0.2 0.4 – 0.2 0.4 mV/°C
Total Output Variation Line, Load, Temperature (Note 3.) 4.90 – 5.10 4.82 – 5.18 V
Output Noise Voltage 10 Hz ≤ f ≤ 10 kHz, TJ = 25°C (Note 3.) – 50 – – 50 – µV
Long Term Stability TA = 125°C, 1.0 kHrs. (Note 3.) – 5.0 25 – 5.0 25 mV
Output Short Circuit TA = 25°C –30 –100 –180 –30 –100 –180 mA
Oscillator Section
Initial Accuracy Sawtooth Mode (see Figure 7), TJ = 25°C
Triangular Mode (see Figure 7), TJ = 25°C47
47 52
52 57
57 47
44 52
52 57
60 kHz
kHz
Voltage Stability 12 ≤ VCC ≤ 25 V – 0.2 1.0 – 0.2 1.0 %
Temperature Stability Sawtooth Mode TMIN ≤ TA ≤ TMAX (Note 3.)
T riangular Mode TMIN ≤ TA ≤ TMAX (Note 3.) –
–5.0
8.0 –
––
–5.0
8.0 –
–%
%
Amplitude OSC peak to peak – 1.7 – – 1.7 – V
Discharge Current TJ = 25°C
TMIN ≤ TA ≤ TMAX 7.5
7.2 8.3
–9.3
9.5 7.5
7.2 8.3
–9.3
9.5 mA
mA
3. These parameters, although guaranteed, are not 100% tested in production.
*Adjust VCC above the start threshold before setting at 15 V.
CS2842A, CS3842A, CS2843A, CS3843A
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4
ELECTRICAL CHARACTERISTICS (continued) (–25° ≤ TA ≤ 85°for CS2842A/CS2843A, 0° ≤ TA ≤ 70°for CS3842A/CS3843A.
VCC = 15 V*; RT = 680 Ω, CT = 0.022 µF for triangular mode, RT = 10 kΩ, CT = 3.3 nF for sawtooth mode (see Figure 7);
unless otherwise stated.)
CS2842A/CS2843A CS3842A/CS3843A
Characteristic Test Conditions Min Typ Max Min Typ Max Unit
Error Amp Section
Input Voltage VCOMP = 2.5 V 2.45 2.50 2.55 2.42 2.50 2.58 V
Input Bias Current VFB = 0 – –0.3 –1.0 – –0.3 –2.0 µA
AVOL 2.0 ≤ VOUT ≤ 4.0 V 65 90 – 65 90 – dB
Unity Gain Bandwidth Note 4. 0.7 1.0 – 0.7 1.0 – MHz
PSRR 12 ≤ VCC ≤ 25 V 60 70 – 60 70 – dB
Output Sink Current VFB = 2.7 V, VCOMP = 1.1 V 2.0 6.0 – 2.0 6.0 – mA
Output Source Current VFB = 2.3 V, VCOMP = 5.0 V –0.5 –0.8 – –0.5 –0.8 – mA
VOUT High VFB = 2.3 V, 15 kΩ to ground 5.0 6.0 – 5.0 6.0 – V
VOUT Low VFB = 2.7 V, 15 kΩ to VREF – 0.7 1.1 – 0.7 1.1 V
Current Sense Section
Gain Notes 5 & 6. 2.85 3.00 3.15 2.85 3.00 3.15 V/V
Maximum Input Signal VCOMP = 5.0 V (Note 5.) 0.9 1.0 1.1 0.9 1.0 1.1 V
PSRR 12 ≤ VCC ≤ 25 V (Note 5.) – 70 – – 70 – dB
Input Bias Current VSENSE = 0 – –2.0 –10 – –2.0 –10 µA
Delay to Output TJ = 25°C (Note 4.) – 150 300 – 150 300 ns
Output Section
Output Low Level ISINK = 20 mA
ISINK = 200 mA –
–0.1
1.5 0.4
2.2 –
–0.1
1.5 0.4
2.2 V
V
Output High Level ISOURCE = 20 mA
ISOURCE = 200 mA 13
12 13.5
13.5 –
–13
12 13.5
13.5 –
–V
V
Rise Time TJ = 25°C, CL = 1.0 nF (Note 4.) – 50 150 – 50 150 ns
Fall Time TJ = 25°C, CL = 1.0 nF (Note 4.) – 50 150 – 50 150 ns
Output Leakage UVLO Active, VOUT = 0 – –0.01 –10.00 – –0.01 –10.00 µA
Total Standby Current
Startup Current – – 0.5 1.0 – 0.5 1.0 mA
Operating Supply Current VFB = VSENSE = 0 V,
RT = 10 kΩ, CT = 3.3 nF 11 17 – 11 17 – mA
VCC Zener Voltage ICC = 25 mA – 34 – – 34 – V
4. These parameters, although guaranteed, are not 100% tested in production.
5. Parameters measured at trip point of latch with VFB = 0.
6. Gai n def i n e d as: A = ∆VCOMP/∆VSENSE; 0 ≤ VSENSE ≤ 0.8 V.
*Adjust VCC above the start threshold before setting at 15 V.
CS2842A, CS3842A, CS2843A, CS3843A
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5
ELECTRICAL CHARACTERISTICS (continued) (–25° ≤ TA ≤ 85°for CS2842A/CS2843A, 0° ≤ TA ≤ 70°for CS3842A/CS3843A.
VCC = 15 V*; RT = 680 Ω, CT = 0.022 µF for triangular mode, RT = 10 kΩ, CT = 3.3 nF for sawtooth mode (see Figure 7);
unless otherwise stated.)
CS2842A CS3842A CS2843A/CS3843A
Characteristic Test Conditions Min Typ Max Min Typ Max Min Typ Max Unit
Undervoltage Lockout Section
Start Threshold – 15 16 17 14.5 16 17.5 7.8 8.4 9.0 V
Min. Operating Voltage After Turn On 9.0 10 11 8.5 10 11.5 7.0 7.6 8.2 V
*Adjust VCC above the start threshold before setting at 15 V.
PACKAGE PIN DESCRIPTION
Package Pin Number
DIP–8 SO–8 SO–14 Symbol Description
ÁÁÁÁÁ
ÁÁÁÁÁ
1
ÁÁÁÁ
ÁÁÁÁ
1
ÁÁÁÁ
ÁÁÁÁ
1
ÁÁÁÁÁ
ÁÁÁÁÁ
COMP
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Error amp output, used to compensate error amplifier.
ÁÁÁÁÁ
ÁÁÁÁÁ
2
ÁÁÁÁ
ÁÁÁÁ
2
ÁÁÁÁ
ÁÁÁÁ
3
ÁÁÁÁÁ
ÁÁÁÁÁ
VFB
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Error amp inverting input.
ÁÁÁÁÁ
ÁÁÁÁÁ
3
ÁÁÁÁ
ÁÁÁÁ
3
ÁÁÁÁ
ÁÁÁÁ
5
ÁÁÁÁÁ
ÁÁÁÁÁ
Sense
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Noninverting input to Current Sense Comparator.
ÁÁÁÁÁ
ÁÁÁÁÁ
4
ÁÁÁÁ
ÁÁÁÁ
4
ÁÁÁÁ
ÁÁÁÁ
7
ÁÁÁÁÁ
ÁÁÁÁÁ
OSC
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Oscillator timing network with capacitor to ground, resistor to VREF.
ÁÁÁÁÁ
ÁÁÁÁÁ
5
ÁÁÁÁ
ÁÁÁÁ
5
ÁÁÁÁ
ÁÁÁÁ
8
ÁÁÁÁÁ
ÁÁÁÁÁ
GND
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Ground.
ÁÁÁÁÁ
ÁÁÁÁÁ
–
ÁÁÁÁ
ÁÁÁÁ
–
ÁÁÁÁ
ÁÁÁÁ
9
ÁÁÁÁÁ
ÁÁÁÁÁ
Pwr GND
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Output driver ground.
ÁÁÁÁÁ
ÁÁÁÁÁ
6
ÁÁÁÁ
ÁÁÁÁ
6
ÁÁÁÁ
ÁÁÁÁ
10
ÁÁÁÁÁ
ÁÁÁÁÁ
VOUT
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Output drive pin.
ÁÁÁÁÁ
ÁÁÁÁÁ
–
ÁÁÁÁ
ÁÁÁÁ
–
ÁÁÁÁ
ÁÁÁÁ
11
ÁÁÁÁÁ
ÁÁÁÁÁ
VCC Pwr
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Output driver positive supply.
ÁÁÁÁÁ
ÁÁÁÁÁ
7
ÁÁÁÁ
ÁÁÁÁ
7
ÁÁÁÁ
ÁÁÁÁ
12
ÁÁÁÁÁ
ÁÁÁÁÁ
VCC
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Positive power supply.
ÁÁÁÁÁ
ÁÁÁÁÁ
8
ÁÁÁÁ
ÁÁÁÁ
8
ÁÁÁÁ
ÁÁÁÁ
14
ÁÁÁÁÁ
ÁÁÁÁÁ
VREF
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Output of 5.0 V internal reference.
ÁÁÁÁÁ
ÁÁÁÁÁ
–
ÁÁÁÁ
ÁÁÁÁ
–
ÁÁÁÁ
ÁÁÁÁ
2, 4, 6, 13
ÁÁÁÁÁ
ÁÁÁÁÁ
NC
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
No connection.
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 2. Oscillator Frequency vs. CTFigure 3. Oscillator Duty Cycle vs. RT
900
800
700
600
500
Frequency (kHz)
.0005 .001 .002 .04 .05
CT (µF)
400
300
200
100
.03.02.01.003 .005
RT = 680 Ω
RT = 1.5 kΩ
RT = 10 kΩ
100
90
80
70
50
Duty Cycle (%)
RT (Ω)
40
30
20
10
60
100
200
300
400
500
700
1 k
2 k
3 k
4 k
5 k
7 k
10 k
CS2842A, CS3842A, CS2843A, CS3843A
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6
Figure 4. Test Circuit
VREF
VCC
VOUT
GND
COMP
VFB
Sense
OSC
0.1 µF
0.1 µF
RT
1.0 kΩ
1.0 W
2N2222
100 kΩ
VCC
VREF
VOUT
GND
A
5.0 kΩ
Sense
ADJUST
CT
4.7 kΩ
4.7 kΩ
1.0 kΩ
ERROR AMP
ADJUST
CIRCUIT DESCRIPTION
CSX843A
8.4 V
7.6 V
CSX842A
16 V
10 V
VON
VOFF
ON/OFF Command
to reset of IC
VCC
< 1.0 mA
< 15 mA
VON VOFF
VCC
ICC
Figure 5. Typical Undervoltage Characteristics
Undervoltage Lockout
During Undervoltage Lockout (Figure 5), the output
driver is biased to a high impedance state. The output should
be shunted to ground with a resistor to prevent output
leakage current from activating the power switch.
PWM Waveform
To generate t he P WM w aveform, t he c ontrol v oltage f rom
the e rror a mplifier i s c ompared t o a c urrent s ense s ignal w hich
represents the peak output inductor current (Figure 6). An
increase in V CC c auses t he i nductor c urrent s lope t o i ncrease,
thus r educing t he d uty c ycle. T his i s a n i nherent f eed–forward
characteristic of current mode control, since the control
voltage does not have to change during changes of input
supply voltage.
Figure 6. Timing Diagram for Key CS2841B
Parameters
Switch
Current
EA Output
VCC
IO
VO
OSC
RESET
OSC
When the power supply sees a sudden large output current
increase, the control voltage will increase allowing the duty
cycle to momentarily increase. Since the duty cycle tends to
exceed the maximum allowed to prevent transformer
saturation in some power supplies, the internal oscillator
waveform provides the maximum duty cycle clamp as
programmed by the selection of oscillator components.
Setting the Oscillator
Oscillator timing capacitor, CT, is charged by VREF
through RT and discharged by an internal current source.
During the discharge time, the internal clock signal blanks
out the output to the Low state, thus providing a user selected
maximum duty cycle clamp. Charge and discharge times are
determined by the formula:
CS2842A, CS3842A, CS2843A, CS3843A
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7
tcRTCTlnVREF Vlower
VREF Vupper
tdRTCTlnVREF IdRTVlower
VREF IdRTVupper
Substituting in typical values for the parameters in the
above formulas:
VREF = 5.0 V
Vupper = 2.7 V
Vlower = 1.0 V
Id = 8.3 mA
tc ≈ 0.5534RTCT
tdRTCTln2.3 0.0083RT
4.0 0.0083RT
The frequency and maximum duty cycle can be
determined using the Typical Performance Characteristic
graphs.
Grounding
High peak currents associated with capacitive loads
necessitate careful grounding techniques. Timing and
bypass capacitors should be connected close to GND pin in
a single point ground.
The transistor and 5.0 kΩ potentiometer , shown in the test
circuit, are used to sample the oscillator waveform and apply
and adjustable ramp to Sense.
Figure 7. Oscillator Timing Network and
Parameters
Internal Clock
Triangular Mode
VOSC
VOSC
Internal Clock
Small RT (≈ 700 kΩ)
Large RT (≈ 10 kΩ)
Sawtooth Mode
Timing Parameters
Vupper
Vlower tctd
VREF
OSC
GND
RT
CT
CS2842A, CS3842A, CS2843A, CS3843A
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8
ORDERING INFORMATION
Device Temperature Range Package Shipping
CS2842ALN8 DIP–8 50 Units/Rail
CS2843ALN8
25°Cto85°C
DIP–8 50 Units/Rail
CS2842ALD14 –25°C to 85°CSO–14 55 Units/Rail
CS2842ALDR14 SO–14 2500 Tape & Reel
CS3842AGN8 DIP–8 50 Units/Rail
CS3842AGD8 SO–8 98 Units/Rail
CS3842AGDR8 SO–8 2500 Tape & Reel
CS3842AGD14 SO–14 55 Units/Rail
CS3842AGDR14
0°Cto70°C
SO–14 2500 Tape & Reel
CS3843AGN8 0°C to 70°CDIP–8 50 Units/Rail
CS3843AGD8 SO–8 98 Units/Rail
CS3843AGDR8 SO–8 2500 Tape & Reel
CS3843AGD14 SO–14 55 Units/Rail
CS3843AGDR14 SO–14 2500 Tape & Reel
CS2842A, CS3842A, CS2843A, CS3843A
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9
PACKAGE DIMENSIONS
DIP–8
N SUFFIX
CASE 626–05
ISSUE L
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
14
58
F
NOTE 2 –A–
–B–
–T–
SEATING
PLANE
H
J
GDK
N
C
L
M
M
A
M
0.13 (0.005) B M
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A9.40 10.16 0.370 0.400
B6.10 6.60 0.240 0.260
C3.94 4.45 0.155 0.175
D0.38 0.51 0.015 0.020
F1.02 1.78 0.040 0.070
G2.54 BSC 0.100 BSC
H0.76 1.27 0.030 0.050
J0.20 0.30 0.008 0.012
K2.92 3.43 0.115 0.135
L7.62 BSC 0.300 BSC
M--- 10 --- 10
N0.76 1.01 0.030 0.040
SO–8
D SUFFIX
CASE 751–07
ISSUE W
SEATING
PLANE
1
4
58
N
J
X 45
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
A
BS
D
H
C
0.10 (0.004)
DIM
A
MIN MAX MIN MAX
INCHES
4.80 5.00 0.189 0.197
MILLIMETERS
B3.80 4.00 0.150 0.157
C1.35 1.75 0.053 0.069
D0.33 0.51 0.013 0.020
G1.27 BSC 0.050 BSC
H0.10 0.25 0.004 0.010
J0.19 0.25 0.007 0.010
K0.40 1.27 0.016 0.050
M0 8 0 8
N0.25 0.50 0.010 0.020
S5.80 6.20 0.228 0.244
–X–
–Y–
G
M
Y
M
0.25 (0.010)
–Z–
Y
M
0.25 (0.010) Z SXS
M
CS2842A, CS3842A, CS2843A, CS3843A
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10
PACKAGE DIMENSIONS
SO–14
D SUFFIX
CASE 751A–03
ISSUE F NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
–A–
–B–
G
P7 PL
14 8
71 M
0.25 (0.010) B M
S
B
M
0.25 (0.010) A S
T
–T–
F
RX 45
SEATING
PLANE D14 PL K
C
J
M
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A8.55 8.75 0.337 0.344
B3.80 4.00 0.150 0.157
C1.35 1.75 0.054 0.068
D0.35 0.49 0.014 0.019
F0.40 1.25 0.016 0.049
G1.27 BSC 0.050 BSC
J0.19 0.25 0.008 0.009
K0.10 0.25 0.004 0.009
M0 7 0 7
P5.80 6.20 0.228 0.244
R0.25 0.50 0.010 0.019
CS2842A, CS3842A, CS2843A, CS3843A
http://onsemi.com
11
Notes
CS2842A, CS3842A, CS2843A, CS3843A
http://onsemi.com
12
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CS2842A/D
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