TDA7350
22W BRIDGE-STEREO AMPLIFIER FOR CAR RADIO
VERY FEW EXTERNAL COMPONENTS
NO BOU CHER OT CELLS
NO BOOSTRAP CAPACITORS
HIGH OUT PUT POWER
NO SWITCH ON/OFF NOISE
VE RY LOW STAN D-B Y CURRENT
FIXED GAIN (30dB STEREO)
PROGRAMMABLE TURN-ON DELAY
Protections:
OUTPUT AC-DC SHORT CIRCUIT TO
GROUND AND TO SUP PLY VOLT AGE
VERY INDUC T IV E LO ADS
LOUDSPEAKER PROTECTION
OVERRATIN G C HI P TEMPE R ATUR E
LOAD DUMP VOLTAGE
FORTUITOUS OPEN GROUND
DESCRIPTION
The TDA7350 is a new technology class AB
Audio Power Amplifier in the Multiwatt® package
designed for car radio applications.
Thanks to the fully complementary PNP/NPN out-
put configuration the high power performance of
the TDA7350 is obtained without bootstrap ca-
pacitors.
A delayed turn-on mute circuit eliminates audible
on/off noise, and a novel short circuit protection
system prevents spurious intervention with highly
inductive loads.
This is advanced information on a new product now in development or undergoing evaluation. Detai ls are subject to change without notice.
September 2003
®
APPLICATION CIRCUIT BRIDGE
Multiwatt - 11
ORDERING NUMBER: TDA7350
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PIN C ONNECTION (Top view)
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Test Conditions Unit
VSOperating Supply Voltage 18 V
VSDC Supply Voltage 28 V
VSPeak Supply Voltage (for t = 50ms) 40 V
IoOutput Peak Current (non rep. for t = 100µs) 5 A
IoOutput Peak Current (rep. freq. > 10Hz) 4 A
Ptot Power Dissipation at Tcase = 85°C 36 W
Tstg,TJ Storage and Junction Temperature -40 to 150 °C
THERMAL DATA
Symbol Description Value Unit
Rthj-case Thermal Resistance Junction-case Max 1.8 °C/W
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ELECTRICAL CHARACTERISTICS (Refer t o the test circuits, Tamb = 25°C, VS = 14.4V, f = 1KHz unless
otherwise specified)
Symbol Parameter Test Condition Min. Typ. Max. Unit
VSSupply Voltage Range 8 18 V
IdTotal Quiescent Drain Current stereo configuration 120 mA
ASB Stand-by attenuation 60 80 dB
ISB Stand-by Current 100 µA
Tsd Thermal Shut-down Junction
Temperature 150 °C
STEREO
PoOutput Power (each channel) d = 10%
RL = 2
RL = 3.2
RL = 4
d = 10%; VS = 13.2V
RL = 2
RL = 3.2
RL = 4
711
8
6.5
9
6.5
5.5
W
W
W
W
W
W
d Distortion Po = 0.1 to 4W; RL = 3.20.5 %
SVR Supply Voltage Rejection RS = 10k C3 = 22µF
f = 100Hz C3 = 100µF45 50
57 dB
CT Crosstalk f = 1KHz
f = 10KHz 45 55
50 dB
dB
RIInput Resistance 30 50 K
GVVoltage Gain 27 29 31 dB
GVVoltage Gain Match 1 dB
EIN Input Noise Voltage RS = 50 (*)
RS = 10K (*)
RS = 50 (**)
RS = 10K (**)
1.5
2
2
2.7 7
µV
µV
µV
µV
BRIDGE
PoOutput Power d = 10%; RL = 4
d = 10%; RL = 3.2
d = 10%; VS = 13.2V
RL = 4
RL = 3.2
16 20
22
17.5
19
W
W
W
W
d Distortion Po = 0.1 to 10W; RL = 41%
V
OS Output Offset Voltage 250 mV
SVR Supply Voltage Rejection RS = 10K C3 = 22µF
f = 100Hz C3 = 100µF45 50
57 dB
RIInput Resistance 50 K
GVVoltage Gain 33 35 37 dB
EIN Input Noise Voltage RS = 50 (*)
RS = 10K (*)
RS = 50 (**)
RS = 10K (**)
2
2.5
2.7
3.2
µV
µV
µV
µV
(*) Curve A
(**) 22Hz to 22KHz
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Figure 1: STEREO Test and Appication Circuit
Figure 2: P.C. Board and Layout (STEREO) of the circuit of fig. 1 (1:1 scale)
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Figure 3: BRIDGE Test and Appication Circuit
Figure 4: P.C. Board and Layout (BRIDGE ) of the circuit of fig. 3 ( 1:1 scale)
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RECOMMENDED VALUES OF THE EXTERNAL COMPONENTS (ref to the Stereo Test and Applica-
tion Circuit)
Component Recommended
Value Purpose Larger than the Recomm.
Value Smaller than the Recomm.
Value
C1 0.22µF Input
Decoupling
(CH1) ——
C2 0.22µF Input
Decoupling
(CH2) ——
C3 100µF Supply Voltage
Rejection
Filtering
Capacitor
Longer Turn-On Delay Time Worse Supply Voltage Rejection.
Shorter Turn-On Delay Time
Danger of Noise (POP)
C4 22µF Stand-By
ON/OFF Delay Delayed Turn-Off by Stand-By
Switch Danger of Noise (POP)
C5 220µF (min) Supply By-Pass Danger of Oscillations
C6 100nF (min) Supply By-Pass Danger of Oscillations
C7 2200µF Output
Decoupling
CH2
- Decrease of Low Frequency Cut Off
- Longer Turn On Delay - In cre ase of Low Fre que ncy Cut Off
- Sh ort er Tur n O n De la y
Figure 5: Output Power vs. Supply Voltage
(Stereo) Figure 6: Output Power vs. Supply Voltage
(Stereo)
Figure 8: Output Power vs. Supply Voltage
(Bridge)
Figure 7: Output Power vs. Supply Voltage
(Stereo)
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Figur e 1 1 : Di sto r ti on v s Outpu t Po w er ( Ste r e o) Figure 1 2: Distor tion vs Output Power (Stereo)
Figure 9: Output Power vs. Supply Voltage
(Bridge) F igure 10: Drain Current vs Supply Voltage
(Stereo)
Figur e 1 3 : Di sto r ti on v s Outpu t Po w er ( Ste r e o) Figure 14: Dis torti on vs Ou tpu t Po w er (Br idge )
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Figure 17: SVR vs. Frequency & CSVR; (Bridge) F igure 18: SVR vs. Frequency & CSVR; (Br idge)
Figure 15: SVR vs. Frequency & CSVR (Stereo) Figure 16: SVR vs. Frequency & CSVR; (Stereo)
Figure 19: Cros stalk vs. Frequency (St ereo) Figure 20: Power Dissipation & Efficiency vs.
Output Power (Stereo)
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AMPLIFIER ORGANIZATION
The T DA7350 has been developed t aking care of
the key concepts of the modern power audio am-
plifier for car radio such as: space and costs sav-
ing due to the minimized external count, excellent
electrical performances, flexibility in use, superior
reliability thanks to a built-in array of protections.
As a result the following performances has been
achieved:
NO NEED OF BOOTSTRAP CAPACITORS
EVEN AT THE HIGHEST OUTPUT POWER
LEVELS
ABSOLUTE STABILITY WITHOUT EXTER-
NAL COMPENSATION THANKS TO THE IN-
NOVATIVE OUT STAGE CONFIGURATION,
ALSO ALLOWING INTERNALLY FIXED
CLOSED LOOP LOWER THAN COMPETI-
TORS
LOW GAIN (30dB STEREO FIXED WITHOUT
ANY EXTERNAL COMPONENTS) IN ORDER
TO MINIMIZE THE OUTPUT NOISE AND OP-
TIMIZE SVR
SILENT MUTE/ST-BY FUNCTION FEATUR-
ING ABSENCE OF POP ON/OFF NOISE
HIGH SVR
STEREO/BRIDGE OPERATION WITHOUT
ADDITION OF EXTERNAL COMPONENT
AC/DC SHORT CIRCUIT PROTECTION (TO
GND, TO VS, ACROSS THE LOAD)
LOUDSPEAKER PROT ECTION
DUMP PROTE CTION
BLOCK DE SCRIP TION
Polarization
The device is organized with the g ain res istors di-
rectly connected to the signal gr ound pin i.e. wit h-
out gain capacitors (fig. 24).
The non inver ting inputs of t he am plifiers ar e c on-
nected to the SVR pin by means of resistor divid-
ers, equal to the feedback networks. This allows
the outputs to track the SVR pin which is suffi-
ciently slow to avoid audible turn-on and turn-off
transients.
SVR
The voltage ripple on the outputs is equal to the
one on SVR pin: with appropriate selection of
CSVR, more than 55dB of ripple rejection can be
obtained.
Delayed Turn-on (muting)
The CSVR sets a signal turn-on delay too. A circuit
is included which mutes the device until the volt-
age on SVR pin reaches ~2.5V typ. (fig. 25). The
mute function is obtained by duplicating the input
differential pair (fig. 26): it can be switched to the
signal source or to an internal mute input. This
feature is necessary to prevent transients at the
inputs reaching the loudspeaker(s) immediately
after power-on).
Figure 21: Power Dissipation & Efficiency vs.
Output Power (Stereo)
Figure 22: Power Dissipation & Efficiency vs.
Output Power (Bridge)
Figure 23: Power Dissipation & Efficiency v s.
Output Power (Bridge)
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Fig. 25 represents the detailed turn-on transient
with reference to the stereo configuration.
At the power- on the output decoupling capacitors
are charged through an internal path but the de-
vice itself remains switched off (Phase 1 of the
represented diagram).
When the out puts r each the vo ltage level of about
1V (this means that there is no presence of short
circuits) the device switches on, the SVR capaci-
tor star ts charging itself and the output trac ks ex-
actly the SVR pin.
During this phase the device is muted until the
SVR reaches the "Play" threshold (~2.5V typ.), af-
ter that the music signal starts being played.
Stereo/Bridge Switching
There i s also no need for external components for
changing from stereo to brid ge configuration (figg.
24-27). A simple short circuit between two pins al-
lows phase reversal at one output, yet maintain-
ing the quiescent output voltage.
Stand-by
The device is also equipped with a stand-by func-
tion, so that a low current, and hence low cost
switch, can be used for turn on/off.
Stability
The device is provided with an internal compen-
sation wich allows to reach low values of closed
loop gain.
In this way better performances on S/N ratio and
SVR can be obtained.
Figure 24: Bloc k Diagram; Stereo Configuration
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Figure 25: Turn-on Delay Circuit
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Figure 26: Mute Funct ion Diagram
Figure 27: Bloc k Diagram; Bridge Configuration
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OUTPUT STAGE
Poor current capability and low cutoff frequency
are well known limits of the standard lateral PNP.
Composite PNP-NPN power output stages have
been widely used, regardless their high s aturation
drop. This drop can be overcome only at the ex-
pense of external components, namely, the boot-
strap capacitors. The availability of 4A isolated
collector PNP (ICV PNP) adds versatility to the
design. The performance of this component, in
terms of gain, VCEsat and cut-off frequency, is
shown in fig. 28, 29, 30 respectively. It is realized
in a new bipolar technology, characterized by top-
bottom isolation techniques, allowing the imple-
mentation of low leakage diodes, too. It guaran-
tees BVCEO > 20V and BVCBO > 50V both for
NPN and PNP transistors. Basically, the connec-
tion shown in fig . 31 has been chosen. First of all
because its voltage swing is rail-to-rail, limited
only by the VCEsat of the output transistors,
which are in the range of 0.3 each. Then, the
gain VOUT/VIN is greater than unity, approxi-
mately 1+R2/R1. (VCC/2 is fixed by an auxiliary
amplifier common to both channel). It is possible,
controlling the amount of this local feedback, to
force the loop gain (A . β) t o les s than unity at fre-
quencies for which the phase shift is 180°. This
means that the output buffer is intrinsically stable
and not prone to os cillation.
In contrast, with the circuit of fig. 32, the solution
adopted to reduce the gain at high frequencies is
the use of an external RC network.
AMPLIFIE R BLOCK DIAGRAM
The block diagram of each voltage amplifier is
shown in fig. 33. Regardless of production
spread, the current in each f inal stage is kept low,
with enough margin on the minimum, below which
cross-over distortion would appear.
Figure 28: ICV - PNP Gain vs. IC
Figure 29: ICV - PNP VCE(sat) vs. IC
Figure 30: ICV - PNP cut -off frequency vs. IC
Figure 31: The New Output Stage
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BUILT-IN PROTECTION SYSTEMS
Sho rt C ir c uit Pr o t ect io n
The maximum current the device can deliver can
be calculated by considering the voltage that may
be present at the terminals of a car radio amplifier
and the minimum load im pedance.
Apart from consideration concerning the area of
the power transistors it is not difficult to achieve
peak currents of this magnitude (5A peak).
However, it becomes more complicated if AC and
DC short circuit protection is also required.In par-
ticular,with a protection circuit which limits the
output current following the SOA curve of t he out-
put transistors it is possible that in some condi-
tions ( highly reactive loads, for example) the pro-
tection circuit may intervene during normal
operation. For this reason each amplifier has
been equipped with a protection circuit that inter-
venes when the output current exceeds 4A.
Fig 34 shows the protection circuit for an NPN
power transistor (a symmetrical circuit applies to
PNP).The VBE of the power is monitored and
gives out a signal,available through a cascode.
This cascode is used to avoid the intervention of
the short circuit protection when the saturation is
below a given limit.
The signal sets a flip-flop which forces the amplifier
outputs into a high impedance state.
In case of DC short circuit when the short circuit
is removed the flip-flop is reset and restarts the
circuit (fig. 38). In case of AC short circuit or load
shorted in Bridge configuration, the device is con-
tinuously switched in ON/OFF conditions and the
current is limited.
Figure 33: Amplifier Block Diagram
Figure 32: A Clas sical Output S tage
Figure 34: Circuitry for Short Circuit Detection
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Load Dump Voltage Surge
The TDA 7350 has a circuit which enables it to
withstand a voltage pulse train on pin 9, of the
type shown in fig. 36.
If the supply voltage peaks to more than 40V,
then an LC filter must be inserted between the
supply and pin 9, in order to assure that the
pulses at pin 9 will be held within the limits
shown.
A suggested LC network is shown in fig. 35.
With this network, a train of pulses wit h amplitude
up to 120V and width of 2ms can be applied at
point A. This type of protection is ON when the
supply voltage (pulse or DC) exceeds 18V. For
this reason the maximum operating supply volt-
age is 18V.
Polarity Inversio n
High current (up to 10A) can be handled by the
device with no damage for a longer period than
the blow-out time of a quick 2A fuse (normally
connected in series with the supply). This fea-
tures is added to avoid des truc tion, if during fitting
to the car, a mistake on the connection of the
supply is made.
Open Ground
When the radio is in the ON condition and the
ground is accidentally opened, a standard audio
amplifier will be damaged. On the TDA7350 pro-
tection diodes are included to avoid any damage.
DC Voltage
The maximum operating DC voltage for the
TDA7350 is 18V.
However the device can withstand a DC voltage
up to 28V with no dam age. This could occur dur-
ing winter if two batteries are series connected to
crank the engine.
Thermal Shut-down
The presence of a thermal limiting circuit offers
the following adva ntages:
1)an overload on the out put (even if it is perma-
nent), or an excessive ambient temperature
can be easily withstood.
2)the heatsink can have a smaller factor of
safety compared with that of a conventional
circuit. There is no device damage in the case
of excessive junction temperature: all hap-
pens is t hat Po (and t herefor e Ptot) and Id are
reduced.
The maximum allowable power dissipation de-
pends upon the size of the external heatsink (i.e.
its thermal resistance); Fig. 37 shows the dissi-
pable power as a function of am bient t emperature
for different thermal resist anc e.
Loudspeaker Protection
The TDA7350 guarantees safe operations even
for the loudspeaker in case of accidental shortcir-
cuit.
Whenever a single OUT to GND, OUT to VS short
circuit occurs both the outputs are switched OFF
so limiting dangerous DC current flowing through
the loudspeaker.
Figure 35
Figure 36 Figure 37: Maximum Allowable Power
Dissipation vs. Ambient Temperature
Figure 38: Restart Circuit
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APPLICATI ON HINTS
This section explains briefly how to get the best
from the TDA7350 and presents some applicat ion
circuits with suggestions for the value of the com-
ponents.These values can change depending on
the characteristics that the designer of the car ra-
dio wants t o obtain,or other parts of the car radio
that are connected to the audio block.
To optimize the perform ance of the audio part it is
useful ( or indispensable) to analyze also the par ts
outside this block that can have an interconnec-
tion with the amplifier.
This method can provide components and system
cost saving.
Reducing Turn On-Off Pop
The TDA7350 has been designed in a way that
the turn on(off) transients are controlled through
the charge(discharge) of the Csvr capacitor.
As a result of it, the turn on(off) transient spec-
trum contents is limited only to the subsonic
range.The following section gives some brief
notes to get the best from this design feature(it
will refer mainly to the stereo application which
appears to be in most cases the more critical from
the pop viewpoint.The bridge connection in
fact,due to the common mode waveform at the
output s,does not give pop effect).
TURN-ON
Fig 39 shows the output waveform (before and
after the "A" weighting filter) compared to the
value of Csvr.
Better pop-on performance is obtained with
higher Csvr values (the recommended range is
from 22uF to 220uF) .
The t urn-on delay (during which the amplifier is in
mute condition) is a function essentially of : Cout ,
Csvr .
Being: T1 120 Cout
T2 1200 Csvr
The turn-on delay is given by:
T1+T2 STEREO
T2 BRIDGE
The best performance is obtained by driving the
st-by pin with a ramp having a slope slower than
2V/ms
Figure 39:
a) Csvr = 22 µF
b) Csvr = 47 µF
c) Csvr = 100 µF
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TURN-OFF
A turn-off pop can occur if the st-by pin goes low
with a short time constant (this can occur if other
car radio sections, preamplifiers,radio.. are sup-
plied through the s ame st-by switch).
This pop is due to the fast switch-off of the inter-
nal current generator of the amplif ier.
If the voltage present across the load becomes
rapidly zero (due to the fast switch off) a small
pop occurs, depending also on Cout,Rload.
The parameters that set the switch off time con-
stant of the st-by pin are:
the st- by capacitor (Cst- by)
the SVR capacitor (Csvr)
resistors connected from st-by pin to ground
(Rext)
The time constant is given by :
T Csvr 2000 // Rext + Cst-by 2500 // Rext
The suggested time constants are :
T > 120ms with Cout=1000µF,RL = 4ohm,stereo
T > 170ms with Cout=2200µF,RL = 4ohm,stereo
If Rext is too low the Csvr can become too high
and a different approach may be useful (see next
section).
Figg 40, 41 show some types of electronic
switches (µP compatible) suitable for supplying
the st-by pin (it is important that Qsw is able to
saturate with VCE 150mV).
Also for turn off pop the bridge configura tion is su-
perior, in particular the st-by pin can go low faster.
GLOBAL APPROACH TO SOLVING POP
PROBLEM BY USING THE MUTING/TURN ON
DELAY FUNCT ION
In the real case tur n-on and turn-off pop problems
are generated not only by the power amplif ier,but
also (very often) by preamplifiers,tone controls,r a-
dios etc. and transmitted by the power amplifier to
the loudspeaker.
A simple approach t o solving these problems is to
use the mute characteristics of t he TDA7350.
If the SVR pin is at a voltage below 1.5 V, the
mute attenuation (typ)is 30dB .The amplifier is in
play mode when Vs vr overcomes 3.5 V.
With the circuit of fig 42 we can mute the amplifier
for a time Ton after switch-on and for a time Toff
after switch-off.During t his period the circuitry that
precedes the power amplifier can produce spuri-
ous spikes that are not transmitted to the loud-
speaker. This can giv e back a very simple design
of this circuitry from the pop point of view.
A timing diagram of this circuit is illustrated in fig
43. Other advantages of this circuit are:
- A reduced time constant allowance of stand-by
pin turn off.Consequently it is possible to drive all
the car-radio with the signal that drives this pin.
-A better turn-off noise with signal on the output.
To drive two stereo amplifiers with this circuit it is
possible to use the circuit of fig 44.
Figure 40
Figure 41
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Figure 42
Figure 43
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BAL ANC E IN PU T IN BR IDGE C ON F IGU R AT ION
A helpful characteristic of the TDA7350 is that,in
bridge configuration, a signal present on both the
input capacitors is amplified by the same amount
and it is present in phase at the outputs,so this
signal does not produce effects on the load.The
typical value of CMRR is 46 dB.
Looking at fig 45, we can see that a noise signal
from the ground of the power amplifier to the
ground of the hypothetical preamplifier is ampli-
fied of a factor equal to the gain of the amplifier
(2 Gv) .
Using a configuration of fig. 46 the same ground
noise is present at the output multiplied by the
factor 2 Gv/200.
This means less distortion,less noise (e.g. motor
cassette noise ) and/or a simplification of the lay-
out of PC board.
The only limitation of this balanced input is the
maximum amplitude of common mode signals
(few tens of millivolt) to avoid a loss of output
power due to the common mode signal on the
output, but in a large number of cases this signal
is within this range.
HIGH GAIN ,LOW NOISE APPLICATION
The following section describes a flexible pream-
plifier having the purpose to increase the gain of
the TDA7350.
Figure 45
Figure 46
Figure 44
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A two transistor network (fig. 47) has been
adopted whose components can be changed in
order to achieve the desired gain without affecting
the good performances of the audio amplifier itself.
The recommended values for 40 dB overall gain
are :
Resistance Stereo Bridge
R1
R2
R3
R4
10K
4.3K
10K
50K
10KW
16K
24K
50K
Figure 47
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Multiwatt11 V
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 5 0.197
B 2.65 0.104
C 1.6 0.063
D 1 0.039
E 0.49 0.55 0.019 0.022
F 0.88 0.95 0.035 0.037
G 1.45 1.7 1.95 0.057 0.067 0.077
G1 16.75 17 17.25 0.659 0.669 0.679
H1 19.6 0.772
H2 20.2 0.795
L 21.9 22.2 22.5 0.862 0.874 0.886
L1 21.7 22.1 22.5 0.854 0.87 0.886
L2 17.4 18.1 0.685 0.713
L3 17.25 17.5 17.75 0.679 0.689 0.699
L4 10.3 10.7 10.9 0.406 0.421 0.429
L7 2.65 2.9 0.104 0.114
M 4.25 4.55 4.85 0.167 0.179 0.191
M1 4.73 5.08 5.43 0.186 0.200 0.214
S 1.9 2.6 0.075 0.102
S1 1.9 2.6 0.075 0.102
Dia1 3.65 3.85 0.144 0.152
OUTLINE AND
MECHANICAL DATA
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