This is information on a product in full production.
December 2013 DocID14174 Rev 13 1/25
VNI4140K
Quad high-side smart power solid-state relay
Datasheet
-
production data
Features
•Output current: 0.7 A per channel
•Shorted load protections
•Junction overtemperature prote ction
•Case overtemp er ature pr otecti on for therm al
independence of the channels
•Thermal case shutdown restart not
simultaneous for the various channels
•Protection against loss of ground
•Current limitation
•Undervoltage shutdown
•Open drain diagnostic outputs
•3.3 V CMOS/TTL compatible inputs
•Fast demagnetization of inductive loads
•Conforms to IEC 61131- 2
•ESD according to IEC 61000-4-2 up to +/-
25 kV
Description
The VNI4140K is a monolithic device made using
STMicroelectronics VIPower technology , intended
to drive four independent resistive or inductive
loads with one side connected to ground. Active
current limitation avoids dropping the system
power supply in case of shorted load. Built-in
thermal shutdown protects the chip from
overtemperature and short-circuit. In overload
conditions, channel turns OFF and back ON
automatically so to maintain junction temperature
between T
TSD
and T
R
. If
this condition makes
case temperature reach T
CSD
, overloaded
channel is turned OFF and restart only when case
temperature has decreased down to T
CR
. In case
of more than one channel in overload, restart of
the overloaded channels is not simultaneous, in
order to avoid high peak current from the supply.
Non-overloaded channels continue operating
normally. The open drain diagnostics outputs
indicate overtemperature conditions.
Figure 1. Block diagram
Type V
demag(1)
1. Per channel.
R
DS(on)(1)
I
out(1)
V
CC
VNI4140K V
CC
-41 V 0.08 Ω0.7 A 41 V
PowerSSO-24
GIPD0611130956LM
www.st.com
Contents VNI4140K
2/25 DocID14174 Rev 13
Contents
1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6 Switching waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7 Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
8 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
8.1 VNI4140K thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
9 Reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
10 Demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
11 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
12 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
DocID14174 Rev 13 3/25
VNI4140K Pin connection
25
1 Pin connection
Figure 2. Pin connection (top v iew)
Table 1. Pin description
Pin Name Description
Tab TAB Exposed tab internally connected to V
cc
1V
CC
Supply voltage
2 IN1 Channel 1 input 3.3 V CMOS/TTL compatible
3 STAT1 Channel 1 status in open drain configuration
4 IN2 Channel 2 input 3.3 V CMOS/TTL compatible
5 STA2 Channel 2 status in open drain configuration
6 GND Device ground connection
7 STAT3 Channel 3 status in open drain configuration
8 IN3 Channel 3 input 3.3 V CMOS/TTL compatible
9 STAT4 Channel 4 status in open drain configuration
10 IN4 Channel 4 input 3.3 V CMOS/TTL compatible
11 NC
12 NC
13 OUT4 Channel 4 power stage output, internally protected
14 OUT4 Channel 4 power stage output, internally protected
15 OUT4 Channel 4 power stage output, internally protected
16 OUT3 Channel 3 power stage output, internally protected
17 OUT3 Channel 3 power stage output, internally protected
OUT1
OUT1
OUT1
OUT2
OUT2
OUT2
VCC
IN1
STAT1
IN2
STAT2
GND OUT3
OUT3
OUT3
OUT4
OUT4
OUT4
STAT3
IN3
STAT4
NC
NC
IN4
Pin connect ion VNI4140K
4/25 DocID14174 Rev 13
Pin Name Description
18 OUT3 Channel 3 power stage output, internally protected
19 OUT2 Channel 2 power stage output, internally protected
20 OUT2 Channel 2 power stage output, internally protected
21 OUT2 Channel 2 power stage output, internally protected
22 OUT1 Channel 1 power stage output, internally protected
23 OUT1 Channel 1 power stage output, internally protected
24 OUT1 Channel 1 power stage output, internally protected
Table 1. Pin description (continued)
DocID14174 Rev 13 5/25
VNI4140K Maximum ratings
25
2 Maximum ratings
2.1 Thermal data
Table 2. Abso lute maximum ratings
Symbol Parameter Value Unit
V
CC
Power supply voltage 41 V
-V
CC
Reverse sup pl y volt age -0.3 V
I
GND
DC ground reverse current -250 mA
I
OUT
Output cur r ent (co nti nuo us) Inter nal ly limit ed A
I
R
Reverse outp ut curr ent (per ch ann el) -5 A
I
IN
Input current (per channel) ± 10 mA
V
IN
Input voltage +V
CC
V
V
STAT
Status pin voltage +V
CC
V
I
STAT
Status pin current ± 10 mA
V
ESD
Electrostatic discharge (R = 1.5 kΩ; C = 100 pF) 2000 V
E
AS
I
OUT
= 500 mA T
AMB
= 125 °C 5 J
P
TOT
Power dissipation at T
c
= 25 °C Internally limited W
T
J
Junction operating temperature Internally limited °C
T
STG
Storage temperature -55 to 150 °C
Table 3. Thermal data
Symbol Parameter Value Unit
R
th(JC)
Thermal res is t anc e jun cti on- cas e
(1)
1. Per channel.
Max. 2 °C/W
R
th(JA)
Thermal res is t anc e jun cti on-ambie nt Max. s ee Figure 11 °C/W
Electrical characteristics VNI4140K
6/25 DocID14174 Rev 13
3 Electrical characteristics
10.5 V < V
CC
< 36 V; -40 °C < T
J
< 125 °C; unless otherwise specified
V
CC
= 24 V; -40 °C < T
J
< 125 °C, R
L
= 48 Ω, input rise time < 0.1 µs
Table 4. Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
cc
Supply voltage 10.5 36 V
R
DS(on)
On-state res istance I
OUT
= 0.5 A at T
J
= 25 °C
I
OUT
= 0.5 A 0.080
0.140 Ω
Ω
V
clamp
I
s
= 20 mA 41 45 52 V
I
S
Supply current All channels in OFF state
ON state with V
IN
= 5 V
(T
J
= 125 °C)
250
2.4 4 µA
mA
I
LGND
Output current at turn-
off V
CC
= V
STAT
= V
IN
= V
GND
=
24 V, V
OUT
= 0 V 1mA
V
OUT(OFF)
Off state output
voltage V
IN
= 0 V and I
OUT
= 0 A 1 V
I
OUT(OFF)
Off state output
current V
IN
= V
OUT
= 0 V 0 5 µA
F
CP
Charge pump
frequency Channel in ON state
(1)
1. To cover EN55022 class A and class B normative.
1450 kHz
Table 5. Switching
Symbol Parameter Min. Typ. Max. Unit
t
d
(ON)
Turn on delay - 20 - µs
t
r
Rise time - 10 - µs
t
d
(OFF)
Turn off - 30 - µs
t
f
Fall time - 8 - µs
dV/dt
(ON)
Turn on volt ag e slo pe - 3 - V/µs
dV/dt
(OFF)
Turn of f volt a ge slope - 4 - V/µs
DocID14174 Rev 13 7/25
VNI4140K Electri cal chara ct er ist ics
25
Table 6. Logical input
Symbol Parameter Test condition Min. Typ. Max. Unit
V
IL
Input low level voltage 0.8 V
V
IH
Input high level voltage 2.20 V
V
I(HYST)
Input hysteresis
voltage 0.15 V
I
IN
Input current V
IN
= 15 V 10 μΑ
V
IN
= 36 V 210
Table 7. Protection and diagnostic
Symbol Parameter Test condition s Min. Typ. Max. Unit
V
STAT
Status voltage
output low I
STAT
= 1.6 mA 0.6 V
V
USD
Undervoltage
protection 7 10.5 V
V
USDHYS
Undervoltage
hysteresis 0.4 0.5 V
I
LIM
DC short-circuit
current V
CC
= 24 V; R
LOAD
< 10 mΩ0.7 1 1.7 A
I
PEAK
Maxi mu m D C
output
current Dynamic load 1.3 A
HYST Tracking limits 0.2 A
I
LSTAT
Status leakage
current V
CC
= V
STAT
= 36 V 30 μΑ
T
TSD
Junction shutdown
temperature 150 170 190 °C
T
R
Junction reset
temperature 135 °C
T
HYST
Junction thermal
hysteresis 715 °C
T
CSD
Case shutdown
temperature 125 130 135 °C
T
CR
Case reset
temperature 110 °C
T
CHYST
Case thermal
hysteresis 715 °C
V
demag
Output voltage at
turn-off I
OUT
= 0.5 A; L
LOAD
>= 1 mH V
CC
-41 V
CC
-45 V
CC
-52 V
Electrical characteristics VNI4140K
8/25 DocID14174 Rev 13
Fig ure 3. Current and voltage conventions
GIPD0611131000LM
DocID14174 Rev 13 9/25
VNI4140K Truth table
25
4 Truth table
5 Typical application circuit
Figure 4. Typical application circuit
Table 8.Truth table
Condition INPUTn OUTPUTn STATUSn
Normal operation L
HL
HH
H
Overtemperature L
HL
LH
L
Undervoltage L
HL
LX
X
Shorted load
(current limitation) L
HL
XH
H
GIPD0611131009LM
Typical application circuit VNI4140K
10/25 DocID14174 Rev 13
Figure 5. Thermal behavior
NO
Tj ( i ) > Tt s d
Vi n( i ) = H
OUT(i) Off
STAT(i) On (L)
Tc > Tc s d
NO
YES
NOYES
Tc > Tc r
YES
NO
Tj(i) > Tjr
YES
STAT(i) Off (H)
OUT(i) On
1)
4)
2)
3)
GIPD0611131015LM
DocID14174 Rev 13 11/25
VNI4140K Switching waveforms
25
6 Switching waveforms
Figure 6. Switching waveforms
GIPD0611131025LM
Pin functions VNI4140K
12/25 DocID14174 Rev 13
7 Pin functions
Figure 7. Input circuit
Figure 8. Status circuit
GIPD0611131030LM
GIPD0611131035LM
DocID14174 Rev 13 13/25
VNI4140K Pin functions
25
Figure 9. Charge pump switching frequency (typical) vs. temperature
GIPD0611131040LM
Package and PC board thermal data VNI4140K
14/25 DocID14174 Rev 13
8 Package and PC board thermal data
8.1 VNI4140K thermal data
Figure 10. VNI4140K PC board
Note: Layout condition of R
th
and Z
th
measurements (PCB: double layer, thermal vias, FR4
area =77 mm x 86 mm, PCB thickness =1.6 mm, Cu thickness = 70 mm (front and back
side), copper areas: from minimum pad layout to 8 cm
2
).
Figure 11. R
th(JA)
vs. PCB copper area in open box free air condition (one channel ON)
DocID14174 Rev 13 15/25
VNI4140K Package and PC board thermal data
25
Figure 12. VNI4140K thermal impedance junction ambient single pulse
(one channel on)
Reverse polarity protection VNI4140K
16/25 DocID14174 Rev 13
9 Reverse polarity protection
Reverse polarity protection can be implemented on board using two different solutions:
1. Placing a resisto r (R
GND
) between IC GND pin and load GND
2. Placing a diode between IC GND pin and load GND
If option 1 is selected, the minimum resistance value has to be selected according to the
following equation:
Equation 1
R
GND
≥
V
CC
/I
GND
where I
GND
is the DC reverse ground pin current and can be found in Section 2: Maximum
ratings of this datasheet.
Power dissipated by R
GND
(when V
CC
< 0: during reverse polarity situations) is:
Equation 2
PD = (V
CC
)
2
/R
GND
If option 2 is selected, the diode has to be chosen by taking into account VRRM >|V
cc
| and
its power dissipation capability:
Equation 3
P
D
≥
I
S
*V
f
Note: In normal conditions (no reverse polarity) due to the diode, there is a voltage drop between
GND of the device and GND of the system.
Figure 13. Reverse polarity protection
This schematic can be used with any type of load.
DocID14174 Rev 13 17/25
VNI4140K Demagnetization energy
25
10 Demagnetization energy
Figure 14. Maximum demagnetization energy vs. load current, typical values
0.10
0.60
1.10
1.60
2.10
2.60
3.10
3.60
4.10
4.60
5.10
0.1 0.3 0.5 0.7 0.9 1.1
Single channel
demagnetization
Four channels
demagnetization
Iout (A)
Eoff (J)
T
amb=
125 °C
GIPD0511130116LM
Package mechanical data VNI4140K
18/25 DocID14174 Rev 13
11 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
Table 9. PowerSSO-24 mechanical data
Symbol mm
Min. Typ. Max.
A 2.15 2.47
A2 2.15 2.40
a1 0 0.075
b 0.33 0.51
c 0.23 0.32
D 10.10 10.50
E 7.4 7.6
e 0.8
e3 8.8
G 0.1
G1 0.06
H 10.1 10.5
h 0.4
L 0.55 0.85
N 10deg
X 4.1 4.7
Y 6.5 7.1
DocID14174 Rev 13 19/25
VNI4140K Package mechanical data
25
Figure 15. PowerSSO-24 package dimensions
Figure 16. PowerSSO-24 tube shipment (no suffix)
Note: All dimensions are in mm.
Table 10. PowerSSO-24 tube shipment
Base quantity 49
Bulk quantity 1225
Tube length (± 0.5) 532
A 3.5
B 13.8
C (± 0.1) 0.6
Package mechanical data VNI4140K
20/25 DocID14174 Rev 13
Figure 17. PowerSSO-24 reel shipment (suffix “TR”)
Table 11. PowerSSO-24 reel dimensions
Base quantity 1000
Bulk quantity 1000
A (max.) 330
B (min.) 1.5
C (± 0.2) 13
F 20.2
G (2 ± 0) 24.4
N (min.) 100
T (max.) 30.4
DocID14174 Rev 13 21/25
VNI4140K Package mechanical data
25
Figure 18. PowerSSO-24™ tape dimensions
Note: According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986
Table 12. PowerSSO-24™ tape dimensions
Tape width W 24
Tape hole spacing P0 (± 0.1) 4
Compon ent spacing P 12
Hole diameter D (± 0.05) 1.55
Hole diameter D1 (min.) 1.5
Hole position F (± 0.1) 11.5
Comp artm ent depth K (max.) 2.85
Hole spacing P1 (± 0.1) 2
Package mechanical data VNI4140K
22/25 DocID14174 Rev 13
Figure 19. VN14140k suggested footprint
Note: STMicroelectronics is not responsible for any PCB related issues. The footprint shown in the
above figure is a suggestion which might not be in line to the customer PCB supplier design
rules.
All dimensions are in m m.
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DocID14174 Rev 13 23/25
VNI4140K Ordering information
25
12 Ordering information
Table 13. Order code
Order code Package Packaging
VNI4140K PowerSSO-24 Tube
VNI4140KTR PowerSSO-24 Tape and reel
Revision history VNI4140K
24/25 DocID14174 Rev 13
13 Revision history
Table 14. Document revision history
Date Revision Changes
16-Nov-2007 1 Initial release.
26-Nov-2007 2 Updated electrical parameters values.
08-Jul-2008 3 Inserted: Figure 4 on page 9 and Section 9: Reverse
polarit y prote cti on on p ag e 16.
08-Apr-2008 4 Added I
LGND
parameter in Table 4 on page 6.
27-Aug-2009 5 Updated Section 9: Reverse polarity protection.
09-Dec-2009 6 Added Section 10: Conformity to IEC 61000-4-2 ESD
immunity test.
15-Apr-2010 7 Updated Table 5 on page 6.
06-Feb-2012 8
Inserted feature: conformity to IEC 61000-4-2 ESD
immunity test in cover p ag e.
Removed chapter: conformity to IEC 61000-4-2 ESD
immunity test.
05-Mar-2012 9 Suggested foo tpri nt inserted .
In Table 4 parameter I
LGND
has been added.
19-Mar-2012 10 Minor tex t chan ges .
20-Dec-2012 11 Operating temperature range extended.
06-Nov-2013 12 Updated E
AS
value in Table 2: Absolute maximum ratings .
Added Figure 14.
11-Dec-2013 13 Updated Section 9.
DocID14174 Rev 13 25/25
VNI4140K
25
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