VNI4140K Quad high-side smart power solid-state relay Datasheet - production data * Open drain diagnostic outputs * 3.3 V CMOS/TTL compatible inputs * Fast demagnetization of inductive loads * Conforms to IEC 61131-2 * ESD according to IEC 61000-4-2 up to +/25 kV PowerSSO-24 Description Features Type Vdemag(1) RDS(on)(1) VNI4140K VCC-41 V 0.08 Iout(1) VCC 0.7 A 41 V 1. Per channel. * Output current: 0.7 A per channel * Shorted load protections * Junction overtemperature protection * Case overtemperature protection for thermal independence of the channels * Thermal case shutdown restart not simultaneous for the various channels * Protection against loss of ground * Current limitation * Undervoltage shutdown The VNI4140K is a monolithic device made using STMicroelectronics VIPower technology, intended to drive four independent resistive or inductive loads with one side connected to ground. Active current limitation avoids dropping the system power supply in case of shorted load. Built-in thermal shutdown protects the chip from overtemperature and short-circuit. In overload conditions, channel turns OFF and back ON automatically so to maintain junction temperature between TTSD and TR. If this condition makes case temperature reach TCSD, overloaded channel is turned OFF and restart only when case temperature has decreased down to TCR. In case of more than one channel in overload, restart of the overloaded channels is not simultaneous, in order to avoid high peak current from the supply. Non-overloaded channels continue operating normally. The open drain diagnostics outputs indicate overtemperature conditions. Figure 1. Block diagram GIPD0611130956LM December 2013 This is information on a product in full production. DocID14174 Rev 13 1/25 www.st.com Contents VNI4140K Contents 1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6 Switching waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7 Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8.1 VNI4140K thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 9 Reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 10 Demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 11 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 12 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 2/25 DocID14174 Rev 13 VNI4140K 1 Pin connection Pin connection Figure 2. Pin connection (top view) OUT1 OUT1 OUT1 OUT2 OUT2 OUT2 OUT3 OUT3 OUT3 OUT4 OUT4 OUT4 VCC IN1 STAT1 IN2 STAT2 GND STAT3 IN3 STAT4 IN4 NC NC Table 1. Pin description Pin Name Description Tab TAB Exposed tab internally connected to Vcc 1 VCC Supply voltage 2 IN1 Channel 1 input 3.3 V CMOS/TTL compatible 3 STAT1 Channel 1 status in open drain configuration 4 IN2 Channel 2 input 3.3 V CMOS/TTL compatible 5 STA2 Channel 2 status in open drain configuration 6 GND Device ground connection 7 STAT3 Channel 3 status in open drain configuration 8 IN3 Channel 3 input 3.3 V CMOS/TTL compatible 9 STAT4 Channel 4 status in open drain configuration 10 IN4 Channel 4 input 3.3 V CMOS/TTL compatible 11 NC 12 NC 13 OUT4 Channel 4 power stage output, internally protected 14 OUT4 Channel 4 power stage output, internally protected 15 OUT4 Channel 4 power stage output, internally protected 16 OUT3 Channel 3 power stage output, internally protected 17 OUT3 Channel 3 power stage output, internally protected DocID14174 Rev 13 3/25 25 Pin connection VNI4140K Table 1. Pin description (continued) 4/25 Pin Name Description 18 OUT3 Channel 3 power stage output, internally protected 19 OUT2 Channel 2 power stage output, internally protected 20 OUT2 Channel 2 power stage output, internally protected 21 OUT2 Channel 2 power stage output, internally protected 22 OUT1 Channel 1 power stage output, internally protected 23 OUT1 Channel 1 power stage output, internally protected 24 OUT1 Channel 1 power stage output, internally protected DocID14174 Rev 13 VNI4140K 2 Maximum ratings Maximum ratings Table 2. Absolute maximum ratings Symbol Value Unit 41 V VCC Power supply voltage -VCC Reverse supply voltage -0.3 V IGND DC ground reverse current -250 mA IOUT Output current (continuous) Internally limited A -5 A IR Reverse output current (per channel) IIN Input current (per channel) 10 mA VIN Input voltage +VCC V VSTAT Status pin voltage +VCC V ISTAT Status pin current 10 mA VESD Electrostatic discharge (R = 1.5 k; C = 100 pF) 2000 V EAS IOUT = 500 mA TAMB = 125 C 5 J PTOT Power dissipation at Tc = 25 C Internally limited W TJ Junction operating temperature Internally limited C -55 to 150 C TSTG 2.1 Parameter Storage temperature Thermal data Table 3. Thermal data Symbol Parameter Value Unit Rth(JC) Thermal resistance junction-case (1) Max. 2 C/W Rth(JA) Thermal resistance junction-ambient Max. see Figure 11 C/W 1. Per channel. DocID14174 Rev 13 5/25 25 Electrical characteristics 3 VNI4140K Electrical characteristics 10.5 V < VCC < 36 V; -40 C < TJ < 125 C; unless otherwise specified Table 4. Power section Symbol Max. Unit 36 V 0.080 0.140 52 V 4 A mA Output current at turn- VCC = VSTAT = VIN = VGND = off 24 V, VOUT = 0 V 1 mA VOUT(OFF) Off state output voltage VIN = 0 V and IOUT = 0 A 1 V IOUT(OFF) Off state output current VIN = VOUT = 0 V 5 A Charge pump frequency Channel in ON state (1) Vcc RDS(on) Parameter Supply voltage On-state resistance Vclamp IS FCP Min. Typ. 10.5 IOUT = 0.5 A at TJ = 25 C IOUT = 0.5 A Is = 20 mA Supply current ILGND Test conditions 41 45 All channels in OFF state ON state with VIN = 5 V (TJ = 125 C) 250 2.4 0 1450 kHz 1. To cover EN55022 class A and class B normative. VCC = 24 V; -40 C < TJ < 125 C, RL = 48 , input rise time < 0.1 s Table 5. Switching Symbol Min. Typ. Max. Unit Turn on delay - 20 - s Rise time - 10 - s td(OFF) Turn off - 30 - s tf Fall time - 8 - s dV/dt(ON) Turn on voltage slope - 3 - V/s dV/dt(OFF) Turn off voltage slope - 4 - V/s td(ON) tr 6/25 Parameter DocID14174 Rev 13 VNI4140K Electrical characteristics Table 6. Logical input Symbol Parameter VIL Input low level voltage VIH Input high level voltage VI(HYST) IIN Test condition Min. Typ. Max. Unit 0.8 V 2.20 Input hysteresis voltage V 0.15 Input current V VIN = 15 V 10 VIN = 36 V 210 Table 7. Protection and diagnostic Symbol Parameter Test conditions Min. Typ. VSTAT Status voltage output low VUSD Undervoltage protection 7 VUSDHYS Undervoltage hysteresis 0.4 0.5 0.7 1 ISTAT = 1.6 mA DC short-circuit current VCC = 24 V; RLOAD < 10 m IPEAK Maximum DC output current Dynamic load HYST Tracking limits ILSTAT Status leakage current TTSD Junction shutdown temperature 150 Junction reset temperature 135 ILIM TR VCC = VSTAT = 36 V 0.6 V 10.5 V V 1.7 A A 0.2 A 30 170 190 C C Junction thermal hysteresis 7 15 TCSD Case shutdown temperature 125 130 TCR Case reset temperature 110 TCHYST Case thermal hysteresis 7 Vdemag Output voltage at turn-off DocID14174 Rev 13 Unit 1.3 THYST IOUT = 0.5 A; LLOAD >= 1 mH VCC-41 Max. C 135 C C 15 VCC-45 C VCC-52 V 7/25 25 Electrical characteristics VNI4140K Figure 3. Current and voltage conventions GIPD0611131000LM 8/25 DocID14174 Rev 13 VNI4140K 4 Truth table Truth table Table 8.Truth table 5 Condition INPUTn OUTPUTn STATUSn Normal operation L H L H H H Overtemperature L H L L H L Undervoltage L H L L X X Shorted load (current limitation) L H L X H H Typical application circuit Figure 4. Typical application circuit GIPD0611131009LM DocID14174 Rev 13 9/25 25 Typical application circuit VNI4140K Figure 5. Thermal behavior Vin(i) = H OUT(i) On STAT(i) Off (H) 1) NO YES Tj(i) >Ttsd OUT(i) Off STAT(i) On (L) YES 4) YES NO Tc >Tcsd NO Tc >Tcr 2) NO YES Tj(i) > Tjr 3) 10/25 DocID14174 Rev 13 GIPD0611131015LM VNI4140K 6 Switching waveforms Switching waveforms Figure 6. Switching waveforms GIPD0611131025LM DocID14174 Rev 13 11/25 25 Pin functions 7 VNI4140K Pin functions Figure 7. Input circuit GIPD0611131030LM Figure 8. Status circuit GIPD0611131035LM 12/25 DocID14174 Rev 13 VNI4140K Pin functions Figure 9. Charge pump switching frequency (typical) vs. temperature GIPD0611131040LM DocID14174 Rev 13 13/25 25 Package and PC board thermal data VNI4140K 8 Package and PC board thermal data 8.1 VNI4140K thermal data Figure 10. VNI4140K PC board Note: Layout condition of Rth and Zth measurements (PCB: double layer, thermal vias, FR4 area =77 mm x 86 mm, PCB thickness =1.6 mm, Cu thickness = 70 mm (front and back side), copper areas: from minimum pad layout to 8 cm2). Figure 11. Rth(JA) vs. PCB copper area in open box free air condition (one channel ON) 14/25 DocID14174 Rev 13 VNI4140K Package and PC board thermal data Figure 12. VNI4140K thermal impedance junction ambient single pulse (one channel on) DocID14174 Rev 13 15/25 25 Reverse polarity protection 9 VNI4140K Reverse polarity protection Reverse polarity protection can be implemented on board using two different solutions: 1. Placing a resistor (RGND) between IC GND pin and load GND 2. Placing a diode between IC GND pin and load GND If option 1 is selected, the minimum resistance value has to be selected according to the following equation: Equation 1 RGND VCC/IGND where IGND is the DC reverse ground pin current and can be found in Section 2: Maximum ratings of this datasheet. Power dissipated by RGND (when VCC < 0: during reverse polarity situations) is: Equation 2 PD = (VCC)2/RGND If option 2 is selected, the diode has to be chosen by taking into account VRRM >|Vcc| and its power dissipation capability: Equation 3 PD IS*Vf Note: In normal conditions (no reverse polarity) due to the diode, there is a voltage drop between GND of the device and GND of the system. Figure 13. Reverse polarity protection + Vcc Inputi Outputi Statusi GND Load RGND This schematic can be used with any type of load. 16/25 DocID14174 Rev 13 Diode VNI4140K Demagnetization energy Figure 14. Maximum demagnetization energy vs. load current, typical values 5.10 Tamb= 125 C 4.60 4.10 Single channel demagnetization 3.60 Four channels demagnetization 3.10 2.60 2.10 Eoff (J) 10 Demagnetization energy 1.60 1.10 0.60 0.10 0.1 0.3 0.5 0.7 0.9 Iout (A) DocID14174 Rev 13 1.1 GIPD0511130116LM 17/25 25 Package mechanical data 11 VNI4140K Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. Table 9. PowerSSO-24 mechanical data mm Symbol Min. Max. A 2.15 2.47 A2 2.15 2.40 a1 0 0.075 b 0.33 0.51 c 0.23 0.32 D 10.10 10.50 E 7.4 7.6 e 0.8 e3 8.8 G 0.1 G1 0.06 H 10.1 h L 10.5 0.4 0.55 N 18/25 Typ. 0.85 10deg X 4.1 4.7 Y 6.5 7.1 DocID14174 Rev 13 VNI4140K Package mechanical data Figure 15. PowerSSO-24 package dimensions Figure 16. PowerSSO-24 tube shipment (no suffix) Table 10. PowerSSO-24 tube shipment Note: Base quantity 49 Bulk quantity 1225 Tube length ( 0.5) 532 A 3.5 B 13.8 C ( 0.1) 0.6 All dimensions are in mm. DocID14174 Rev 13 19/25 25 Package mechanical data VNI4140K Figure 17. PowerSSO-24 reel shipment (suffix "TR") Table 11. PowerSSO-24 reel dimensions 20/25 Base quantity 1000 Bulk quantity 1000 A (max.) 330 B (min.) 1.5 C ( 0.2) 13 F 20.2 G (2 0) 24.4 N (min.) 100 T (max.) 30.4 DocID14174 Rev 13 VNI4140K Package mechanical data Figure 18. PowerSSO-24TM tape dimensions Table 12. PowerSSO-24TM tape dimensions Note: Tape width W 24 Tape hole spacing P0 ( 0.1) 4 Component spacing P 12 Hole diameter D ( 0.05) 1.55 Hole diameter D1 (min.) 1.5 Hole position F ( 0.1) 11.5 Compartment depth K (max.) 2.85 Hole spacing P1 ( 0.1) 2 According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 DocID14174 Rev 13 21/25 25 Package mechanical data VNI4140K Figure 19. VN14140k suggested footprint 5 Note: 6ROGHU0DVN2SHQLQJ STMicroelectronics is not responsible for any PCB related issues. The footprint shown in the above figure is a suggestion which might not be in line to the customer PCB supplier design rules. All dimensions are in mm. 22/25 DocID14174 Rev 13 VNI4140K 12 Ordering information Ordering information Table 13. Order code Order code Package Packaging VNI4140K PowerSSO-24 Tube VNI4140KTR PowerSSO-24 Tape and reel DocID14174 Rev 13 23/25 25 Revision history 13 VNI4140K Revision history Table 14. Document revision history 24/25 Date Revision Changes 16-Nov-2007 1 Initial release. 26-Nov-2007 2 Updated electrical parameters values. 08-Jul-2008 3 Inserted: Figure 4 on page 9 and Section 9: Reverse polarity protection on page 16. 08-Apr-2008 4 Added ILGND parameter in Table 4 on page 6. 27-Aug-2009 5 Updated Section 9: Reverse polarity protection. 09-Dec-2009 6 Added Section 10: Conformity to IEC 61000-4-2 ESD immunity test. 15-Apr-2010 7 Updated Table 5 on page 6. 06-Feb-2012 8 Inserted feature: conformity to IEC 61000-4-2 ESD immunity test in cover page. Removed chapter: conformity to IEC 61000-4-2 ESD immunity test. 05-Mar-2012 9 Suggested footprint inserted. In Table 4 parameter ILGND has been added. 19-Mar-2012 10 Minor text changes. 20-Dec-2012 11 Operating temperature range extended. 06-Nov-2013 12 Updated EAS value in Table 2: Absolute maximum ratings. Added Figure 14. 11-Dec-2013 13 Updated Section 9. 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