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FEATURES
1
2
3
4
5
10
9
8
7
6
VO1
IN1–
IN1+
BYPASS
GND
VDD
VO2
IN2–
IN2+
SHUTDOWN
DGQ PACKAGE
(TOP VIEW)
DESCRIPTION
TYPICAL APPLICATION CIRCUIT
Right In
(Differential)
Bias
Control
10
1
9
5
VO1
VO2
VDD
2
4
7
IN1–
BYPASS
VDD/2
Ci
Ri
Ri
325 kΩ325 kΩ
C(B)
C(S)
Ci
RiIN2+
Rf
VDD
From
Shutdown
Control Circuit
–
+
–
+
C(C)
C(C)
3IN1+
Ci
Ri
SHUTDOWN
Rf
8
Ci
RiIN2–
Rf
6
–
+
+
–
Left In
(Differential)
TPA6112A2
SLOS342A – DECEMBER 2000 – REVISED SEPTEMBER 2004
150-mW STEREO AUDIO POWER AMPLIFIER
•150 mW Stereo Output•Differential Inputs•PC Power Supply Compatible– Fully Specified for 3.3 V and 5 V Operation– Operation to 2.5 V•Pop Reduction Circuitry•Internal Mid-Rail Generation•Thermal and Short-Circuit Protection•Surface-Mount Packaging– PowerPAD™ MSOP
The TPA6112A2 is a stereo audio power amplifier with differential inputs packaged in a 10-pin PowerPAD MSOPpackage capable of delivering 150 mW of continuous RMS power per channel into 16- Ωloads. Amplifier gain isexternally configured by means of two resistors per input channel and does not require external compensation forsettings of 1 to 10.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2000–2004, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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DESCRIPTION (CONTINUED)
ABSOLUTE MAXIMUM RATINGS
TPA6112A2
SLOS342A – DECEMBER 2000 – REVISED SEPTEMBER 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the deviceplaced in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
THD+N when driving an 16- Ωload from 5 V is 0.03% at 1 kHz, and less than 1% across the audio band of 20 Hzto 20 kHz. For 32- Ωloads, the THD+N is reduced to less than 0.02% at 1 kHz, and is less than 1% across theaudio band of 20 Hz to 20 kHz. For 10-k Ωloads, the THD+N performance is 0.005% at 1 kHz, and less than0.5% across the audio band of 20 Hz to 20 kHz.
AVAILABLE OPTIONS
PACKAGED DEVICET
A
MSOP SYMBOLIZATIONMSOP
(1)
-40 °C to 85 °C TPA6112A2DGQ TI APD
(1) The DGQ package isavailable in left-ended tape and reel only (e.g., TPA6112A2DGQR).
Terminal Functions
TERMINAL
I/O DESCRIPTIONNAME NO
BYPASS 4 I Tap to voltage divider for internal mid-supply bias supply. Connect to a 0.1 µF to 1 µF low ESR capacitorfor best performance.GND 5 I GND is the ground connection.IN1- 2 I IN1- is the negative input for channel 1.IN1+ 3 I IN1+ is the positive input for channel 1.IN2- 8 I IN2- is the negative input for channel 2.IN2+ 7 I IN2+ is the positive input for channel 2.SHUTDOWN 6 I Puts the device in a low quiescent current mode when held high.V
DD
10 I V
DD
is the supply voltage terminal.V
O
1 1 O V
O
1 is the audio output for channel 1.V
O
2 9 O V
O
2 is the audio output for channel 2.
over operating free-air temperature (unless otherwise noted
(1)
)
UNITS
V
DD
Supply voltage 6 VV
I
Input voltage -0.3 V to V
DD
+ 0.3 VContinuous total power dissipation internally limitedT
J
Operating junction temperature range -40 °C to 150 °CT
stg
Storage temperature range -65 °C to 150 °CLead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 °C
(1) Stresses beyond thoselisted under absolute maximum ratings may cause permanent damage to the device.These are stress ratingsonly, and functional operation of the device at theseor any other conditions beyond those indicated under recommendedoperatingconditions is not implied. Exposure to absolute-maximum-rated conditions forextended periods may affect device reliability.
2
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DISSIPATION RATING TABLE
RECOMMENDED OPERATING CONDITIONS
DC ELECTRICAL CHARACTERISTICS
AC OPERATING CHARACTERISTICS
DC ELECTRICAL CHARACTERISTICS
TPA6112A2
SLOS342A – DECEMBER 2000 – REVISED SEPTEMBER 2004
T
A
≤25 °C DERATING FACTOR T
A
= 70 °C T
A
= 85 °CPACKAGE
POWER RATING ABOVE T
A
= 25 °C POWER RATING POWER RATING
DGQ 2.14 W
(1)
17.1 mW/ °C 1.37 W 1.11 W
(1) Please see the Texas Instrumentsdocument, PowerPAD Thermally EnhancedPackage ApplicationReport (literature number SLMA002), for moreinformation on the PowerPAD package. The thermaldata was measured on a PCBlayout based on the information in the section entitled TexasInstruments Recommended Board forPowerPAD on page 33 of the before mentioneddocument.
MIN MAX UNIT
V
DD
Supply voltage 2.5 5.5 VT
A
Operating free-air temperature -40 85 °CV
IH
, (SHUTDOWN) High-level input voltage 60% x V
DD
VV
IL
, (SHUTDOWN) Low-level input voltage 25% x V
DD
V
At T
A
= 25 °C, V
DD
= 2.5 V (Unless Otherwise Noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
OO
Output offset voltage A
V
= 2 V/V 15 mVPSRR Power supply rejection ratio V
DD
= 3.2 V to 3.4 V 83 dBI
DD
Supply current SHUTDOWN = 0 V 1.5 3 mAI
DD(SD)
Supply current in SHUTDOWN mode SHUTDOWN = V
DD
10 50 µAZ
i
Input impedance >1 M Ω
V
DD
= 3.3 V, T
A
= 25 °C, R
L
= 16 Ω
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
P
O
Output power (each channel) THD ≤0.1%, f = 1 kHz 60 mWTHD+N Total harmonic distortion + noise P
O
= 40 mW, 20 - 20 kHz 0.4%B
OM
Maximum output power BW G = 10, THD < 5% > 20 kHzPhase margin Open loop 96 °Supply ripple rejection ratio f = 1 kHz 71 dBChannel/channel output separation f = 1 kHz 89 dBSNR Signal-to-noise ratio P
O
= 50 mW, A
V
= 1 100 dBV
n
Noise output voltage A
V
= 1 11 µV(rms)
At T
A
= 25 °C, V
DD
= 5 .5 V (Unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
OO
Output offset voltage A
V
= 2 V/V 15 mVPSRR Power supply rejection ratio V
DD
= 4.9 V to 5.1 V 76 dBI
DD
Supply current SHUTDOWN = 0 V 1.5 3 mAI
DD(SD)
Supply current in SHUTDOWN mode SHUTDOWN = V
DD
60 100 µA|I
IH
| High-level input current (SHUTDOWN) V
DD
= 5.5 V, V
I
= V
DD
1 µA|I
IL
| Low-level input current (SHUTDOWN) V
DD
= 5.5 V, V
I
= 0 V 1 µAZ
i
Input impedance >1 M Ω
3
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AC OPERATING CHARACTERISTICS
AC OPERATING CHARACTERISTICS
AC OPERATING CHARACTERISTICS
TPA6112A2
SLOS342A – DECEMBER 2000 – REVISED SEPTEMBER 2004
V
DD
= 5 V, T
A
= 25 °C, R
L
= 16 Ω
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
P
O
Output power (each channel) THD ≤0.1%, f = 1 kHz 150 mWTHD+N Total harmonic distortion + noise P
O
= 100 mW, 20 - 20 kHz 0.6%B
OM
Maximum output power BW G = 10, THD < 5% > 20 kHzPhase margin Open loop 96 °Supply ripple rejection ratio f = 1 kHz 61 dBChannel/channel output separation f = 1 kHz 90 dBSNR Signal-to-noise ratio P
O
= 100 mW, A
V
= 1 100 dBV
n
Noise output voltage A
V
= 1 11.7 µV(rms)
V
DD
= 3.3 V, T
A
= 25 °C, R
L
= 32 Ω
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
P
O
Output power (each channel) THD ≤0.1%, f = 1 kHz 40 mWTHD+N Total harmonic distortion + noise P
O
= 30 mW, 20 - 20 kHz 0.4%B
OM
Maximum output power BW A
V
= 10, THD < 2% > 20 kHzPhase margin Open loop 96 °Supply ripple rejection ratio f = 1 kHz 71 dBChannel/channel output separation f = 1 kHz 95 dBSNR Signal-to-noise ratio P
O
= 40 mW, A
V
= 1 100 dBV
n
Noise output voltage A
V
= 1 11 µV(rms)
V
DD
= 5 V, T
A
= 25 °C, R
L
= 32 Ω
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
P
O
Output power (each channel) THD ≤0.1%, f = 1 kHz 90 mWTHD+N Total harmonic distortion + noise P
O
= 60 mW, 20 - 20 kHz 0.4%B
OM
Maximum output power BW A
V
= 10, THD < 2% > 20 kHzPhase margin Open loop 97 °Supply ripple rejection ratio f = 1 kHz 61 dBChannel/channel output separation f = 1 kHz 98 dBSNR Signal-to-noise ratio P
O
= 90 mW, A
V
= 1 100 dBV
n
Noise output voltage A
V
= 1 11.7 µV(rms)
4
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TYPICAL CHARACTERISTICS
0.001
10
0.01
0.1
1
20 20k100 1k 10k
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 3.3 V,
PO = 25 mW,
CB = 1 µF,
RL = 32 Ω,
AV = −1 V/V
10 100
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 3.3 V,
RL = 32 Ω,
AV = −1 V/V,
CB = 1 µF
50
PO − Output Power − mW
20 Hz
1 kHz
20 kHz
TPA6112A2
SLOS342A – DECEMBER 2000 – REVISED SEPTEMBER 2004
Table of Graphs
FIGURE
vs Frequency 1, 3, 5, 6, 7, 9, 11, 13,THD+N Total harmonic distortion plus noise
vs Output power 2, 4, 8, 10, 12, 14Supply ripple rejection ratio vs Frequency 15, 16V
n
Output noise voltage vs Frequency 17, 18Crosstalk vs Frequency 19 - 24Shutdown attenuation vs Frequency 25, 26Open-loop gain and phase margin vs Frequency 27, 28Output power vs Load resistance 29, 30,I
DD
Supply current vs Supply voltage 31SNR Signal-to-noise ratio vs Voltage gain 32Power dissipation/amplifier vs Load power 33, 34
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISEvs vsFREQUENCY OUTPUT POWER
Figure 1. Figure 2.
5
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20 20k100 1k 10k
0.001
10
0.01
0.05
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 5 V,
PO = 60 mW,
CB = 1 µF,
RL = 32 Ω,
AV = −1 V/V AV = −5 V/V
AV = −10 V/V
10 500
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 5 V,
RL = 32 Ω,
AV = −1 V/V,
CB = 1 µF
100
PO − Output Power − mW
1 kHz
20 Hz
20 kHz
20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 3.3 V,
PO = 100 mW,
CB = 1 µF,
RL = 10 kΩ,
AV = −1 V/V
AV = −10 V/V
AV = −1 V/V
AV = −5 V/V
20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 5 V,
PO = 100 mW,
CB = 1 µF,
RL = 10 kΩ
TPA6112A2
SLOS342A – DECEMBER 2000 – REVISED SEPTEMBER 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISEvs vsFREQUENCY OUTPUT POWER
Figure 3. Figure 4.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISEvs vsFREQUENCY FREQUENCY
Figure 5. Figure 6.
6
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20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 3.3 V,
PO = 60 mW,
CB = 1 µF,
RL = 8 Ω,
AV = −1 V/V
10 500
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 3.3 V,
RL = 8 Ω,
AV = −1 V/V,
CB = 1 µF
100
PO − Output Power − mW
1 kHz
20 Hz
20 kHz
20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 5 V,
PO = 150 mW,
CB = 1 µF,
RL = 8 Ω
AV = −10 V/V
AV = −1 V/V AV = −5 V/V
10 500
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 5 V,
RL = 8 Ω,
AV = −1 V/V,
CB = 1 µF
PO − Output Power − mW
1 kHz
20 kHz
100
20 Hz
TPA6112A2
SLOS342A – DECEMBER 2000 – REVISED SEPTEMBER 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISEvs vsFREQUENCY OUTPUT POWER
Figure 7. Figure 8.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISEvs vsFREQUENCY OUTPUT POWER
Figure 9. Figure 10.
7
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20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 3.3 V,
PO = 40 mW,
CB = 1 µF,
RL = 16 Ω,
AV = −1 V/V
10 500
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 3.3 V,
RL =16 Ω,
AV = −1 V/V,
CB = 1 µF
PO − Output Power − mW
1 kHz
20 kHz
100
20 Hz
10 500
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 5 V,
RL = 16 Ω,
AV = −1 V/V,
CB = 1 µF
PO − Output Power − mW
1 kHz
20 Hz
20 kHz
100
TPA6112A2
SLOS342A – DECEMBER 2000 – REVISED SEPTEMBER 2004
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISEvs vsFREQUENCY OUTPUT POWER
Figure 11. Figure 12.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISEvs vsFREQUENCY OUTPUT POWER
Figure 13. Figure 14.
8
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−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
VDD = 3.3 V,
RL = 16 Ω,
AV = −1 V/V
0.1 µF
− Supply Ripple Rejection Ratio − dB
0.47 µF
1 µF
KSVR
Bypass = 1.65 V
− Supply Ripple Rejection Ratio − dBK SVR
−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
VDD = 5 V,
RL = 16 Ω,
AV = −1 V/V
0.1 µF
Bypass = 2.5 V
1 µF
0.47 µF
100
10
120 20k100 1k 10k
f − Frequency − Hz
VDD = 5 V,
BW = 10 Hz to 22 kHz
RL = 16 Ω
AV = −1 V/V
AV = −10 V/V
− Output Noise Voltage −
VnVµ(RMS)
TPA6112A2
SLOS342A – DECEMBER 2000 – REVISED SEPTEMBER 2004
SUPPLY RIPPLE REJECTION RATIO SUPPLY RIPPLE REJECTION RATIOvs vsFREQUENCY FREQUENCY
Figure 15. Figure 16.
OUTPUT NOISE VOLTAGE OUTPUT NOISE VOLTAGEvs vsFREQUENCY FREQUENCY
Figure 17. Figure 18.
9
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20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 5 V,
PO = 150 mW,
CB = 1 µF,
RL = 8 kΩ
AV = −10 V/V
AV = −1 V/V AV = −5 V/V
−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
Crosstalk − dB
IN1− to VO2
IN2− to VO1
VDD = 3.3 V,
PO = 60 mW,
CB = 1 µF,
RL = 8 Ω,
AV = −1 V/V
−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
Crosstalk − dB
VDD = 5 V,
PO = 60 mW,
CB = 1 µF,
RL = 32 Ω,
AV = −1 V/V
IN1− to VO2
IN2− to VO1
TPA6112A2
SLOS342A – DECEMBER 2000 – REVISED SEPTEMBER 2004
CROSSTALK CROSSTALKvs vsFREQUENCY FREQUENCY
Figure 19. Figure 20.
CROSSTALK CROSSTALKvs vsFREQUENCY FREQUENCY
Figure 21. Figure 22.
10
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−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
10 100 1 k 10 k 20 k
Shutdown Attenuation − dB
f − Frequency − Hz
VDD = 3.3 V,
RL = 16 Ω,
CB = 1 µF
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
10 100 1 k 10 k 20 k
Shutdown Attenuation − dB
f − Frequency − Hz
VDD = 5 V,
RL = 16 Ω,
CB = 1 µF
TPA6112A2
SLOS342A – DECEMBER 2000 – REVISED SEPTEMBER 2004
CROSSTALK CROSSTALKvs vsFREQUENCY FREQUENCY
Figure 23. Figure 24.
SHUTDOWN ATTENUATION SHUTDOWN ATTENUATIONvs vsFREQUENCY FREQUENCY
Figure 25. Figure 26.
11
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−40
−20
0
20
40
60
80
100
120
Open-Loop Gain − dB
− Phase Margin − Deg
1 k 10 k 100 k 1 M 10 M
−180
−150
−120
−90
−60
−30
0
30
60
90
120
150
180
f − Frequency − Hz
Phase
Gain
VDD = 3.3 V
RL = 10 kΩ
Φm
−40
−20
0
20
40
60
80
100
120
1 k 10 k 100 k 1 M 10 M
−180
−150
−120
−90
−60
−30
0
30
60
90
120
150
180
Open-Loop Gain − dB
f − Frequency − Hz
Phase
Gain
VDD = 5 V
RL = 10 kΩ
− Phase Margin − DegΦm
50
25
08 12 16 20 32 36 40
75
100
45 52 56 64
− Output Power − mW
RL − Load Resistance − Ω
VDD = 3.3 V,
THD+N = 1%,
AV = −1 V/V
24 28 44 60
PO
0
50
100
150
200
250
8 12 16 20 24 28 32 36 40 44 48 52 56 60 64
RL − Load Resistance − Ω
VDD = 5 V,
THD+N = 1%,
AV = −1 V/V
− Output Power − mWPO
TPA6112A2
SLOS342A – DECEMBER 2000 – REVISED SEPTEMBER 2004
OPEN-LOOP GAIN AND PHASE MARGIN OPEN-LOOP GAIN AND PHASE MARGINvs vsFREQUENCY FREQUENCY
Figure 27. Figure 28.
OUTPUT POWER OUTPUT POWERvs vsLOAD RESISTANCE LOAD RESISTANCE
Figure 29. Figure 30.
12
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0
0.5
1
1.5
2
2.5
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
− Supply Current − mAIDD
VDD − Supply Voltage − V
0
20
40
60
80
100
120
12345678910
SNR − Signal-to-Noise Ratio − dB
AV − Voltage Gain − V/V
VDD = 5 V
0
Power Dissipation/Amplifier − mW
Load Power − mW
80
40
20
080 120 180 200
10
30
50
14010020 6040 160
60
70
VDD = 3.3 V 8 Ω
16 Ω
64 Ω
32 Ω
0Load Power − mW
180
100
60
080 120 180 200
40
80
120
14010020 6040 160
140
160 VDD = 5 V 8 Ω
16 Ω
64 Ω
32 Ω
20
Power Dissipation/Amplifier − mW
TPA6112A2
SLOS342A – DECEMBER 2000 – REVISED SEPTEMBER 2004
SUPPLY CURRENT SIGNAL-TO-NOISE RATIOvs vsSUPPLY VOLTAGE VOLTAGE GAIN
Figure 31. Figure 32.
POWER DISSIPATION/AMPLIFIER POWER DISSIPATION/AMPLIFIERvs vsLOAD POWER LOAD POWER
Figure 33. Figure 34.
13
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APPLICATION INFORMATION
GAIN SETTING RESISTORS, R
f
and R
i
fc(highpass) 1
2RiCi
(4)
Gain Rf
Ri
(1)
Ci1
2Rifc(highpass)
(5)
Effective Impedance RfRi
RfRi
(2)
POWER SUPPLY DECOUPLING, C
(S)
fc(lowpass) 1
2RfCF
(3)
INPUT CAPACITOR, C
i
TPA6112A2
SLOS342A – DECEMBER 2000 – REVISED SEPTEMBER 2004
The gain for the TPA6112A2 is set by resistors R
f
The value of C
i
directly affects the bass (low fre-and R
i
according to Equation 1 .
quency) performance of the circuit. Consider theexample where R
i
is 20 k Ωand the specification callsfor a flat bass response down to 20 Hz. Equation 4 isreconfigured as Equation 5 .
Given that the TPA6112A2 is a MOS amplifier, theinput impedance is very high. Consequently inputleakage currents are not generally a concern. How-
In this example, C
i
is 0.40 µF, so one would likelyever, noise in the circuit increases as the value of R
f
choose a value in the range of 0.47 µF to 1 µF. Aincreases. In addition, a certain range of R
f
values is
further consideration for this capacitor is the leakagerequired for proper start-up operation of the amplifier.
path from the input source through the input networkConsidering these factors, it is recommended that the
formed by R
i
, C
i
, and the feedback resistor (R
f
) to theeffective impedance seen by the inverting node of the
load. This leakage current creates a dc offset voltageamplifier be set between 5 k Ωand 20 k Ω. The
at the input to the amplifier that reduces usefuleffective impedance is calculated using Equation 2 .
headroom, especially in high-gain applications (gain>10). For this reason a low-leakage tantalum orceramic capacitor is the best choice. When polarizedcapacitors are used, connect the positive side of thecapacitor to the amplifier input in most applications.For example, if the input resistance is 20 k Ωand the
The dc level there is held at V
DD
/2—likely higher thanfeedback resistor is 20 k Ω, the gain of the amplifier is
the source dc level. It is important to confirm the-1, and the effective impedance at the inverting
capacitor polarity in the application.terminal is 10 k Ω, a value within the recommendedrange.
For high performance applications, metal-film re-
The TPA6112A2 is a high-performance CMOS audiosistors are recommended because they tend to have
amplifier that requires adequate power-supply de-lower noise levels than carbon resistors. For values
coupling to minimize the output total harmonic distor-of R
f
above 50 k Ω, the amplifier tends to become
tion (THD). Power-supply decoupling also preventsunstable due to a pole formed from R
f
and the
oscillations when long lead lengths are used betweeninherent input capacitance of the MOS input struc-
the amplifier and the speaker. The optimum decoup-ture. For this reason, a small compensation capacitor
ling is achieved by using two capacitors of differentof approximately 5 pF should be placed in parallel
types that target different types of noise on the powerwith R
f
. This, in effect, creates a low-pass filter
supply leads. For higher frequency transients, spikes,network with the cutoff frequency defined by
or digital hash on the line, a good low equival-Equation 3 .
ent-series-resistance (ESR) ceramic capacitor, typi-cally 0.1 µF, placed as close as possible to thedevice V
DD
lead, works best. For filteringlower-frequency noise signals, a larger aluminumFor example, if R
f
is 100 k Ωand C
F
is 5 pF then
electrolytic capacitor of 10 µF or greater placed nearf
c(lowpass)
is 318 kHz, which is well outside the audio
the power amplifier is recommended.range.
In the typical application, an input capacitor, C
i
, isrequired to allow the amplifier to bias the input signalto the proper dc level for optimum operation. In thiscase, C
i
and R
i
form a high-pass filter with the cornerfrequency determined in Equation 4 .
14
www.ti.com
MIDRAIL BYPASS CAPACITOR, C
(B)
1
C(B) 230 kΩ1
CiRi
(6)
1
C(B) 230 kΩ1
CiRi1
RLC(C)
(8)
USING LOW-ESR CAPACITORS
OUTPUT COUPLING CAPACITOR, C
(C)
5-V VERSUS 3.3-V OPERATION
fc1
2RLC(C)
(7)
TPA6112A2
SLOS342A – DECEMBER 2000 – REVISED SEPTEMBER 2004
Table 1. Common Load Impedances vs Low-Frequency Output Characteristics in SE ModeThe midrail bypass capacitor, C
(B)
, serves several
R
L
C
(C)
LOWEST FREQUENCYimportant functions. During start up, C
(B)
determines
32 Ω68 µF 73 Hzthe rate at which the amplifier starts up. This helps topush the start-up pop noise into the subaudible range
10,000 Ω68 µF 0.23 Hz(so low it can not be heard). The second function is to
47,000 Ω68 µF 0.05 Hzreduce noise produced by the power supply causedby coupling into the output drive signal. This noise is
As Table 1 indicates, headphone response is ad-from the midrail generation circuit internal to the
equate, and drive into line level inputs (a home stereoamplifier. The capacitor is fed from a 230-k Ωsource
for example) is very good.inside the amplifier. To keep the start-up pop as lowas possible, maintain the relationship shown in
The output coupling capacitor required inEquation 6 .
single-supply SE mode also places additional con-straints on the selection of other components in theamplifier circuit. With the rules described earlier stillvalid, add the following relationship:
Consider an example circuit where C
(B)
is 1 µF, C
i
is1 µF, and R
i
is 20 k Ω. Subsitituting these values intothe equation 9 results in: 6.25 ≤50 which satisfies therule. Bypass capacitor, C
(B)
, values of 0.1 µF to 1 µFceramic or tantalum low-ESR capacitors are rec-ommended for the best THD and noise performance.
Low-ESR capacitors are recommended throughoutthis application. A real capacitor can be modeledsimply as a resistor in series with an ideal capacitor.The voltage drop across this resistor minimizes theIn a typical single-supply, single-ended (SE) configur-
beneficial effects of the capacitor in the circuit. Theation, an output coupling capacitor (C
(C)
) is required
lower the equivalent value of this resistance, theto block the dc bias at the output of the amplifier, thus
more the real capacitor behaves like an ideal capaci-preventing dc currents in the load. As with the input
tor.coupling capacitor, the output coupling capacitor andimpedance of the load form a high-pass filtergoverned by Equation 7 .
The TPA6112A2 was designed for operation over asupply range of 2.5 V to 5.5 V. This data sheetprovides full specifications for 5-V and 3.3-V oper-ation, since these are considered to be the two mostThe main disadvantage, from a performance stand-
common supply voltages. There are no special con-point, is that the typically-small load impedance drives
siderations for 3.3-V versus 5-V operation as far asthe low-frequency corner higher. Large values of C
(C)
supply bypassing, gain setting, or stability. The mostare required to pass low frequencies into the load.
important consideration is that of output power. EachConsider the example where a C
(C)
of 68 µF is
amplifier in theTPA6112A2 can produce a maximumchosen and loads vary from 32 Ωto 47 k Ω. Table 1
voltage swing of V
DD
– 1 V. This means, for 3.3-Vsummarizes the frequency response characteristics
operation, clipping starts to occur when V
O(PP)
= 2.3 Vof each configuration.
as opposed when V
O(PP)
= 4 V while operating at 5 V.The reduced voltage swing subsequently reducesmaximum output power into the load before distortionbecomes significant.
15
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPA6112A2DGQ ACTIVE MSOP-
Power
PAD
DGQ 10 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPA6112A2DGQG4 ACTIVE MSOP-
Power
PAD
DGQ 10 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPA6112A2DGQR ACTIVE MSOP-
Power
PAD
DGQ 10 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPA6112A2DGQRG4 ACTIVE MSOP-
Power
PAD
DGQ 10 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 18-Jul-2006
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPA6112A2DGQR MSOP-
Power
PAD
DGQ 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TPA6112A2DGQR MSOP-
Power
PAD
DGQ 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 25-Apr-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPA6112A2DGQR MSOP-PowerPAD DGQ 10 2500 364.0 364.0 27.0
TPA6112A2DGQR MSOP-PowerPAD DGQ 10 2500 358.0 335.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 25-Apr-2012
Pack Materials-Page 2
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