OBSOLETE LM108AJAN www.ti.com SNOSAJ6C - FEBRUARY 2005 - REVISED APRIL 2013 LM108AJAN Operational Amplifiers Check for Samples: LM108AJAN FEATURES DESCRIPTION * The LM108 is a precision operational amplifier having specifications a factor of ten better than FET amplifiers over a -55C to +125C temperature range. 1 2 * * * Maximum Input Bias Current of 3.0 nA over Temperature Offset Current less than 400 pA over Temperature Supply Current of only 300 A, even in Saturation Ensured Drift Characteristics The devices operate with supply voltages from 2V to 20V and have sufficient supply rejection to use unregulated supplies. Although the circuit is interchangeable with, and uses the same compensation as the LM101A, an alternate compensation scheme can be used to make it particularly insensitive to power supply noise and to make supply bypass capacitors unnecessary. The low current error of the LM108 makes possible many designs that are not practical with conventional amplifiers. In fact, it operates from 10 M source resistances, introducing less error than devices such as the 709 with 10 k sources. Integrators with drifts less than 500 V/sec and analog time delays in excess of one hour can be made using capacitors no larger than 1 F. Connection Diagrams *Package is connected to Pin 4 (V-) **Unused pin (no internal connection) to allow for input anti-leakage guard ring on printed circuit board layout. Figure 1. Metal Can Package - TO-99 Package Number LMC Figure 2. Dual-In-Line Package (Top View) CDIP - Package Number NAB 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2005-2013, Texas Instruments Incorporated OBSOLETE LM108AJAN SNOSAJ6C - FEBRUARY 2005 - REVISED APRIL 2013 Figure 3. CDIP - Top View Package Number J www.ti.com Figure 4. CLGA Top View Package Number NAC, NAD Schematic Diagram 2 Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM108AJAN OBSOLETE LM108AJAN www.ti.com SNOSAJ6C - FEBRUARY 2005 - REVISED APRIL 2013 Compensation Circuits Standard Compensation Circuit Alternate Frequency Compensation **Bandwidth and slew rate are proportional to 1/CS Improves rejection of power supply noise by a factor of ten. CO = 30 pF **Bandwidth and slew rate are proportional to 1/Cf Feedforward Compensation These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM108AJAN 3 OBSOLETE LM108AJAN SNOSAJ6C - FEBRUARY 2005 - REVISED APRIL 2013 www.ti.com Absolute Maximum Ratings (1) Supply Voltage 22V Power Dissipation (2) TO-99 Metal Can 8LD 330mW @ +125C CDIP 14LD 400mW @ +125C CDIP 8LD 400mW @ +125C CLGA 10LD 330mW @ +125C Ceramic SOIC 10LD 330mW @ +125C Differential Input Current (3) 10 mA (4) 30V Differential Input Voltage Input Voltage (5) 20V Output Short-Circuit Duration Continuous -55C TA +125C Operating Temperature Range -65C TA +150C Storage Temperature Range TO-99 Metal Can 8LD Still Air 500LF / Min Air Flow JA Thermal Resistance JC CDIP 14LD Still Air 500LF / Min Air Flow 94C/W 55C/W CDIP 8LD Still Air 500LF / Min Air Flow 120C/W 68C/W CPACK 10LD Still Air 500LF / Min Air Flow 225C/W 142C/W Ceramic SOIC 10LD Still Air 500LF / Min Air Flow 225C/W 142C/W TO-99 Metal Can 8LD 38C/W CDIP 14LD 13C/W CDIP 8LD 17C/W CLGA 10LD 21C/W Ceramic SOIC 10LD 21C/W TO-99 Metal Can 8LD Package Weight (typical) 150C/W 86C/W 990mg CDIP 14LD 2,180mg CDIP 8LD 1,090mg CLGA 10LD 225mg Ceramic SOIC 10LD 210mg Maximum Junction Teperature 175C Lead Temperature (Soldering, 10 sec) 300C ESD Tolerance (1) (2) (3) (4) (5) (6) 4 (6) 2000V Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the Electrical Characteristics. The specified specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), JA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA) /JA or the number given in the Absolute Maximum Ratings, whichever is lower. The inputs are shunted with back-to-back diodes for over voltage protection. Therefore, excessive current will flow if a differential input voltage in excess of 1V is applied between the inputs unless some limiting resistance is used. This rating is 1.0V unless resistances of 2K or greater are inserted in series with the inputs to limit current in the input shunt diodes to the maximum allowable value. For supply voltages less than 20V, the absolute maximum input voltage is equal to the supply voltage. Human body model, 1.5 k in series with 100 pF. Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM108AJAN OBSOLETE LM108AJAN www.ti.com SNOSAJ6C - FEBRUARY 2005 - REVISED APRIL 2013 Table 1. Quality Conformance InspectionMil-Std-883, Method 5005 - Group A Subgroup Description Temp (C) 1 Static tests at +25C 2 Static tests at +125C 3 Static tests at -55C 4 Dynamic tests at +25C 5 Dynamic tests at +125C 6 Dynamic tests at -55C 7 Functional tests at +25C 8A Functional tests at +125C 8B Functional tests at -55C 9 Switching tests at +25C 10 Switching tests at +125C 11 Switching tests at -55C LM108A Electrical Characteristics DC Parameters The following conditions apply to all the following parameters, unless otherwise specified. DC: +VCC = +20V, -VCC = -20V, VCM = 0V, RS = 50 Symbol Parameter VIO Min Max Units Subgroups +VCC = 35V, -VCC = -5V, VCM = -15V -0.5 0.5 mV 1 -1 1 mV 2, 3 +VCC = 5V, -VCC = -35V, VCM = 15V -0.5 0.5 mV 1 -1 1 mV 2, 3 -0.5 0.5 mV 1 -1 1 mV 2, 3 -0.5 0.5 mV 1 Conditions Notes Input Offset Voltage +VCC = +5V, -VCC = -5V Delta VIO / Delta T Temperature Coeffient of Input Offset Voltage IIO -1 1 mV 2, 3 25C TA +125C See (1) -5 5 V/C 2 25C TA -55C See (1) -5 5 V/C 3 +VCC = 35V, -VCC = -5V, VCM = -15V -0.2 0.2 nA 1 -0.4 0.4 nA 2, 3 +VCC = 5V, -VCC = -35V, VCM = 15V -0.2 0.2 nA 1 -0.4 0.4 nA 2, 3 -0.2 0.2 nA 1 -0.4 0.4 nA 2, 3 -0.2 0.2 nA 1 Input Offset Current +VCC = +5V, -VCC = -5V Delta IIO / Delta T (1) Temperature Coeffient of Input Offset Current -0.4 0.4 nA 2, 3 25C TA +125C See (1) -2.5 2.5 pA/C 2 25C TA -55C See (1) -2.5 2.5 pA/C 3 Calculated parameter Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM108AJAN 5 OBSOLETE LM108AJAN SNOSAJ6C - FEBRUARY 2005 - REVISED APRIL 2013 www.ti.com LM108A Electrical Characteristics DC Parameters (continued) The following conditions apply to all the following parameters, unless otherwise specified. DC: +VCC = +20V, -VCC = -20V, VCM = 0V, RS = 50 Symbol Parameter Conditions Notes IIB +VCC = 35V, -VCC = -5V, VCM = -15V +VCC = 5V, -VCC = -35V, VCM = 15V Input Bias Current +VCC = +5V, -VCC = -5V Min Max Units Subgroups -0.1 2 nA 1 -1 2 nA 2 -0.1 3 nA 3 -0.1 2 nA 1 -1 2 nA 2 -0.1 3 nA 3 -0.1 2 nA 1 -1 2 nA 2 -0.1 3 nA 3 -0.1 2 nA 1 2 -1 2 nA -0.1 3 nA 3 +PSRR Power Supply Rejection Ratio +VCC = 10V, -VCC = -20V -16 16 V/V 1, 2, 3 -PSRR Power Supply Rejection Ratio +VCC = 20V, -VCC = -10V -16 16 V/V 1, 2, 3 CMRR Common Mode Rejection Ratio VCM = 15V 96 dB 1, 2, 3 +IOS Short Circuit Current +VCC = +15V, -VCC = -15V, t 25mS -20 mA 1, 2, 3 -IOS Short Circuit Current +VCC = +15V, -VCC = -15V, t 25mS 20 mA 1, 2, 3 Power Supply Current +VCC = +15V, -VCC = -15V 0.6 mA 1, 2 0.8 mA 3 +VOP Output Voltage Swing RL = 10K V 4, 5, 6 -VOP Output Voltage Swing RL = 10K V 4, 5, 6 ICC +AVS -AVS AVS (2) 6 Open Loop Voltage Gain RL = 10K, VO = +15V Open Loop Voltage Gain RL = 10K, VO = -15V Open Loop Voltage Gain +VCC = 5V, RL = 10K, VO = 2V 16 -16 See (2) 80 V/mV 4 (2) 40 V/mV 5, 6 See (2) 80 V/mV 4 See (2) 40 V/mV 5, 6 See (2) 20 V/mV 4, 5, 6 See Datalog reading in K = V/mV Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM108AJAN OBSOLETE LM108AJAN www.ti.com SNOSAJ6C - FEBRUARY 2005 - REVISED APRIL 2013 LM108A Electrical Characteristics AC Parameters The following conditions apply to all the following parameters, unless otherwise specified. AC +VCC = +20V, -VCC = -20V, VCM = 0V, RS = 50 Symbol Parameter Conditions Notes Min Max Units Subgroups TRTR Transient Response Rise Time RL = 10K, CL = 100pF, f < 1KHz, VI = +50mV 1000 nS 7, 8A, 8B TROS Transient Response Overshoot RL = 10K, CL = 100pF, f < 1KHz, VI = +50mV 50 % 7, 8A, 8B +SR Slew Rate AV = 1, VI = -5V to +5V 0.05 V/S 7, 8A, 8B -SR Slew Rate AV = 1, VI = +5V to -5V 0.05 V/S 7, 8A, 8B NIBB Noise Broadband BW = 10Hz to 5KHz, RS = 0 15 Vrms 7 NIPC Noise Popcorn BW = 10Hz to 5KHz, RS = 100K 40 Vpk 7 Min Max Units Subgroups LM108A Electrical Characteristics DC Parameters Drift Values The following conditions apply to all the following parameters, unless otherwise specified. DC +VCC = +20V, -VCC = -20V, VCM = 0V, RS = 50 Delta calculations performed on JAN S devices at group B, Subgroup 5 only. Symbol Parameter Conditions Notes VIO Input Offset Voltage -0.25 0.25 mV 1 IIB Input Bias Current -0.5 0.5 nA 1 Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM108AJAN 7 OBSOLETE LM108AJAN SNOSAJ6C - FEBRUARY 2005 - REVISED APRIL 2013 www.ti.com Typical Performance Characteristics 8 Input Currents Offset Error Figure 5. Figure 6. Drift Error Input Noise Voltage Figure 7. Figure 8. Power Supply Rejection Closed Loop Output Impedance Figure 9. Figure 10. Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM108AJAN OBSOLETE LM108AJAN www.ti.com SNOSAJ6C - FEBRUARY 2005 - REVISED APRIL 2013 Typical Performance Characteristics (continued) Voltage Gain Output Swing Figure 11. Figure 12. Supply Current Open Loop Frequency Response Figure 13. Figure 14. Large Signal Frequency Response Voltage Follower Pulse Response Figure 15. Figure 16. Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM108AJAN 9 OBSOLETE LM108AJAN SNOSAJ6C - FEBRUARY 2005 - REVISED APRIL 2013 www.ti.com Typical Applications Teflon polyethylene or polycarbonate dielectric capacitor Worst case drift less than 2.5 mV/sec Figure 17. Sample and Hold Figure 18. High Speed Amplifier with Low Drift and Low Input Current 10 Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM108AJAN OBSOLETE LM108AJAN www.ti.com SNOSAJ6C - FEBRUARY 2005 - REVISED APRIL 2013 *In addition to increasing speed, the LM101A raises high and low frequency gain, increases output drive capability and eliminates thermal feedback. Power Bandwidth: 250 KHzSmall Signal Bandwidth: 3.5 MHzSlew Rate: 10V/S Figure 19. Fast Summing Amplifier Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM108AJAN 11 OBSOLETE LM108AJAN SNOSAJ6C - FEBRUARY 2005 - REVISED APRIL 2013 www.ti.com REVISION HISTORY Date Released Revision Section Changes 02/25/05 A New release, corporate format 1 MDS data sheets converted into one Corp. datasheet format. MJLM108A-X Rev 2A0. MDS will be archived. 01/05/06 B DC Electrical's All temps. +Ios from -15 mA Min to -20 mA Min and Ios from +15 mA Max to +20 mA Max 09/24/10 C Obsolete Data Sheet Revision C, End of Life on Product/NSID Dec. 2008/09 Obsolete Data Sheet Changes from Revision B (April 2013) to Revision C * 12 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 11 Submit Documentation Feedback Copyright (c) 2005-2013, Texas Instruments Incorporated Product Folder Links: LM108AJAN IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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