2N7002KFN3 60V N-Channel Enhancement Mode MOSFET - ESD Protected Unit : inch(mm) DFN 3L FEATURES 0.042(1.05) 0.037(0.95) * RDS(ON), VGS@10V,IDS@500mA=3 0.026(0.65) 0.021(0.55) * RDS(ON), VGS@4.5V,IDS@200mA=4 * Advanced Trench Process Technology * High Density Cell Design For Ultra Low On-Resistance 0.0 22 (0.55) 0.047(0.45) * Very Low Leakage Current In Off Condition * Specially Designed for Battery Operated Systems, Solid-State Relays Drivers : Relays, Displays, Lamps, Solenoids, Memories, etc. 0.002(0.05) MAX. * ESD Protected 2KV HBM * Case: DFN 3L Package 0.013(0.32) 0.008(0.22) 0.0 14 (0.20) 0.022(0.55) 0.047(0.45) MECHANICALDATA 0.014(0.36) * Terminals : Solderable per MIL-STD-750,Method 2026 * Marking : AU 0.004(0.10) 0.013(0.32) 0.008(0.22) 0.0 08 (0.20) 0.004(0.10) 0.0 08 (0.20) * In compliance with EU RoHS 2002/95/EC directives 2 3 1 Maximum RATINGS and Thermal Characteristics (TA=25OC unless otherwise noted ) PA RA M E TE R S ym b o l Li mi t Uni ts D ra i n-S o urc e Vo lta g e V DS 60 V G a te -S o ur c e Vo lta g e V GS +2 0 V ID 11 5 mA ID M 800 mA PD 200 150 mW O p e r a ti ng J unc ti o n a nd S to r a g e Te m p e ra tur e Ra ng e T J ,T S TG -5 5 to + 1 5 0 Junction-to Ambient Thermal Resistance(PCB mounted)2 RJA 883 C o nti nuo us D ra i n C urr e nt P uls e d D r a i n C urr e nt 1) O M a xi m um P o we r D i s s i p a ti o n T A =2 5 C T A =7 5 O C O O C C /W Note: 1. Maximum DC current limited by the package 2. Surface mounted on FR4 board, t < 5 sec PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE September 03.2010-REV.00 PAGE . 1 2N7002KFN3 ELECTRICALCHARACTERISTICS P a ra m e te r S ym b o l Te s t C o nd i ti o n M i n. Typ . M a x. Uni ts D ra i n-S o urc e B re a k d o wn Vo lta g e B V DSS V GS =0 V, ID =1 0 A 60 - - V G a te Thre s ho ld Vo lta g e V GS ( th) V D S =V GS , ID =2 5 0 A 1 - 2 .5 V R D S ( o n) VGS=4.5V, I D=200mA - - 4 .0 R D S ( o n) VGS=10V, I D=500mA - - 3.0 ID S S VDS=60V, VGS=0V - - 1 A Gate Body Leakage I GS S V GS =+2 0 V, V D S =0 V - - +1 0 A Forward Transconductance g fS V D S = 1 5 V, I D = 2 5 0 m A 100 - - mS To ta l Ga te C ha r g e Qg V D S = 1 5 V, I D = 2 0 0 m A VGS=4.5V - - 0 .8 nC Tur n- On D e la y Ti m e ton - - 20 Tur n- Off D e la y Ti m e t o ff - - 40 Inp ut C a p a c i ta nc e C iss - - 35 O utp ut C a p a c i ta nc e C oss - - 10 Re ve r s e Tra ns fe r C a p a c i ta nc e C rss - - 5 S ta ti c D ra i n-S o urc e On-S ta te Re s i s ta nc e D ra i n-S o urc e On-S ta te Re s i s ta nc e Ze r o Ga te Vo lta g e D ra i n C ur re nt Dynamic VDD=30V , RL=150 ID=200mA , VGEN=10V RG=10 V D S = 2 5 V, V GS =0 V f=1 .0 M H Z ns pF S o urc e - D r a i n D i o d e D i o d e F o rwa r d Vo lta g e C o nti nuo us D i o d e F o r wa rd C ur re nt P uls e d D i o d e F o r wa rd C ur re nt Switching Test Circuit V SD IS =2 0 0 m A , V GS =0 V - 0 .8 2 1 .3 V Is - - - 11 5 mA Is M - - - 800 mA Gate Charge Test Circuit VDD VIN RL VDD VGS RL VOUT RG 1mA RG September 03.2010-REV.00 PAGE . 2 2N7002KFN3 O Typical Characteristics Curves (TA=25 C,unless otherwise noted) ID - Drain-to-Source Current (A) V GS = 6.0~10V ID - Drain Source Current (A) 1.2 5.0V 5.0V 1 4.0V 0.8 4.0V 0.6 0.4 3.0V 0.2 3.0V 0 0 1 2 3 4 1.2 V DS =10V 1 0.8 0.6 0.4 T J =25 0.2 0 0 5 Fig. 1-TYPICAL FORWARD CHARACTERISTIC FIG.1- Output Characteristic 3 4 5 6 5 R DS(ON) - On-Resistance ( W ) R DS(ON) - On-Resistance ( W ) 2 FIG.2- Transfer Characteristic 5 4 3 V GS = 4.5V 2 1 V GS=10V 0 4 3 ID =500m A 2 IIDD=200m A =200mA 1 0 0 0.2 0.4 0.6 0.8 1 2 3 4 5 6 7 8 9 10 V GS - Gate-to-Source Voltage (V) ID - Drain Current (A) FIG.3- On Resistance vs Drain Current RDS(ON) - On-Resistance(Normalized) 1 VGS - Gate-to-Source Voltage (V) VDS - Drain-to-Source Voltage (V) FIG.4- On Resistance vs Gate to Source Voltage 1.8 VGS =10V 1.6 ID =500mA 1.4 1.2 1 0.8 0.6 -50 -25 0 25 50 75 100 125 150 TJ - Junction Temperature (o C) FIG.5- On Resistance vs Junction Temperature September 03.2010-REV.00 PAGE . 3 2N7002KFN3 V GS - Gate-to-Source Voltage (V) 10 Vgs Qg Qsw Vgs(th) V DS=10V I D=250mA 8 6 4 2 0 0 Qg(th) Qgs Qg Qgd ID =250mA 1.1 1 0.9 0.8 -25 0 25 50 75 100 125 150 o 1 88 86 ID = 250uA 84 82 80 78 76 74 72 -50 -25 0 25 50 75 100 125 150 TJ - Junction Temperature ( C) Fig.8 - Threshold Voltage vs Temperature IS - Source Current (A) 0.8 o TJ - Junction Temperature ( C) 10 0.6 Fig.7 - Gate Charge BVDSS - Breakdown Voltage (V) Vth - G-S Threshold Voltage (NORMALIZED) 1.2 0.4 Qg - Gate Charge (nC) Fig.6 - Gate Charge Waveform 0.7 -50 0.2 Fig.9 - Breakdown Voltage vs Junction Temperature V GS =0V 1 0.1 25 T J =125 -55 0.01 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 VSD - Source-to-Drain Voltage (V) Fig.10 - Source-Drain Diode Forward Voltage September 03.2010-REV.00 PAGE . 4 2N7002KFN3 MOUNTING PAD LAYOUT DFN 3L 0.043 (1.10) 0.010 (0.26) 0.010 (0.25) 0.024 (0.60) 0.02 8 (0.70) 0.004 (0.10) 0.017 (0.42) 0.02 7 (0.68) ORDER INFORMATION * Packing information T/R - 8K per 7" plastic Reel LEGAL STATEMENT Copyright PanJit International, Inc 2010 The information presented in this document is believed to be accurate and reliable. The specifications and information herein are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any license under its patent rights or rights of others. September 03.2010-REV.00 PAGE . 5