VNQ5E050MK-E Quad channel high-side driver with analog current sense for automotive applications Features Max supply voltage VCC 41V Operating voltage range VCC 4.5 to 28V Max on-state resistance (per ch.) RON 50 m Current limitation (typ) ILIMH 27 A Off-state supply current IS 2 A(1) 1. Typical value with all loads connected. - Electrostatic discharge protection Applications General - Inrush current active management by power limitation - Very low standby current - 3.0V CMOS compatible inputs - Optimized electromagnetic emissions - Very low electromagnetic susceptibility - In compliance with the 2002/95/EC european directive - Very low current sense leakage Diagnostic functions - Proportional load current sense - High current sense precision for wide currents range - Current sense disable - Overload and short to ground (power limitation) indication - Thermal shutdown indication Protections - Undervoltage shutdown - Overvoltage clamp - Load current limitation - Self limiting of fast thermal transients - Protection against loss of ground and loss of VCC - Overtemperature shutdown with auto restart (thermal shutdown) - Reverse battery protected (see Figure 29: Application schematic) October 2009 PowerSSO-24 All types of resistive, inductive and capacitive loads Suitable as LED driver Description The VNQ5E050MK-E is a quad channel high-side driver manufactured in the ST proprietary VIPower M0-5 technology and housed in the tiny PowerSSO-24 package. The VNQ5E050MK-E is designed to drive 12V automotive grounded loads delivering protection, diagnostics and easy 3V and 5V CMOS compatible interface with any microcontroller. The device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, overtemperature shut-off with auto-restart and over-voltage active clamp. A dedicated analog current sense pin is associated with every output channel in order to provide Enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication and overtemperature indication. The current sensing and diagnostic feedback of the whole device can be disabled by pulling the CS_DIS pin high to allow sharing of the external sense resistor with other similar devices. Doc ID 16374 Rev 1 1/36 www.st.com 1 Contents VNQ5E050MK-E Contents 1 Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.1 4 3.1.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 23 3.1.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 24 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.3 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.4 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.5 Maximum demagnetization energy (VCC =13.5V) . . . . . . . . . . . . . . . . . . 27 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.1 5 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 23 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.1 ECOPACK(R) packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.2 PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 6 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 2/36 Doc ID 16374 Rev 1 VNQ5E050MK-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (VCC=13V; Tj= 25C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Current sense (8V<VCC<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Doc ID 16374 Rev 1 3/36 List of figures VNQ5E050MK-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. 4/36 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Delay response time between rising edge of output current and rising edge of current sense (CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 IOUT/ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Overload or Short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 27 PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 28 PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 29 Thermal fitting model of a double channel HSD in PowerSSO-24(1) . . . . . . . . . . . . . . . . . 29 PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 PowerSSO-24 tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Doc ID 16374 Rev 1 VNQ5E050MK-E Block diagram and pin configuration Figure 1. Block diagram VCC Signal Clamp Undervoltage IN1 Control & Diagnostic 1 Power Clamp DRIVER IN2 VON Limitation CH 1 IN3 Over temp. IN4 Current Limitation CS_ DIS VSENSEH CS1 CONTROL & DIAGNOSTIC Channels 2, 3 & 4 1 Block diagram and pin configuration Current Sense CH 4 CH 3 OUT4 OUT3 CH 2 CS2 OUT2 OUT1 CS3 LOGIC CS4 OVERLOAD PROTECTION (ACTIVE POWER LIMITATION) GND Table 1. Pin functions Name VCC OUTPUTn GND INPUTn CURRENT SENSEn CS_DIS Function Battery connection. Power output. Ground connection. Must be reverse battery protected by an external diode/resistor network. Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state. Analog current sense pin, delivers a current proportional to the load current. Active high CMOS compatible pin, to disable the current sense pin. Doc ID 16374 Rev 1 5/36 Block diagram and pin configuration Figure 2. VNQ5E050MK-E Configuration diagram (top view) VCC OUTPUT1 GND OUTPUT1 INPUT1 OUTPUT1 CURRENT SENSE1 OUTPUT2 INPUT2 OUTPUT2 CURRENT SENSE2 OUTPUT2 INPUT3 OUTPUT3 CURRENT SENSE3 OUTPUT3 INPUT4 OUTPUT3 CURRENT SENSE4 OUTPUT4 CS_DIS. OUTPUT4 VCC OUTPUT4 TAB = VCC Table 2. 6/36 Suggested connections for unused and not connected pins Connection / pin Current sense N.C. Output Input CS_DIS Floating Not allowed X X X X To ground Through 1 k resistor X Through 22 k resistor Through 10 k resistor Through 10 k resistor Doc ID 16374 Rev 1 VNQ5E050MK-E 2 Electrical specifications Electrical specifications Figure 3. Current and voltage conventions IS VCC VFn IOUTn ICSD VCC OUTPUTn CS_DIS VOUTn ISENSEn IINn VCSD CURRENT SENSEn INPUTn VSENSEn GND VINn IGND Note: VFn = VOUTn - VCC during reverse battery condition. 2.1 Absolute maximum ratings Stressing the device above the ratings listed in the "Absolute maximum ratings" tables may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions reported in this section for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 3. Absolute maximum ratings Symbol Parameter Value Unit VCC DC supply voltage 41 V -VCC Reverse DC supply voltage 0.3 V - IGND DC reverse ground pin current 200 mA Internally limited A 20 A DC input current -1 to 10 mA DC current sense disable input current -1 to 10 mA 200 mA VCC - 41 to +VCC V 104 mJ IOUT - IOUT IIN ICSD DC output current Reverse DC output current -ICSENSE DC reverse CS pin current VCSENSE Current sense maximum voltage EMAX Maximum switching energy (single pulse) (L= 3mH; RL=0; Vbat=13.5V; Tjstart=150C; IOUT = IlimL(Typ.)) Doc ID 16374 Rev 1 7/36 Electrical specifications Table 3. VNQ5E050MK-E Absolute maximum ratings (continued) Symbol Value Unit VESD Electrostatic discharge (Human Body Model: R=1.5K; C=100pF) - INPUT - CURRENT SENSE - CS_DIS - OUTPUT - VCC 4000 2000 4000 5000 5000 V V V V V VESD Charge device model (CDM-AEC-Q100-011) 750 V Junction operating temperature -40 to 150 C Storage temperature -55 to 150 C Tj Tstg 2.2 Thermal data Table 4. Symbol 8/36 Parameter Thermal data Parameter Rthj-case Thermal resistance junction-case (with one channel ON) Rthj-amb Thermal resistance junction-ambient Doc ID 16374 Rev 1 Max. value Unit 2.8 C/W See Figure 33 C/W VNQ5E050MK-E 2.3 Electrical specifications Electrical characteristics Values specified in this section are for 8V<VCC<28V, -40C< Tj <150C, unless otherwise stated. Table 5. Power section Symbol Parameter VCC Operating supply voltage VUSD VUSDhyst RON Vclamp IS IL(off) VF Test conditions Min. Typ. Max. Unit 4.5 13 28 V Undervoltage shutdown 3.5 4.5 V Undervoltage shutdown hysteresis 0.5 On-state resistance(1) IOUT= 2A; Tj= 25C IOUT= 2A; Tj= 150C IOUT= 2A; VCC= 5V; Tj= 25C Clamp voltage IS= 20 mA Supply current Off-state; VCC=13V; Tj=25C; VIN=VOUT=VSENSE=VCSD=0V On-state; VCC=13V; VIN=5V; IOUT=0A Output - VCC diode voltage(1) 50 100 65 m m m 46 52 V 2(2) 8 5(2 ) 14 A mA 0.01 3 41 VIN=VOUT=0V; VCC=13V; T j=25C Off-state output current (1) VIN=VOUT=0V; VCC=13V; Tj=125C 0 V 0 A 5 -IOUT=2A; Tj=150C 0.7 V Max. Unit 1. For each channel. 2. PowerMOS leakage included. Table 6. Symbol Switching (VCC=13V; Tj= 25C) Parameter Test conditions Min. Typ. td(on) Turn-on delay time RL= 6.5 (see Figure 5) 20 s td(off) Turn-off delay time RL= 6.5 (see Figure 5) 35 s (dVOUT/dt)on Turn-on voltage slope RL= 6.5 See Figure 23 V/s (dVOUT/dt)off Turn-off voltage slope RL= 6.5 See Figure 25 V/s WON Switching energy losses during twon RL= 6.5 (see Figure 5) 0.15 mJ WOFF Switching energy losses during twoff RL= 6.5 (see Figure 5) 0.25 mJ Doc ID 16374 Rev 1 9/36 Electrical specifications Table 7. Symbol VNQ5E050MK-E Logic inputs Parameter Test conditions VIL Input low level voltage IIL Low level input current VIH Input high level voltage IIH High level input current VI(hyst) Input hysteresis voltage VICL Min. VIN= 0.9V VCSDL CS_DIS low level voltage ICSDL Low level CS_DIS current VCSDH CS_DIS high level voltage ICSDH High level CS_DIS current Table 8. Symbol CS_DIS clamp voltage 2.1 V 7 V V 0.9 V -0.7 1 A 2.1 V 10 0.25 7 -0.7 V V Protections and diagnostics (1) Parameter Test conditions VCC=13V 5V<VCC<28V Short circuit current VCC= 13V; TR<Tj<TTSD during thermal cycling TTSD Shutdown temperature TR Reset temperature TRS Thermal reset of STATUS Min. Typ. Max. Unit 19 27 38 38 A A 7 150 175 TRS + 1 TRS + 5 200 C 7 Turn-off output voltage IOUT= 2A; VIN= 0; L= 6mH clamp IOUT= 0.1A; Tj= -40C...150C (see Figure 6) VCC-41 Doc ID 16374 Rev 1 C C 135 Thermal hysteresis (TTSD-TR) Output voltage drop limitation A VCC-46 C VCC-52 25 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. 10/36 A V 5.5 ICSD= 1mA ICSD= -1mA A V VCSD= 2.1V IlimL VON V A 5.5 VCSD= 0.9V DC short circuit current VDEMAG 0.9 0.25 IlimH THYST Unit 10 VCSD(hyst) CS_DIS hysteresis voltage VCSCL Max. 1 VIN= 2.1V IIN= 1mA IIN= -1mA Input clamp voltage Typ. V mV VNQ5E050MK-E Electrical specifications Table 9. Symbol K0 K1 dK1/K1(1) K2 dK2/K2 (1) K3 dK3/K3(1) ISENSE0 Current sense (8V<VCC<18V) Parameter Test conditions IOUT/ISENSE IOUT = 0.05A; VSENSE=0.5V; VCSD=0V; Tj= -40C...150C IOUT/ISENSE IOUT=1A; VSENSE= 4V; VCSD=0V; Tj= -40C...150C Tj= 25C...150C Current sense ratio drift IOUT=1A; VSENSE= 4V; VCSD=0V; TJ=-40 C to 150 C IOUT/ISENSE IOUT=2A; VSENSE= 4V; VCSD=0V; Tj= -40C...150C Tj= 25C...150C Current sense ratio drift IOUT=2A; VSENSE= 4V; VCSD= 0V; TJ=-40 C to 150 C IOUT/ISENSE IOUT=4A; VSENSE= 4V; VCSD= 0V; Tj= -40C...150C Tj= 25C...150C Current sense ratio drift IOUT= 4A; VSENSE= 4V; VCSD= 0V; TJ=-40 C to 150 C Analog sense leakage current Min. Typ. Max. Unit 1050 2110 3170 1510 1890 2650 1510 1890 2270 -13 13 % 1600 1800 2230 1600 1800 2000 -8 8 % 1620 1770 1990 1620 1770 1920 -6 6 % IOUT = 0A; VSENSE=0V; VCSD = 5V; VIN=0V; Tj= -40C...150C VCSD = 0V; VIN=5V; Tj= -40C...150C 0 0 1 2 A A IOUT = 2A; VSENSE=0V; VCSD= 5V; VIN=5V; Tj= -40C...150C 0 1 A 20 mA IOL Open load on-state current detection threshold VIN = 5V, 8V<VCC<18V ISENSE= 5 A 4 VSENSE Max analog sense output voltage IOUT= 4A; VCSD= 0V 5 VSENSEH Analog sense output voltage in fault condition(2) VCC= 13V; RSENSE= 10K 8 V ISENSEH Analog sense output current in fault condition(2) VCC= 13V; VSENSE= 5V 9 mA Doc ID 16374 Rev 1 V 11/36 Electrical specifications Table 9. Symbol VNQ5E050MK-E Current sense (8V<VCC<18V) (continued) Parameter Test conditions Delay response time tDSENSE1H from falling edge of CS_DIS pin VSENSE<4V, 0.5A<Iout<4A ISENSE= 90% of ISENSE max (see Figure 4) 40 100 s Delay response time tDSENSE1L from rising edge of CS_DIS pin VSENSE<4V, 0.5A<Iout<4A ISENSE= 10% of ISENSE max (see Figure 4) 5 20 s Delay response time tDSENSE2H from rising edge of INPUT pin VSENSE<4V, 0.5A<Iout<4A ISENSE= 90% of ISENSE max (see Figure 4) 80 250 s Delay response time between rising edge tDSENSE2H of output current and rising edge of current sense VSENSE < 4V, ISENSE = 90% of ISENSEMAX, IOUT = 90% of IOUTMAX IOUTMAX=2A (see Figure 7) 60 s Delay response time tDSENSE2L from falling edge of INPUT pin VSENSE<4V, 0.5A<Iout<4A ISENSE= 10% of ISENSE max (see Figure 4) 250 s 1. Parameter guaranteed by design; it is not tested. 2. Fault condition includes: power limitation and overtemperature. 12/36 Min. Typ. Max. Unit Doc ID 16374 Rev 1 80 VNQ5E050MK-E Figure 4. Electrical specifications Current sense delay characteristics INPUT CS_DIS LOAD CURRENT SENSE CURRENT tDSENSE2H Figure 5. tDSENSE1L tDSENSE1H tDSENSE2L Switching characteristics VOUT tWon tWoff 90% 80% dVOUT/dt(off) dVOUT/dt(on) tr 10% tf t INPUT td(on) td(off) t Figure 6. Output voltage drop limitation Vcc-Vout Tj=150oC Tj=25oC Tj=-40oC Von Von/Ron(T) Doc ID 16374 Rev 1 Iout 13/36 Electrical specifications Figure 7. VNQ5E050MK-E Delay response time between rising edge of output current and rising edge of current sense (CS enabled) VIN tDSENSE2H t IOUT IOUTMAX 90% IOUTMAX t ISENSE ISENSEMAX 90% ISENSEMAX t 14/36 Doc ID 16374 Rev 1 VNQ5E050MK-E Electrical specifications Figure 8. IOUT/ISENSE vs IOUT Iout / Isense 2800 2600 max Tj = -40 C to 150 C 2400 max Tj = 25 C to 150 C 2200 2000 typical value 1800 1600 min Tj = 25 C to 150 C = min Tj = -40 C to 150 C 1400 1200 1 1,5 2 2,5 3 3,5 4 IOUT (A) Figure 9. Maximum current sense ratio drift vs load current dk/k(%) 20 15 10 5 0 -5 -10 -15 -20 1 Note: 2 IOUT (A) 3 4 Parameter guaranteed by design; it is not tested. Doc ID 16374 Rev 1 15/36 Electrical specifications Table 10. VNQ5E050MK-E Truth table Input Output Sense (VCSD=0V)(1) Normal operation L H L H 0 Nominal Overtemperature L H L L 0 VSENSEH Undervoltage L H L L 0 0 H X (no power limitation) Cycling (power limitation) Nominal Conditions Overload H VSENSEH Short circuit to GND (power limitation) L H L L 0 VSENSEH Negative output voltage clamp L L 0 1. If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents and external circuit. 16/36 Doc ID 16374 Rev 1 VNQ5E050MK-E Electrical specifications Table 11. ISO 7637-2: 2004(E) Test pulse Electrical transient requirements (part 1/3) Test levels(1) III IV 1 -75V -100V 2a +37V 3a Number of pulses or test times Burst cycle/pulse repetition time Delays and impedance Min. Max. 5000 pulses 0.5s 5s 2 ms, 10 +50V 5000 pulses 0.2s 5s 50s, 2 -100V -150V 1h 90ms 100ms 0.1s, 50 3b +75V +100V 1h 90ms 100ms 0.1s, 50 4 -6V -7V 1 pulse 100ms, 0.01 +65V +87V 1 pulse 400ms, 2 5b (2) 1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b. 2. Valid in case of external load dump clamp: 40V maximum referred to ground. Table 12. Electrical transient requirements (part 2/3) ISO 7637-2: 2004E Test pulse III VI 1 C C 2a C C 3a C C 3b C C 4 C C C C 5b (1) Test level results 1. Valid in case of external load dump clamp: 40V maximum referred to ground. Table 13. Class Electrical transient requirements (part 3/3) Contents C All functions of the device performed as designed after exposure to disturbance. E One or more functions of the device did not perform as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. Doc ID 16374 Rev 1 17/36 Electrical specifications 2.4 VNQ5E050MK-E Waveforms Figure 10. Normal operation Normal operation INPUT Nominal load Nominal load IOUT VSENSE VCS_DIS Figure 11. Overload or Short to GND Overload or Short to GND INPUT ILimH > Power Limitation Thermal cycling ILimL > IOUT VSENSE VCS_DIS 18/36 Doc ID 16374 Rev 1 VNQ5E050MK-E Electrical specifications Figure 12. Intermittent overload Intermittent Overload INPUT Overload ILimH > ILimL > Nominal load IOUT VSENSEH> VSENSE VCS_DIS Figure 13. TJ evolution in overload or short to GND TJ evolution in Overload or Short to GND INPUT Self-limitation of fast thermal transients TTSD THYST TR TJ_START TJ ILimH > Power Limitation < ILimL IOUT Doc ID 16374 Rev 1 19/36 Electrical specifications 2.5 VNQ5E050MK-E Electrical characteristics curves Figure 14. Off-state output current Figure 15. High level input current Iloff (nA) Iih (A) 5 700 4,5 600 Vin=2.1V Off State Vcc=13V Vin=Vout=0V 500 4 3,5 3 400 2,5 300 2 1,5 200 1 100 0,5 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (C) 50 75 100 125 150 175 100 125 150 175 Tc (C) Figure 16. Input clamp voltage Figure 17. Input low level Vicl (V) Vil (V) 7 2 6,8 1,8 lin=1mA 6,6 1,6 6,4 1,4 6,2 1,2 6 1 5,8 0,8 5,6 0,6 5,4 0,4 5,2 0,2 5 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (C) 50 75 Tc (C) Figure 18. Input high level Figure 19. Input hysteresis voltage Vih (V) Vihyst (V) 4 1 0,9 3,5 0,8 3 0,7 2,5 0,6 2 0,5 0,4 1,5 0,3 1 0,2 0,5 0,1 0 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) 20/36 -50 -25 0 25 50 75 Tc (C) Doc ID 16374 Rev 1 100 125 150 175 VNQ5E050MK-E Electrical specifications Figure 20. On-state resistance vs Tcase Figure 21. On-state resistance vs VCC Ron (mOhm) Ron (mOhm) 150 100 Iout= 2A Vcc=13V 120 Tc=150C 80 Tc=125C 90 60 60 40 30 20 Tc=25C Tc=-40C 0 0 -50 -25 0 25 50 75 100 125 150 175 0 5 10 15 Tc (C) 20 25 30 35 40 150 175 150 175 Vcc (V) Figure 22. Undervoltage shutdown Figure 23. Turn-on voltage slope Vusd (V) (dVout/dt )On (V/ms) 16 1000 900 14 Vcc=13V RI=6.5 Ohm 800 12 700 10 600 8 500 400 6 300 4 200 2 100 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (C) 50 75 100 125 Tc (C) Figure 24. ILIMH vs Tcase Figure 25. Turn-off voltage slope Ilimh (A) (dVout/dt )Off (V/ms) 40 600 550 35 Vcc=13V RI= 6.5 Ohm 500 Vcc=13V 450 30 400 350 300 25 250 20 200 150 15 100 50 10 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) -50 -25 0 25 50 75 100 125 Tc (C) Doc ID 16374 Rev 1 21/36 Electrical specifications VNQ5E050MK-E Figure 26. CS_DIS high level voltage Figure 27. CS_DIS clamp voltage Vcsdh (V) Vcsdcl(V) 4 10 9 3,5 Iin = 1 mA 8 3 7 2,5 6 2 5 4 1,5 3 1 2 0,5 1 0 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) Vcsdl (V) 3 2,5 2 1,5 1 0,5 0 -25 0 25 50 75 100 125 150 175 Tc (C) 22/36 -25 0 25 50 75 Tc (C) Figure 28. CS_DIS low level voltage -50 -50 Doc ID 16374 Rev 1 100 125 150 175 VNQ5E050MK-E 3 Application information Application information Figure 29. Application schematic +5V VCC Rprot CS_DIS Dld CU Rprot IINPUT OUTPUT Rprot CURRENT SENSE GND RSENSE Cext VGND RGND DGND Note: Channel 2, 3, 4 have the same internal circuit as channel 1. 3.1 GND protection network against reverse battery This section provides two solutions for implementing a ground protection network against reverse battery. 3.1.1 Solution 1: resistor in the ground line (RGND only) This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1. RGND 600mV / (IS(on)max). 2. RGND (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not shared by the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND. Doc ID 16374 Rev 1 23/36 Application information VNQ5E050MK-E If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below). 3.1.2 Solution 2: diode (DGND) in the ground line A resistor (RGND=1k) should be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift (600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. 3.2 Load dump protection Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the VCC max DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2: 2004(E) table. 3.3 MCU I/Os protection If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the MCU I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of MCU and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of MCU I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 180k. Recommended values: Rprot =10k, CEXT=10nF. 24/36 Doc ID 16374 Rev 1 VNQ5E050MK-E 3.4 Application information Current sense and diagnostic The current sense pin performs a double function (see Figure 30: Current sense and diagnostic): Current mirror of the load current in normal operation, delivering a current proportional to the load one according to a know ratio KX. The current ISENSE can be easily converted to a voltage VSENSE by means of an external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5V minimum (see parameter VSENSE in Table 9: Current sense (8V<VCC<18V)). The current sense accuracy depends on the output current (refer to current sense electrical characteristics Table 9: Current sense (8V<VCC<18V)). Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a maximum current ISENSEH in case of the following fault conditions (refer to Table 10: Truth table): - Power limitation activation - Overtemperature A logic level high on CS_DIS pin sets at the same time all the current sense pins of the device in a high impedance state, thus disabling the current monitoring and diagnostic detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of sense resistance and ADC line among different devices. Doc ID 16374 Rev 1 25/36 Application information VNQ5E050MK-E Figure 30. Current sense and diagnostic VBAT VCC Main MOSn 41V Overtemperature IOUT/KX ISENSEH Pwr_Lim VSENSEH CS_DIS CURRENT SENSEn RPROT To uC ADC 26/36 OUTn RSENSE VSENSE Doc ID 16374 Rev 1 GND Load VNQ5E050MK-E 3.5 Application information Maximum demagnetization energy (VCC =13.5V) Figure 31. Maximum turn-off current versus inductance (for each channel) 100 A B C I (A) 10 1 0,1 1 L (mH) 10 100 A: Tjstart = 150C single pulse B: Tjstart = 100C repetitive pulse C: Tjstart = 125C repetitive pulse VIN, IL Demagnetization Demagnetization Demagnetization t Note: Values are generated with RL = 0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. Doc ID 16374 Rev 1 27/36 Package and PC board thermal data VNQ5E050MK-E 4 Package and PC board thermal data 4.1 PowerSSO-24 thermal data Figure 32. PowerSSO-24 PC board Note: Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4 area= 77mm x 86mm, PCB thickness=1.6mm, Cu thickness=70m (front and back side), Copper areas: from minimum pad lay-out to 8cm2). Figure 33. Rthj-amb vs. PCB copper area in open box free air condition (one channel ON) RTHj_amb(C/W) 55 50 45 40 35 30 0 2 4 6 PCB Cu heatsink area (cm^2) 28/36 Doc ID 16374 Rev 1 8 10 VNQ5E050MK-E Package and PC board thermal data Figure 34. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON) ZTH (C/W) 1000 100 Footprint 2 cm2 8 cm2 10 1 0.1 0.0001 0.001 0.01 0.1 1 Time (s) 10 100 1000 Figure 35. Thermal fitting model of a double channel HSD in PowerSSO-24(1) 1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. Doc ID 16374 Rev 1 29/36 Package and PC board thermal data VNQ5E050MK-E Equation 1: pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where = t T p Table 14. 30/36 Thermal parameters Area/island (cm2) Footprint R1=R7=R9=R11 (C/W) 0.4 R2=R8=R10=R12 (C/W) 2 R3 (C/W) 6 R4 (C/W) 7.7 R5 (C/W) 2 8 9 9 8 R6 (C/W) 28 17 10 C1=C7=C9=C11 (W.s/C) 0.001 C2=C8=C10=C12 (W.s/C) 0.0022 C3 (W.s/C) 0.025 C4 (W.s/C) 0.75 C5 (W.s/C) 1 4 9 C6 (W.s/C) 2.2 5 17 Doc ID 16374 Rev 1 VNQ5E050MK-E Package and packing information 5 Package and packing information 5.1 ECOPACK(R) packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. 5.2 PowerSSO-24 mechanical data Figure 36. PowerSSO-24 package dimensions Doc ID 16374 Rev 1 31/36 Package and packing information VNQ5E050MK-E PowerSSO-24 mechanical data(1) (2) Table 15. Millimeters Symbol Min. Typ. A 2.50 A2 2.15 2.40 a1 0 0.10 b 0.33 0.51 c 0.23 0.32 D 10.10 10.50 E(3) 7.40 7.60 (3) e 0.8 e3 8.8 F 2.3 G 0.1 G1 0.06 H 10.1 10.5 h 0.4 k L 5 0.6 1 O 1.2 Q 0.8 S 2.9 T 3.65 U 1 N 10 X 4.1 4.7 Y 6.5 4.9(4) 7.1 5.5(4) 1. No intrusion allowed inwards the leads. 2. Flash or bleeds on exposed die pad shall not exceed 0.4 mm per side 3. "D and E" do not include mold flash or protusions. Mold flash or protusions shall not exceed 0.15 mm. 4. Variations for small window leadframe option. 32/36 Max. Doc ID 16374 Rev 1 VNQ5E050MK-E 5.3 Package and packing information Packing information Figure 37. PowerSSO-24 tube shipment (no suffix) C Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) B 49 1225 532 3.5 13.8 0.6 All dimensions are in mm. A Figure 38. PowerSSO-24 tape and reel shipment (suffix "TR") Reel dimensions Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 24.4 100 30.4 Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.05) D1 (min) F ( 0.1) K (max) P1 ( 0.1) 24 4 12 1.55 1.5 11.5 2.85 2 End All dimensions are in mm. Start Top cover tape No components Components 500mm min No components 500mm min Empty components pockets saled with cover tape. User direction of feed Doc ID 16374 Rev 1 33/36 Order codes 6 VNQ5E050MK-E Order codes Table 16. Device summary Order codes Package PowerSSO-24 34/36 Tube Tape and reel Root part number 1 VNQ5E050MKTR-E Doc ID 16374 Rev 1 VNQ5E050MK-E 7 Revision history Revision history Table 17. Document revision history Date Revision 07-Oct-2009 1 Changes Initial release. Doc ID 16374 Rev 1 35/36 VNQ5E050MK-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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