© Semiconductor Components Industries, LLC, 2014
August, 2014 − Rev. 4 1Publication Order Number:
NL7SZ98/D
NL7SZ98
Configurable Multifunction
Gate
The NL7SZ98 is an advanced high−speed CMOS multifunction
gate. The device allows the user to choose logic functions MUX,
AND, OR, NAND, NOR, INVERT and BUFFER. The device has
Schmitt−trigger inputs, thereby enhancing noise immunity.
The NL7SZ98 input and output structures provide protection when
voltages up to 7.0 V are applied, regardless of the supply voltage.
Features
•High Speed: tPD = 3.4 ns (Typ) @ VCC = 5.0 V
•Low Power Dissipation: ICC = 1 mA (Maximum) at TA = 25°C
•Power Down Protection Provided on inputs
•Balanced Propagation Delays
•Overvoltage Tolerant (OVT) Input and Output Pins
•Ultra−Small Package
•NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
•This is a Pb−Free Device
http://onsemi.com
SC−88 (SOT−363)
CASE 419B
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
(Top View)
IN B
GND
IN A
IN C
VCC
OUT Y
PIN ASSIGNMENTS
MARKING DIAGRAM
MP = Specific Device Code
M = Date Code
G= Pb−Free Package
1
2
3
6
5
4
1
MP MG
G
1
6
(Note: Microdot may be in either location)
NL7SZ98
http://onsemi.com
2
Figure 1. Function Diagram
OUT Y
IN A
IN B
IN C
PIN ASSIGNMENT
1IN B
2 GND
3IN A
4OUT Y
5 VCC
6IN C
FUNCTION TABLE*
Input Output
A B C Y
L L L H
L L H H
L H L L
L H H H
H L L H
H L H L
H H L L
H H H L
*To select a logic function, please refer to “Logic Configurations
section”.
NL7SZ98
http://onsemi.com
3
LOGIC CONFIGURATIONS
Figure 2. 2−Input MUX with Output
Inverted Figure 3. 2−Input NAND (When B = “L”)
Figure 4. 2−Input NOR with Input C Inverted
(When B = “H”) Figure 5. 2−Input NAND with Input C
Inverted (When A = “L”)
Figure 6. 2−Input NOR (When A =”H”) Figure 7. Buffer (When A = “L” and
B = “H”)
Figure 8. Inverter (When A = C = “L”)
BC
Y
1
2
3
6
5
4
VCC
A
C
Y
1
2
3
6
5
4
Y
A
C
VCC
A
C
Y
1
2
3
6
5
4
Y
Y
A
C
A
C
VCC
BC
Y
1
2
3
6
5
4
Y
Y
B
C
B
C
VCC
BC
Y
1
2
3
6
5
4
Y
B
C
VCC
Y
1
2
3
6
5
4
YC
VCC
B
Y
1
2
3
6
5
4
YB
VCC
A
B
A
C
Y
C
NL7SZ98
http://onsemi.com
4
MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC DC Supply Voltage −0.5 to +7.0 V
VIN DC Input Voltage −0.5 to +7.0 V
VOUT DC Output Voltage −0.5 to +7.0 V
IIK DC Input Diode Current VIN < GND −50 mA
IOK DC Output Diode Current VOUT < GND −50 mA
IODC Output Source/Sink Current $50 mA
ICC DC Supply Current Per Supply Pin $100 mA
IGND DC Ground Current per Ground Pin $100 mA
TSTG Storage Temperature Range −65 to +150 °C
TLLead Temperature, 1 mm from Case for 10 Seconds 260 °C
TJJunction Temperature Under Bias +150 °C
qJA Thermal Resistance (Note 1) SC−88 350 °C/W
PDPower Dissipation in Still Air at 85°C SC−88 200 mW
MSL Moisture Sensitivity Level 1
FRFlammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
VESD ESD Withstand Voltage Human Body Mode (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
>2000
>200
N/A
V
ILATCHUP Latchup Performance Above VCC and Below GND at 125°C (Note 5) $500 mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be af fected.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
VCC Positive DC Supply Voltage 1.65 5.5 V
VIN Digital Input Voltage 0 5.5 V
VOUT Output Voltage 0 5.5 V
TAOperating Free−Air Temperature −55 +125 °C
Dt/DVInput Transition Rise or Fall Rate VCC = 2.5 V $ 0.2 V
VCC = 3.3 V $ 0.3 V
VCC = 5.0 V $ 0.5 V
0
0
0
No Limit
No Limit
No Limit
nS/V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
NL7SZ98
http://onsemi.com
5
DC ELECTRICAL CHARACTERISTICS
Symbol Parameter Conditions VCC
(V)
TA = 255C TA v +855CTA = −555C to
+1255C
Unit
Min Typ Max Min Max Min Max
VT+ Positive Threshold
Voltage 1.65 0.79 1.16 1.16 1.16 V
2.3 1.11 1.56 1.56 1.56
3.0 1.5 1.87 1.87 1.87
4.5 2.16 2.74 2.74 2.74
5.5 2.61 3.33 3.33 3.33
VT− Negative
Threshold Voltage 1.65 0.35 0.62 0.35 0.35 V
2.3 0.58 0.87 0.58 0.58
3.0 0.84 1.19 0.84 0.84
4.5 1.41 1.9 1.41 1.41
5.5 1.78 2.29 1.78 1.78
VHHysteresis Voltage 1.65 0.30 0.62 0.30 0.62 0.30 0.62 V
2.3 0.40 0.8 0.40 0.8 0.40 0.8
3.0 0.53 0.87 0.53 0.87 0.53 0.87
4.5 0.71 1.04 0.71 1.04 0.71 1.04
5.5 0.8 1.2 0.8 1.2 0.8 1.2
VOH Minimum
High−Level Output
Voltage
VIN v VT−MIN
IOH = −50 mA1.65 −
5.5 VCC
− 0.1 VCC
− 0.1 VCC
− 0.1 V
VIN v VT−MIN
IOH = −4 mA 1.65 1.2 1.2 1.2
IOH = −8 mA 2.3 1.9 1.9 1.9
IOH = −16 mA 3.0 2.4 2.4 2.4
IOH = −24 mA 3.0 2.3 2.3 2.3
IOH = −32 mA 4.5 3.8 3.8 3.8
VOL Maximum
Low−Level Output
Voltage
VIN w VT+MAX
IOL = 50 mA1.65 −
5.5 0.1 0.1 0.1 V
VIN w VT+MAX
IOL = 4 mA 1.65 0.45 0.45 0.45
IOL = 8 mA 2.3 0.3 0.3 0.3
IOL = 16 mA 3.0 0.4 0.4 0.4
IOL = 24 mA 3.0 0.55 0.55 0.55
IOL = 32 mA 4.5 0.55 0.55 0.55
IIN Input Leakage
Current 0 v VIN v
5.5 V 0 to
5.5 $0.1 $1.0 $1.0 mA
ICC Quiescent Supply
Current 0 v VIN v VCC 5.5 1.0 10 10 mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NL7SZ98
http://onsemi.com
6
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
Symbol Parameter VCC (V) Test Condition
TA = 255C TA v +855CTA = −555C
to +1255C
Unit
Min Typ Max Min Max Min Max
tPLH,
tPHL Propagation Delay,
Any Input to Output
Y (See Test Circuit)
1.65 − 1.95 3.2 8.9 14.4 3.2 14.4 3.2 14.4 ns
2.3 − 2.7 2.0 5.2 8.3 2.0 8.3 2.0 8.3
3.0 − 3.6 1.5 4.0 6.3 1.5 6.3 1.5 6.3
4.5 − 5.5 1.1 3.4 5.1 1.1 5.1 1.1 5.1
CIN Input Capacitance 3.5 pF
CPD Power Dissipation
Capacitance
(Note 6)
5.0 f = 10 MHz 22 pF
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the dynamic operating current consumption without
load. Average operating current can be obtained by the equation ICC(OPR) = CPD • VCC • fin + ICC. CPD is used to determine the no−load
dynamic power consumption: PD = CPD • VCC2 • fin + ICC • VCC.
TEST CIRCUIT AND VOLTAGE WAVEFORMS
Figure 9. Load Circuit
RL
CL*
From Output
Under Test
GND
Open
VLOAD
RL
*CL includes probes and jig capacitance.
Test S1
tPLH/tPHL Open
tPLZ/tPZL VLOAD
tPHZ/tPZH GND
VCC
Inputs
VMVLOAD CLRLVD
VItr/tf
1.8 V $ 0.15 V VCC v 2 ns VCC/2 2 x VCC 30 pF 1 kW0.15 V
2.5 V $ 0.2 V VCC v 2 ns VCC/2 2 x VCC 30 pF 500 W0.15 V
3.3 V $ 0.3 V 3 V v 2.5 ns 1.5 V 6 V 50 pF 500 W0.3 V
5.5 V $ 0.5 V VCC v 2.5 ns VCC/2 2 x VCC 50 pF 500 W0.3 V
NL7SZ98
http://onsemi.com
7
Figure 10. Voltage Waveforms Pulse Duration Figure 11. Voltage Waveforms Setup and Hold
Times
Figure 12. Voltage Waveforms Propagation Delay
Times Inverting and Noninverting Outputs Figure 13. Voltage Waveforms Enable and
Disable Times Low− and High−Level Enabling
Input
Input
Output
Output
VM
VLOAD/2
VM
tWVI
0 V
VMVM
VM
VM
VMVM
VI
0 V
tPLH tPHL
tPHL tPLH
VOH
VOL
VOH
VOL
Output
Control VI
0 V
VM
VM
VM
VM
tPZH tPHZVOL
VOH
[0 V
Output
Output
Waveform 1
S1 at VLOAD
(Note 7)
Waveform 2
S1 at GND
(Note 8)
VI
0 V
Timing Input
Data Input VI
0 V
VMVM
VM
tsu th
VOL + VD
VOH − VD
7. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
8. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control
9. All input pulses are supplied by generators having the following characteristics: PRR v 10 MHz, ZO = 50 W.
10.The outputs are measured one at a time, with one transition per measurement.
11.All parameters are waveforms are not applicable to all devices.
ORDERING INFORMATION
Device Package Shipping†
NL7SZ98DFT2G SC−88
(Pb−Free) 3000 / Tape & Reel
NLV7SZ98DFT2G*
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifi-
cations Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and
PPAP Capable
NL7SZ98
http://onsemi.com
8
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
Cddd M
123
A1
A
c
654
E
b
6X DIM MIN NOM MAX
MILLIMETERS
A−−− −−− 1.10
A1 0.00 −−− 0.10
ddd
b0.15 0.20 0.25
C0.08 0.15 0.22
D1.80 2.00 2.20
−−− −−− 0.043
0.000 −−− 0.004
0.006 0.008 0.010
0.003 0.006 0.009
0.070 0.078 0.086
MIN NOM MAX
INCHES
0.10 0.004
E1 1.15 1.25 1.35
e0.65 BSC
L0.26 0.36 0.46
2.00 2.10 2.20 0.045 0.049 0.053
0.026 BSC
0.010 0.014 0.018
0.078 0.082 0.086
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.65
0.66
6X
DIMENSIONS: MILLIMETERS
0.30
PITCH
2.50
6X
RECOMMENDED
TOP VIEW
SIDE VIEW END VIEW
bbb H
B
SEATING
PLANE
DET AIL A E
A2 0.70 0.90 1.00 0.027 0.035 0.039
L2 0.15 BSC 0.006 BSC
aaa 0.15 0.006
bbb 0.30 0.012
ccc 0.10 0.004
A-B D
aaa C
2X 3 TIPS
D
E1
D
e
A
2X
aaa H D
2X
D
L
PLANE
DETAIL A
H
GAGE
L2
C
ccc C
A2
6X
ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent− Marking.pdf. S CILLC r eserves the right t o m ake changes without further notice to any products h erein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all l iabilit y, including without limitation special, consequential or i ncident al d amages. “Typical” parameters which may be provided in S CILLC d at a sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application b y c ust omer’s technical e xperts. SCILLC does not c onvey a ny l icense u nder its patent r ights n or the rights of o t hers. S CILLC p roducts a re n ot d esigned, i ntended,
or authorized for use as c omponent s i n s yst ems i nt ended f or s urgic al i m plant i nt o the body, or other applications i nt ended t o support or sustain life, o r for any other a pplication i n w hich
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC an d it s officers, employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and
expenses, and r easonable a ttorney f ees a rising o ut of, directly o r i ndirectly, any claim o f personal injury or d eat h a ssociat ed w ith s uch u nintended o r u naut horized u se, e ven if such c laim
alleges that SCILLC was negligent regarding the d esign or manufacture of the p art. S CILLC i s a n E qual Opportunity/Affirmative A ction E mployer . T his l iterature i s subject to all applicable
copyright laws and is not for resale in any manner.
P
UBLICATION ORDERING INFORMATION
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
NL7SZ98/D
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your loc
al
Sales Representative
