74LCX157MTCX - Fairchild Semiconductor

May 1995

Revised February 2001

74LCX157 Low Voltage Quad 2-Input Multi plexer with 5V Tolerant Inputs

74LCX157

Low Voltage Quad 2-Input Multiplexer

with 5V Tolerant Inputs

General Description

The LCX157 is a high-speed quad 2-input multiplexer . Four

bits of data from two sources can be selected using the

common Select and Enable inputs. The four outputs

present the selected data in the true (noninverted) form.

The LCX157 can also be used as a function generator.

The 74LCX157 is fabricated with advanced CMOS technol-

ogy to achieve high speed operation while maintaining

CMOS low power dissipation.

Features

■5V tolerant inputs

■2.3V–3. 6V VCC specifications provided

■5.8 ns tPD max (VCC = 3.3V), 10 µA ICC max

■Power down high impedance inputs and outputs

■±24 mA output drive (VCC = 3.0V)

■Implements patented noise/EMI reduction circuitry

■Latch-up per for man c e exce eds 500 mA

■ESD performance :

Human body model > 2000V

Machine model > 200V

Ordering Code:

Devices also available in Tape and R eel. Speci fy by appending the s uffix let t er “X” to the ordering code.

Logic Symbols

IEEE/IEC

Connection Diagram

Pin Descriptions

Order Number Package Number Package Description

74LCX157M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

74LCX157SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LCX157MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Pin Names Description

I0a–I0d Source 0 Data Inputs

I1a–I1d Source 1 Data Inputs

EEnable Inpu t

S Select Input

Za–ZdOutputs

www.fairchildsemi.com 2

74LCX157

Functional Description

The LCX157 is a quad 2-input multiplexer. It selects four

bits of data from two sources under the control of a com-

mon Select input (S). The Enable input (E) is act ive-LOW.

When E is HIGH, all of the outputs (Z) are forced LOW

regardless of all other inputs. The LCX157 is the logic

implementation of a 4-pole, 2-position switch where the

positio n of th e switch is de ter min ed by the log ic le vels sup -

plied to the Select input. The logic equations for the outputs

are shown below:

Za = E • (I1a • S + I0a • S)

Zb = E • (I1b • S + I0b • S)

Zc = E • (I1c • S + I0c • S)

Zd = E • (I1d • S + I0d • S)

A common use of the LCX157 is the moving of d ata from

two groups of registers to four common output busses. The

parti cu l ar r eg is t er fr om w h ich th e da t a c ome s is d et e rm in ed

by the state of th e Select input. A less obvio us use is as a

function generator. The LCX157 can generate any four of

the sixteen different functions of two variables with one

variable common. This is useful for implementing gating

functions.

Truth Table

H = HIGH Voltage Lev el

L = LOW Voltage Level

X = Immaterial

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

Inputs Outputs

ESI

0I1Z

HX X X L

LH X L L

LH X H H

LL L X L

LLH X H

3 www.fairchildsemi.com

74LCX157

Absolute Maximum Ratings(Note 1)

Recommended Operating Conditions (Note 3)

Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operat ed

at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-

mended Operating Conditions” table w ill define th e c onditions fo r ac t ual device operation.

Note 2: IO Absolu te Maximu m Rating must be observed.

Note 3: Unused input s m us t be held H IG H or LOW. They may n ot flo at .

DC Electrical Characteristics

Symbol Parameter Value Conditions Units

VCC Supply Voltage −0.5 to +7.0 V

VIDC Input Voltage −0.5 to +7.0 V

VODC Output Voltage −0.5 to VCC + 0.5 Output in HIGH or LOW State (No te 2) V

IIK DC Input Diode Current −50 VI < GND mA

IOK DC Output Diode Current −50 VO < GND mA

+50 VO > VCC

IODC Output Source/Sink Current ±50 mA

ICC DC Supply Current per Supply Pin ±100 mA

IGND DC Ground Current per Ground Pin ±100 mA

TSTG Stora ge Tem per atu re −65 to +150 °C

Symbol Parameter Min Max Units

VCC Supply Voltage Operating 2.0 3.6 V

Data Retention 1.5 3.6

VIInput Voltage 05.5V

VOOutput Voltag e HIGH or LOW State 0 VCC V

IOH/IOL Output Curr en t VCC = 3.0V − 3.6V ±24 mAVCC = 2.7V − 3.0V ±12

VCC = 2.3V − 2.7V ±8

TAFree-Air Operating Temperature −40 85 °C

∆t/∆V Input Edge Rate, VIN = 0.8 V − 2.0V, VCC = 3.0V 0 10 ns/V

Symbol Parameter Conditions VCC TA = −40°C to +85°CUnits

(V) Min Max

VIH HIGH Level Input Voltage 2.3 − 2.7 1.7 V

2.7 − 3.6 2.0

VIL LOW Level Input Voltage 2.3 − 2.7 0.7 V

2.7 − 3.6 0.8

VOH HIGH Level Output Voltage IOH = −100 µA2.3 − 3.6 VCC − 0.2

IOH = −8 mA 2.3 1.8

IOH = −12 mA 2.7 2.2

IOH = −18 mA 3.0 2.4

IOH = −24 mA 3.0 2.2

VOL LOW Level Output Voltage IOL = 100 µA2.3 − 3.6 0.2

IOH = 8 mA 2.3 0.6

IOL = 12 mA 2.7 0.4

IOL = 16 mA 3.0 0.4

IOL = 24 mA 3.0 0.55

IIInput Leakage Current 0 ≤ VI ≤ 5.5V 2.3 − 3.6 ±5.0 µA

IOFF Power-Off Leakage Current VI or VO = 5.5V 0 10 µA

ICC Quiescent Supply Current VI = VCC or GND 2.3 − 3.6 10 µA

3.6V ≤ VI ≤ 5.5V 2.3 − 3.6 ±10

∆ICC Increase in ICC per Input VIH = VCC −0.6V 2.3 − 3.6 500 µA

www.fairchildsemi.com 4

74LCX157

AC Electrical Characteristics

Note 4: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The

specif ic ation ap plies to any out puts switc hing in the same directio n, eit her HIGH -t o-LOW (tOSHL) or LOW-to-HI GH (t OSLH). Parameter guaranteed by design.

Dynamic Switching Characteristics

Capacitance

Symbol Parameter

TA = −40°C to +85°C, RL = 500Ω

Units

VCC = 3.3V ± 0.3V VCC = 2.7V VCC = 2.5V ± 0.2V

CL = 50 pF CL = 50 pF CL = 30 pF

Min Max Min Max Min Max

tPHL Propagation Delay 1.5 7.0 1.5 8.0 1.5 8.4 ns

tPLH S→Zn1.57.01.58.01.58.4

tPHL Propagation Delay 1.5 7.0 1.5 8.0 1.5 8.4 ns

tPLH E→Zn1.57.01.58.01.58.4

tPHL Propagation Delay 1.5 5.8 1.5 6.3 1.5 7.0 ns

tPLH In→Zn1.55.81.56.31.57.0

tOSHL Output to Output Skew 1.0 ns

tOSLH (Note 4) 1.0

Symbol Parameter Conditions VCC TA = 25°CUnits

(V) Typical

VOLP Quiet Output Dynamic Peak VOL CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 0.8 V

CL= 30 pF, VIH = 2.5V, VIL = 0V 2.5 0.6

VOLV Quiet Output Dynamic Valley VOL CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 −0.8 V

CL= 30 pF, VIH = 2.5V, VIL = 0V 2.5 -0.6

Symbol Parameter Conditions Typical Units

CIN Input Capacitance VCC = Open, VI = 0V or VCC 7pF

COUT Output Capacitance VCC = 3.3V, VI = 0V or VCC 8pF

CPD Power Dissipation Capacitance VCC = 3.3V, VI = 0V or VCC, f = 10 MHz 25 pF

5 www.fairchildsemi.com

74LCX157

AC LOADING and WAVEFORMS Generic for LCX Family

FIGURE 1. AC Test Circuit (CL includes probe and jig capac itance)

Waveform for Inverting and Non-Inverting Functions

Propagation Delay. Pulse Width and trec Waveforms

3-STATE Output High Enable and

Disable Times for Logic

3-STATE Output Low Enable and

Disable Times for Logic

Setup Time, Hold Time and Recovery Time for Logic

trise and tfall

FIGURE 2. Waveforms

(Input Characteristics; f =1MHz, tr = tf = 3ns)

Test Switch

tPLH, tPHL Open

tPZL, tPLZ 6V at VCC = 3.3 ± 0.3V

VCC x 2 at VCC = 2.5 ± 0.2V

tPZH, tPHZ GND

Symbol VCC

3.3V ± 0.3V 2.7V 2.5V ± 0.2V

Vmi 1.5V 1.5V VCC/2

Vmo 1.5V 1.5V VCC/2

VxVOL + 0.3V VOL + 0.3V V OL + 0.15V

VyVOH − 0.3V VOH − 0.3V VOH − 0.15V

www.fairchildsemi.com 6

74LCX157

Schematic D ia gr a m Generic for LCX Family

7 www.fairchildsemi.com

74LCX157

Physical Dimensions inches (millimeters) unless otherwise noted

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

Package Number M16A

www.fairchildsemi.com 8

74LCX157

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Sma ll Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M16D

9 www.fairchildsemi.com

74LCX157 Low Voltage Quad 2-Input Multi plexer with 5V Tolerant Inputs

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lea d Th in S hri n k Small Ou tlin e Pack age (TSSOP ), JED EC MO-1 53, 4.4mm Wide

Package Number MTC16

Fairchild does not assume an y respon sibility for use of any circuitry described, no circuit pat ent licenses ar e implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life sup por t de vices o r syst ems are dev ic es or syste ms

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instruct ions fo r use pr ovi de d in the l abe ling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A c ritica l compo nent i n any compo nent o f a li fe supp ort

device or system whose failure to perform can be rea-

sonabl y e xpec ted to cause th e fa i lure of the l ife s upport

device or system, or to affect its safety or effectiveness.