DATA BRIEF
For further information contact your local STMicroelectronics sales office.
January 2006 Rev 1 1/4
4
STLC2500C
BluetoothTM EDR Single Chip
Features
■The lowest power consumption by design and
technology (see
Table 1
)
■World best EDR throughput (see
Table 1
)
■World most performing BT-WLAN coexistence
support for several BT/WLAN coexistence
algorithms (i.e. 2/3/4-wire PTA, in a very
flexible and parametrical way to optimize voice
and data quality over Bluetooth and WLAN)
■Superior voice quality
– Pitch-P eriod Error Concealment (PPEC) f or
improved speech quality (in the vicinity of
interference)
■Extended range
– Tx output power up to 8 dBm
■Pre-calibrated RF
– Auto calibration (VCO , filters), no RF
calibrat ion requ ired in pr odu cti on
■Bluetooth™V2.0 + EDR compliant
– Full EDR support and all BT1.2 errata
– All EDR data rates and packet types
■Backward compatibility with legacy devices
through extended V1.2 feature support
– Adaptive Frequency Hopping (AFH)
– Faster connections through interlaced scan
– Extended SCO (eSCO) links
■Point-t o- poi nt, point- to- mu lti -poi nt
(up to 7 slaves) and scatternet capability
■Asynchronous Connection-Less (ACL) logical
transport link
■Synchronous Connection Oriented (SCO) link
for 2 simultaneous SCO channels at 64Kbps
■Clock support for all cellular standards: system
clock input and low power clock
■ARM7TDMI CPU with 32-bit core and AMBA
(AHB-APB) bus configuration
■Patch RAM capability
■On-chip RAM, on-chip ROM
■Commun icati on int er fac es
– Fast UART up to 4Mbps for HCI
– SPI interface up to 6 Mbps for HCI
– PCM interface for voice
– WirelessLAN coexistence with 2, 3, 4 wires
– 19 programmable GPIOs
– Fast master I2C interface
■Ciphering support up to 128-bit keys
■Software support up to HCI stack
– H4 and H5 HCI transport layer
– HCI proprietary commands and single HCI
command for patch/ upgrade download
■Internal power management
■Supports 1.65V to 2.85 Volts IO systems
■Seve n exte rnal component s: si x dec oup li ng
capacitors and one single antenna interface
■Ultra low power architecture with 3 different low
power modes: sleep , deep sleep and
complete power down
Description
The STLC2500C is a single chip ROM-based
Bluetooth solution implemented in 0.13 µm ultra
low power, ultra low leakage CMOS technology
for mobile terminal applicat ions requiring
integration up to HCI level. Patch RAM is
available, enabling multiple patches/upgrades.
The STLC2500C offers multiple interface options.
The radio has been designed specifically for
single chip requirements for minimal consumption
and BOM count.
WFBGA48 (4.5mm x 4.5 mmx 0.8 mm)
www.st.com
STLC2500C
2/4 Rev 1
Applications
■Mobile terminal platforms
Order codes
Figure 1. Block diagram
Part Number Package Packing
E-STLC2500C WFBGA48 Tray
E-STLC2500CTR WFBGA48 Tape-on-reel
Table 1. Technical specifications
Parameter Values
Power consumption
Audio communication
Data communication at maximum throughput
Complete power down
HV3: 10.9mA, 3-EV3: 6.2mA
DH1: 22mA, 3-DH5: 35.4mA
1 µA
Data rate throughput at host interface in EDR mode 2.178 Mbps
STLC2500C
Rev 1 3/4
Revision history
Table 2. Document revision history
Date Revision Changes
29-Jan-2006 1Initial releas e .
STLC2500C
4/4 Rev 1
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