application INFO available UC1861-1868 UC2861-2868 UC3861-3868 Resonant-Mode Power Supply Controllers FEATURES DESCRIPTION * Controls Zero Current Switched (ZCS) The UC1861-1868 family of ICs is optimized for the control of Zero Curor Zero Voltage Switched (ZVS) rent Switched and Zero Voltage Switched quasi-resonant converters. DifQuasi-Resonant Converters ferences between members of this device family result from the various combinations of UVLO thresholds and output options. Additionally, the * Zero-Crossing Terminated One-Shot one-shot pulse steering logic is configured to program either on-time for Timer ZCS systems (UC1865-1868), or off-time for ZVS applications (UC1861* Precision 1%, Soft-Started 5V 1864). Reference The primary control blocks implemented include an error amplifier to com* Programmable Restart Delay pensate the overall system loop and to drive a voltage controlled oscillator Following Fault (VCO), featuring programmable minimum and maximum frequencies. Triggered by the VCO, the one-shot generates pulses of a programmed maxi* Voltage-Controlled Oscillator (VCO) mum width, which can be modulated by the Zero Detection comparator. with Programmable Minimum and Maximum Frequencies from 10kHz to This circuit facilitates "true" zero current or voltage switching over various line, load, and temperature changes, and is also able to accommodate the 1MHz resonant components' initial tolerances. * Low Start-Up Current (150A typical) Under-Voltage Lockout is incorporated to facilitate safe starts upon * Dual 1 Amp Peak FET Drivers power-up. The supply current during the under-voltage lockout period is typically less than 150A, and the outputs are actively forced to the low * UVLO Option for Off-Line or DC/DC state. (continued) Applications Device UVLO Outputs "Fixed" 1861 16.5/10.5 Alternating Off Time 1862 16.5/10.5 Parallel Off Time 1863 8/7 Alternating Off Time 1864 8/7 Parallel Off Time 1865 16.5/10.5 Alternating On Time 1866 16.5/10.5 Parallel On Time 1867 8/7 Alternating On Time 1868 8/7 Parallel On Time BLOCK DIAGRAM Pin numbers refer to the J and N packages. SLUS289A - OCTOBER 1998 - REVISED FEBRUARY 2006 UDG-92018 UC1861-1868 UC2861-2868 UC3861-3868 DESCRIPTION (cont.) UVLO thresholds for the UC1861/62/65/66 are 16.5V (ON) and 10.5V (OFF), whereas the UC1863/64/67/68 thresholds are 8V (ON) and 7V (OFF). After VCC exceeds the UVLO threshold, a 5V generator is enabled which provides bias for the internal circuits and up to 10mA for external usage. delay, and the internal system reference. Each device features dual 1 Amp peak totem pole output drivers for direct interface to power MOSFETS. The outputs are programmed to alternate in the UC1861/63/65/67 devices. The UC1862/64/66/68 outputs operate in unison alllowing a 2 Amp peak current. A Fault comparator serves to detect fault conditions and set a latch while forcing the output drivers low. The SoftRef pin serves three functions: providing soft start, restart CONNNECTION DIAGRAMS ABSOLUTE MAXIMUM RATINGS PLCC-20 & LCC-20 (Top View) Q & L Package VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22V Output Current Source or Sink (Pins 11 & 14) . . . . . . . . . . . . . . . . . . . . . 0.5A DC Pulse (0.5s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5A Power Ground Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2V Inputs (Pins 2, 3, 10, & 15) . . . . . . . . . . . . . . . . . . . . -0.4 to 7V Error Amp Output Current . . . . . . . . . . . . . . . . . . . . . . . . 2mA Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W Junction Temperature (Operating). . . . . . . . . . . . . . . . . . 150C Lead Temperature (Soldering, 10 seconds) . . . . . . . . . . 300C PACKAGE PIN FUNCTION All voltages are with respect to signal ground and all currents are positive into the specified terminal. Pin numbers refer to the J and N packages. Consult Unitrode Integrated Circuits databook for information regarding thermal specifications and limitations of packages. DIL-16, SOIC-16 (Top View) J or N, DW Packages 2 FUNCTION PIN Soft Ref 5V NI INV E/A Out Sig Gnd Range RMIN CVCO RC Zero NC NC A Out Pwr Gnd Pwr Gnd VCC B Out NC Fault 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 UC1861-1868 UC2861-2868 UC3861-3868 ELECTRICAL CHARACTERISTICSUnless otherwise stated, all specifications apply for -55CTA125C for the UC186x, -25CTA85C for the UC286x, and 0CTA70C for the UC386x, VCC=12V, CVCO=1nF, Range=7.15k, RMIN=86.6k, C=200pF, R=4.02k, and Csr=0.1F. TA=TJ . PARAMETER TEST CONDITIONS MIN TYP MAX UNITS 5V Generator 4.8 5.0 5.2 V Output Voltage 12V Vcc 20V, -10mA IO 0mA -150 -15 mA Short Circuit Current VO = 0V Soft-Reference Restart Delay Current V = 2V 10 20 35 A Soft Start Current V = 2V -650 -500 -350 A 4.95 5.00 5.05 V Reference Voltage TJ = 25C, IO = 0A 4.85 5.15 V 12V VCC 20V, -200A IO 200A 2 20 mV Line Regulation 12V VCC 20V 10 30 mV Load Regulation -200A IO 200A Error Amplifier (Note 3) -10 10 mV Input Offset Voltage VCM = 5V, Vo = 2V, IO = 0A -2.0 -0.3 A Input Bias Current VCM = 0V 70 100 dB Voltage Gain Vcm = 5V, 0.5V VO 3.7V, IO = 0A 70 100 dB Power Supply Rejection Ratio Vcm = 5V, VO = 2V, 12V VCC 20V Error Amplifier (Note 3) (cont.) 65 100 dB Common Mode Rejection Ratio 0V Vcm 6V, VO = 2V VID = -100mV, IO = 200A 0.17 0.25 V VOUT Low VID = 100mV, IO = -200A 3.9 4.2 V VOUT High Unity Gain Bandwidth (Note 4) 0.5 0.8 MHz Voltage Controlled Oscillator 450 500 550 kHz Maximum Frequency VID (Error Amp) = 100mV, TJ = 25C 425 575 kHz VID (Error Amp) = 100mV 45 50 55 kHz Minimum Frequency VID (Error Amp) = -100mV, TJ = 25C 42 58 kHz VID (Error Amp) = -100mV One Shot Zero Comparator Vth 0.45 0.50 0.55 V Propagation Delay (Note 4) 120 200 ns 850 1000 1150 ns Maximum Pulse Width VZERO = 1V 2.5 4 5.5 Maximum to Minimum Pulse VZERO = 0V UCx861 - UCx864 4 5.5 7 Width Ratio VZERO = 0V UCx865 - UCx868. -55C to +85C 3.8 5.5 7 VZERO = 0V UCx865 - UCx868, +125C Output Stage 25 45 ns Rise and Fall Time CLOAD = 1nF (Note 4) 0.2 0.5 V Output Low Saturation IO = 20mA 0.5 2.2 V IO = 200mA 1.7 2.5 V Output High Saturation IO = -200mA, down from Vcc 0.8 1.5 V UVLO Low Saturation IO = 20mA Fault Comparator Fault Comparator Vth 2.85 3.00 3.15 V Delay to Output (Note 4) (Note 5) 100 200 ns 3 UC1861-1868 UC2861-2868 UC3861-3868 ELECTRICAL CHARACTERISTICSUnless otherwise stated, all specifications apply for -55CTA125C for the UC186x, -25CTA85C for the UC286x, and 0CTA70C for the UC386x, VCC=12V, CVCO=1nF, Range=7.15k, RMIN=86.6k, C=200pF, R=4.02k, and Csr=0.1F. TA=TJ . PARAMETER TEST CONDITIONS MIN TYP MAX UNITS UVLO Vcc Turn-on Threshold UCx861, UCx862, UCx865, UCx866 15 16.5 18 V UCx863, UCx864, UCx867, UCx868 7 8.0 9 V Vcc Turn-off Threshold UCx861, UCx862, UCx865, UCx866 9.5 10.5 11.5 V UCx863, UCx864, UCx867, UCx868 6 7.0 8 V 150 300 A Icc Start VCC = VCC(on) - 0.3V 25 32 mA Icc Run VID = 100mV Note 1: Currents are defined as positive into the pin. Note 2: Pulse measurement techniques are used to insure that TJ = TA. Note 3: VID = V(NI) - V(INV). Note 4: This parameter is not 100% tested in production but guaranteed by design. Note 5: Vi = 0 to 4V tr(Vi) 10ns tpd = t(Vo = 6V) - t(Vi = 3V) APPLICATION INFORMATION UVLO & 5V GENERATOR (See Figure 1):When power is applied to the chip and Vcc is less than the upper UVLO threshold, Icc will be less than 300A, the 5V generator will be off, and the outputs will be actively held low. The fault pin is input to a high speed comparator with a threshold of 3V. In the event of a detected fault, the fault latch is set and the outputs are driven low. If Soft-Ref is above 4V, the delay latch is set. Restart delay is timed as Soft-Ref is discharged by 20A. When Soft-Ref is fully discharged, the fault latch is reset if the fault input signal is low. The Fault pin can be used as a system shutdown pin. When Vcc exceeds the upper UVLO threshold, the 5V generator turns on. Until the 5V pin exceeds 4.9V, the outputs will still remain low. The 5V pin should be bypassed to signal ground with a 0.1F capacitor. The capacitor should have low equivalent series resistance and inductance. If a fault is detected during soft-start, the fault latch is set and the outputs are driven low. The delay latch will remain reset until Soft-Ref charges to 4V. This sets the delay latch, and restart delay is timed. Note that restart delay for a single fault event is longer than for recurring faults since Soft-Ref must be discharged from 5V instead of 4V. FAULT AND SOFT-REFERENCE (See Figure 1): The Soft-Ref pin serves three functions: system reference, restart delay, and soft-start. Designed to source or sink 200A, this pin should be used as the input reference for the error amplifier circuit. This pin requires a bypass capacitor of at least 0.1F. This yields a minimum soft-start time of 1ms. The restart delay to soft-start time ratio is 24:1 for a fault occurring during normal operation and 19:1 for faults occurring during soft-start. Shorter ratios can be programmed down to a limit of approximately 3:1 by the addition of a 20k or larger resistor from Soft-Ref to ground. Under-Voltage Lockout sets both the fault and restart delay latches. This holds the outputs low and discharges the Soft-Ref pin. After UVLO, the fault latch is reset by the low voltage on the Soft-Ref pin. The reset fault latch resets the delay latch and Soft-Ref charges via the 0.5mA current source. A 100k resistor from Soft-Ref to 5V will have the effect of permanent shut down after a fault since the internal 20A current source can't pull Soft-Ref low. This feature can be used to require recycling Vcc after a fault. Care must be taken to insure Soft-Ref is indeed low at start up, or the fault latch will never be reset. 4 UC1861-1868 UC2861-2868 UC3861-3868 APPLICATION INFORMATION UDG-92020 UDG-92021-1 Figure 1. UVLO, 5V, fault and soft-ref. 5 UC1861-1868 UC2861-2868 UC3861-3868 UDG-92022-1 UDG-92023-1 Figure 2. Error Amp, Voltage Controlled Oscillator, and One Shot 6 UC1861-1868 UC2861-2868 UC3861-3868 APPLICATION INFORMATION Minimum oscillator frequency is set by Rmin and Cvco. The minimum frequency is approximately given by the equation: FMIN The Error Amplifier directly controls the oscillator frequency. E/A output low corresponds to minimum frequency and output high corresponds to maximum frequency. At the end of each oscillator cycle, the RC pin is discharged to one diode drop above ground. At the beginning of the oscillator cycle, V(RC) is less than Vth1 and so the output of the zero detect comparator is ignored. After V(RC) exceeds Vth1, the one shot pulse will be terminated as soon as the zero pin falls below 0.5V or V(RC) exceeds Vth2. The minimum one shot pulse width is approximately given by the equation: 4.3 R MIN * CVCO Maximum oscillator frequency is set by Rmin, Range & Cvco. The maximum frequency is approximately given by the equation: FMAX (R MIN 3.3 / / R ange ) * CVCO Tpw(min) 0.3 R C. The maximum pulse width is approximately given by: Tpw(max) 1.2 R C. STEERING LOGIC UDG-92014 UDG-92013 The steering logic is configured on the UC1861,63 to result in dual non-overlapping square waves at outputs A & B. This is suited to drive dual switch ZVS systems. The steering logic is configured on the UC1862,64 to result in inverted pulse trains occurring identically at both output pins. This is suited to drive single switch ZVS systems. Both outputs are available to drive the same MOSFET gate. It is advisable to join the pins with 0.5 ohm resistors. UDG-92015 The steering logic is configured on the UC1865,67 to result in alternating pulse trains at outputs A & B. This is suited to drive dual switch ZCS systems. UDG-92016 The steering logic is configured on the UC1866,68 to result in non-inverted pulse trains occurring identically at both output pins. This is suited to drive single switch ZCS systems. Both outputs are available to drive the same MOSFET gate. It is advisable to join the pins with 0.5 ohm resistors. 7 UC1861-1868 UC2861-2868 UC3861-3868 APPLICATION INFORMATION (cont.) UDG-92017 Figure 3. Current waveforms. 8 PACKAGE OPTION ADDENDUM www.ti.com 24-Feb-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) 5962-9203101M2A OBSOLETE LCCC FK 20 TBD Call TI Call TI 5962-9203101MEA OBSOLETE CDIP J 16 TBD Call TI Call TI 5962-9203102MEA OBSOLETE CDIP J 16 Call TI Call TI 5962-9203103Q2A ACTIVE LCCC FK 20 1 TBD 5962-9203103QEA ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type TBD POST-PLATE N / A for Pkg Type 5962-9203103V2A ACTIVE LCCC FK 20 1 TBD Call TI N / A for Pkg Type 5962-9203103VEA ACTIVE CDIP J 16 1 TBD Call TI N / A for Pkg Type UC1861J OBSOLETE CDIP J 16 TBD Call TI Call TI UC1861J883B OBSOLETE CDIP J 16 TBD Call TI Call TI UC1863J ACTIVE CDIP J 16 TBD A42 SNPB N / A for Pkg Type UC1863J883B ACTIVE CDIP J 16 TBD A42 SNPB N / A for Pkg Type UC1863JQMLV ACTIVE CDIP J 16 TBD UC1863L ACTIVE LCCC FK 20 TBD POST-PLATE N / A for Pkg Type UC1863L883B ACTIVE LCCC FK 20 TBD POST-PLATE N / A for Pkg Type UC1863LQMLV ACTIVE LCCC FK 20 TBD Call TI Call TI UC1864J OBSOLETE CDIP J 16 TBD Call TI Call TI UC1864J883B OBSOLETE CDIP J 16 TBD Call TI Call TI UC1864L OBSOLETE LCCC FK 20 TBD Call TI Call TI UC1864L883B OBSOLETE LCCC FK 20 TBD Call TI Call TI UC1865J OBSOLETE CDIP J 16 TBD Call TI Call TI UC1865J883B OBSOLETE CDIP J 16 TBD Call TI Call TI Call TI Call TI UC1867J OBSOLETE CDIP J 16 TBD Call TI Call TI UC1867L OBSOLETE LCCC FK 20 TBD Call TI Call TI UC2861DW ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2861DWG4 ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2861DWTR ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2861DWTRG4 ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2861N ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC2861NG4 ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC2861Q ACTIVE PLCC FN 20 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR UC2861QG3 ACTIVE PLCC FN 20 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR UC2863DW ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2863DWG4 ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2863DWTR ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 24-Feb-2006 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty UC2863DWTRG4 ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2863N ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC2863NG4 ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC2864DW ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2864DWG4 ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC2864N ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC2864NG4 ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC2865N ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC2865NG4 ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC2866N ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC2866NG4 ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3861DW ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3861DWTR ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3861DWTRG4 ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3861N ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3861NG4 ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3862DW ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3862DWG4 ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3862DWTR ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3862DWTRG4 ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3862N ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3862NG4 ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3863DW ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3863DWG4 ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3863DWTR ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3863DWTRG4 ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Addendum-Page 2 Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 24-Feb-2006 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty UC3863N ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3863NG4 ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3864DW ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3864DWG4 ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3864DWTR ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3864DWTRG4 ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3864N ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3864NG4 ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3865DW ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3865DWG4 ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3865DWTR ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3865DWTRG4 ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3865N ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3865NG4 ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3865Q ACTIVE PLCC FN 20 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR UC3865QTR ACTIVE PLCC FN 20 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR UC3865QTRG3 ACTIVE PLCC FN 20 Green (RoHS & no Sb/Br) CU SN Level-2-260C-1 YEAR UC3866N ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3866NG4 ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3867DW ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3867DWG4 ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3867DWTR ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3867DWTRG4 ACTIVE SOIC DW 16 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3867N ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3868N ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3868NG4 ACTIVE PDIP N 16 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type Addendum-Page 3 Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 24-Feb-2006 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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