Connectors
12/19/12
Specifications and
Applications Information
page 1 of 5.
The ERG Smart Force SeriesSmart Force Series
Smart Force SeriesSmart Force Series
Smart Force Series of LED Drivers are specifically
designed for applications which require wide dimming and LCD
brightness stability over a wide input voltage range. The
SFD2EB4254F is designed to provide backlight power for the
NEC NL12876B26-32D display.
Designed, manufactured and supported within the USA, the
SFD2E features:
10 mm or less in height
Wide input voltage range
Constant LED current
External dimming or on-board dimming
High dimming ratio
Soft start
One year warranty
J1-1 Vin(+)
J1-2 Vin(+)
J1-3 Vin(+)
J1-4 GND
J1-5 GND
J1-6 GND
J1-7 Enable
J1-8 Control
Output Connector *
Molex
53261-1271
SmarSmar
SmarSmar
Smart Ft F
t Ft F
t Foror
oror
orce LEDce LED
ce LEDce LED
ce LED
DriverDriver
DriverDriver
Driver
Input Connector
Molex
53261-0871
Package Configuration
Mass: 18 grams typ.
J2-1 Cathode 1 J2-7 Cathode 4
J2-2 Anode A J2-8 (do not use)
J2-3 Cathode 2 J2-9 (do not use)
J2-4 Anode B J2-10 (do not use)
J2-5 Cathode 3 J2-11 (do not use)
J2-6 (do not use) J2-12 (do not use)
SFD2EB4254F
PCB components are shown for reference only. Actual product may differ from that shown.
1
Output
.125
[3,18]
Dia. (2x)
2.105
[53,47]
.700
[17,79]
.145
[3,68]
Input
1.115
[28,32]
4.585
[116,5]
.830
[21,08]
1
* Requires harness:
ERG part number H18106152F recommended
page 2 of 5.
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SFD2EB4254F
Specifications subject to change without notice.
Note 1 Surface temperature must not exceed 80°C.
Note 2 Peak inrush occurs over a 1 to 3 ms time period during initial startup.
Note 3 Efficiency is calculated using a 26.5V LED string.
Note 4 Enable pin is internally pulled up above the turn-on threshold.
Note 5 Enable pin input impedance is 10kΩ to 12V.
Note 6 Control pin is internally pulled up above the turn-on threshold.
Note 7 Control pin input impedance is 485kΩ.
page 3 of 5.
Application Information
The ERG SFD2EB4254F has been designed to be configured in multiple ways:
NO DIMMING
•OPERATION: The SFD2E can be configured to operate without dimming by floating the Control (J1-8) pin and
Enable (J1-7) pin.
•Pins 1, 2 and 3 of connector J1 must be connected to +Vin, between 10.8 and 18 Vdc. Pins 4, 5 and 6 of
connector J1 must be connected to GND.
ONBOARD PWM DIMMING
•OPERATION: Onboard PWM configuration as shown in Figure 1 allows the user to control display brightness by
controlling the onboard PWM generator. The user is responsible to provide an analog control signal.
•DIMMING: Dimming is accomplished by applying an analog voltage to the Control Pin (J1-8). Display brightness
is modulated by controlling the Control Pin voltage as shown in Graph 1.
•ENABLE/DISABLE: The driver may be enabled or disabled (turned on and off) by applying a DC voltage to the
Enable Pin(J1-7). Enable Pin on and off levels are specified in the Operating Characteristics section of the data
sheet. Enable pin is internally pulled up above the turn-on threshold.
•Pins 1, 2 and 3 of connector J1 must be connected to +Vin, between 10.8 and 18 Vdc. Pins 4, 5 and 6 of
connector J1 must be connected to GND.
EXTERNAL PWM DIMMING
•OPERATION: External PWM configuration as shown in Figure 2 allows the user to control display brightness
with an externally generated PWM signal. The user is responsible to provide the PWM signal.
•DIMMING: Dimming is accomplished by applying a PWM signal to the Enable Pin (J1-7). Enable on and off
levels are specified in the Operating Characteristics section of the data sheet. Display brightness is modulated
by controlling the PWM duty cycle as shown in Graph 2.
•Pins 1 through 3 of connector J1 must be connected to +Vin, between 10.8 and 18 Vdc. Pins 4 through 6 of
connector J1 must be connected to GND.
SFD2EB4254F
page 4 of 5.
SFD2EB4254F
Graph 1
ONBOARD PWM DIMMING
Figure 1
Vin
GND
Control
Enable
J2
+12V
GND
Vin
Analog Dimming
Voltage (0 to 5V)
J1
1,2,3
4,5,6
8
7
+On
-Off
Optional
Potentiometer
1,2,3
4,5,6
Cathode 1
Cathode 2
Anode B
Anode A
Cathode 3
Cathode 4
page 5 of 5.
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Endicott Research Group, Inc. (ERG) reserves the right to make changes in circuit design and/or
specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets
are current before placing orders. Information furnished by ERG is believed to be accurate and
reliable. However, no responsibility is assumed by ERG for its use.
Graph 2
Figure 2
Control
Enable
J2
+12V
GND
Vin
J1
1,2,3
4,5,6
8
7
EXTERNAL PWM DIMMING
(1)
(1) Nonlinear relationship from 0 to 2% duty cycle.
5V
0V
Duty Cycle
0% - 100%
Cathode 1
Cathode 2
Anode B
Anode A
Cathode 3
Cathode 4
