General Description
The MAX16041/MAX16042/MAX16043 are dual-/triple-/
quad-voltage monitors and sequencers that are offered
in a small thin QFN package. These devices offer enor-
mous design flexibility as they allow fixed and
adjustable thresholds to be selected through logic
inputs and provide sequence timing through small
external capacitors. These versatile devices are ideal
for use in a wide variety of multivoltage applications.
As the voltage at each monitored input exceeds its
respective threshold, its corresponding output goes
high after a propagation delay or a capacitor-set time
delay. When a voltage falls below its threshold, its
respective output goes low after a propagation delay.
Each detector circuit also includes its own enable input,
allowing the power-good outputs to be shut off inde-
pendently. The independent output for each detector
has an open-drain configuration capable of supporting
voltages up to 28V, thereby allowing them to interface
to shutdown and enable inputs of various DC-DC regu-
lators. Each detector can operate independently as four
separate supervisory circuits or can be daisy-chained
to provide controlled power-supply sequencing.
The MAX16041/MAX16042/MAX16043 also include a
push-pull reset function that deasserts only after all of
the independently monitored voltages exceed their
threshold. The reset timeout is internally fixed or can be
adjusted externally. These devices are offered in a
4mm x 4mm TQFN package and are fully specified
from -40°C to +125°C.
Applications
Multivoltage Systems
DC-DC Supplies
Servers/Workstations
Storage Systems
Networking/Telecommunication Equipment
Features
o2.2V to 28V Operating Voltage Range
oFixed Thresholds for 3.3V, 2.5V, 1.8V, 1.5V, and
1.2V Systems
o1.5% Accurate Adjustable Threshold Monitors
Voltages Down to 0.5V
o2.7% Accurate Fixed Thresholds Over
Temperature
oFixed (140ms min)/Capacitor-Adjustable Delay
Timing
oIndependent Open-Drain Outputs/Push-Pull
RESET Output
oEnable Inputs for Each Monitored Voltage
o9 Logic-Selectable Threshold Options
oManual Reset and Tolerance Select (5%/10%) Inputs
oSmall, 4mm x 4mm TQFN Package
oFully Specified from -40°C to +125°C
MAX16041/MAX16042/MAX16043
Dual-/Triple-/Quad-Voltage, Capacitor-
Adjustable, Sequencing/Supervisory Circuits
________________________________________________________________
Maxim Integrated Products
1
TOP VIEW
+
23
24
22
21
8
7
9
IN1
IN3
IN4
TOL
10
VCC
OUT1
OUT3
OUT4
RESET
TH0
12
CDLY3
456
1718 16 14 13
CDLY2
CDLY1
EN3
EN2
EN1
GND
MAX16043
IN2 OUT2
3
15
CDLY4
20 11 EN4
CRESET
19 12 TH1
MR
TQFN
(4mm x 4mm)
Pin Configurations
Ordering Information
19-0622; Rev 0; 8/06
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
+
Denotes lead-free package.
*
For tape and reel, add a “T” after the “+.” All tape and reel
orders are available in 2.5k increments.
PART* TEMP RANGE PIN-
PACKAGE
PKG
CODE
MAX16041TE+ -40°C to +125°C 16 TQFN T1644-4
MAX16042TP+ -40°C to +125°C 20 TQFN T2044-3
MAX16043TG+ -40°C to +125°C 24 TQFN T2444-4
Selector Guide
PART MONITORED
VOLTAGES
INDEPENDENT
OUTPUTS
RESET
OUTPUT
MAX16041 2 2 (Open-drain) Push-pull
MAX16042 3 3 (Open-drain) Push-pull
MAX16043 4 4 (Open-drain) Push-pull
Pin Configurations continued at end of data sheet.
MAX16041/MAX16042/MAX16043
Dual-/Triple-/Quad-Voltage, Capacitor-
Adjustable, Sequencing/Supervisory Circuits
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC = 2.2V to 28V, TA= -40°C to +125°C, unless otherwise specified. Typical values are at VCC = 3.3V and TA = +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND.)
VCC .........................................................................-0.3V to +30V
EN1–EN4 ....................................................-0.3V to (VCC + 0.3V)
OUT1–OUT4 ...........................................................-0.3V to +30V
RESET.........................................................-0.3V to (VCC + 0.3V)
IN1–IN4.......................................................-0.3V to (VCC + 0.3V)
MR, TOL, TH1, TH0 ....................................-0.3V to (VCC + 0.3V)
CDLY1–CDLY4 .........................................................-0.3V to +6V
CRESET......................................................-0.3V to (VCC + 0.3V)
Input/Output Current (all pins)..........................................±20mA
Continuous Power Dissipation (TA= +70°C)
16-Pin TQFN (derate 25mW/°C above +70°C) ...........2000mW
20-Pin TQFN (derate 25.6mW/°C above +70°C) ........2051mW
24-Pin TQFN (derate 27.8mW/°C above +70°C) ........2222mW
Operating Temperature Range .........................-40°C to +125°C
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SUPPLY
Operating Voltage Range VCC (Note 2) 2.2 28.0 V
Undervoltage Lockout UVLO (Note 2) 1.8 1.9 2.0 V
Undervoltage-Lockout Hysteresis UVLOHYST VCC falling 50 mV
VCC = 3.3V 40 75
VCC = 12V 47 75
VCC Supply Current ICC
All OUT_ and RESET at
logic-high (IN_ current
excluded) VCC = 28V 52 80
µA
INPUTS (IN_)
3.3V threshold, TOL = GND 2.970 3.052 3.135
3.3V threshold, TOL = VCC 2.805 2.888 2.970
2.5V threshold, TOL = GND 2.250 2.313 2.375
2.5V threshold, TOL = VCC 2.125 2.187 2.250
1.8V threshold, TOL = GND 1.620 1.665 1.710
1.8V threshold, TOL = VCC 1.530 1.575 1.620
1.5V threshold, TOL = GND 1.350 1.387 1.425
1.5V threshold, TOL = VCC 1.275 1.312 1.350
1.2V threshold, TOL = GND 1.080 1.110 1.140
IN_ Thresholds (IN_ Falling) VTH
1.2V threshold, TOL = VCC 1.020 1.050 1.080
V
TOL = GND 0.492 0.5 0.508
Adjustable Threshold
(IN_ Falling) VTH TOL = VCC 0.463 0.472 0.481 V
IN_ Hysteresis (IN_ Rising) VHYST 0.5 %
IN_ Input Resistance Fixed threshold 500 918 k
IN_ Input Current ILAdjustable threshold only (VIN_ = 1V) -100 +100 nA
MAX16041/MAX16042/MAX16043
Dual-/Triple-/Quad-Voltage, Capacitor-
Adjustable, Sequencing/Supervisory Circuits
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 2.2V to 28V, TA= -40°C to +125°C, unless otherwise specified. Typical values are at VCC = 3.3V and TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
CRESET AND CDLY_
CRESET Threshold VTH-RESET CRESET rising, VCC = 3.3V 0.465 0.5 0.535 V
CRESET Charge Current ICH-RESET VCC = 3.3V 380 500 620 nA
CDLY_ Threshold VTH-CDLY CDLY_ rising, VCC = 3.3V 0.95 1 1.05 V
CDLY_ Charge Current ICH-CDLY VCC = 3.3V 200 250 300 nA
DIGITAL LOGIC INPUTS (EN_, MR, TOL, TH1, TH0)
Input Low Voltage VIL 0.4 V
Input High Voltage VIH 1.4 V
TH1, TH0 Logic-Input Floating 0.6 V
TOL, TH1, TH0 Logic-Input
Current VTOL, VTH1, VTH0 = GND or VCC -1 +1 µA
EN_ Input Leakage Current VEN_ = VCC or GND -100 +100 nA
MR Internal Pullup Current VCC = 3.3V 250 535 820 nA
OUTPUTS (OUT_, RESET)
VCC 1.2V, ISINK = 90µA 0.3
VCC 2.25V, ISINK = 0.5mA 0.3
Output Low Voltage
(Open-Drain or Push-Pull) VOL
VCC 4.5V, ISINK = 1mA 0.35
V
VCC 3V, ISOURCE = 500µA 0.8 x VCC
Output High Voltage (Push-Pull) VOH VCC 4.5V, ISOURCE = 800µA 0.8 x VCC
V
Output Leakage Current
(Open-Drain) ILKG Output not asserted low, VOUT = 28V 1 µA
CRESET = VCC, VCC = 3.3V 140 190 260
Reset Timeout Period tRP CRESET open 0.030 ms
TIMING
tDELAY+ IN_ rising, CDLY_ open 35
IN_ to OUT_ Propagation Delay tDELAY- IN_ falling, CDLY_ open 20 µs
IN_ to RESET Propagation Delay tRST-DELAY CRESET open, IN_ falling 35 µs
MR Minimum Input Pulse Width (Note 3) 2 µs
EN_ or MR Glitch Rejection 280 ns
tOFF From device enabled to device disabled 3
EN_ to OUT_ Delay tON From device disabled to device enabled
(CDLY_ open) 30 µs
MR to RESET Delay MR falling 3 µs
Note 1: Devices are production tested at TA = +25°C. Limits over temperature are guaranteed by design.
Note 2: Operating below the UVLO causes all outputs to go low. The outputs are guaranteed to be in the correct state for VCC down
to 1.2V.
Note 3: To guarantee an assertion, the minimum input pulse width must be greater than 2µs.
MAX16041/MAX16042/MAX16043
Dual-/Triple-/Quad-Voltage, Capacitor-
Adjustable, Sequencing/Supervisory Circuits
4 _______________________________________________________________________________________
Typical Operating Characteristics
(VCC = 3.3V, TA= +25°C, unless otherwise noted.)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX16041 toc01
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (µA)
26221814106
35
40
45
50
55
60
30
230
MAX16041
SUPPLY CURRENT
vs. TEMPERATURE
MAX16041 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
1109580655035205-10-25
35
40
45
50
55
60
30
-40 125
MAX16041
VCC = 28V
VCC = 12V
VCC = 3.3V
NORMALIZED ADJUSTABLE THRESHOLD
vs. TEMPERATURE
MAX16041 toc03
TEMPERATURE (°C)
NORMALIZED THRESHOLD
1109565 80-10 520 35 50-25
0.991
0.992
0.993
0.994
0.995
0.996
0.997
0.998
0.999
1.000
1.001
1.002
1.003
0.990
-40 125
TOL = VCC
TOL = GND
ADJUSTABLE THRESHOLD
NORMALIZED ADJUSTABLE THRESHOLD
vs. TEMPERATURE
MAX16041 toc04
TEMPERATURE (°C)
NORMALIZED THRESHOLD
1109565 80-10 5 20 35 50-25
0.991
0.992
0.993
0.994
0.995
0.996
0.997
0.998
0.999
1.000
1.001
1.002
1.003
0.990
-40 125
TOL = VCC
TOL = GND
3.3V THRESHOLD
OUT_ DELAY vs. CCDLY_
MAX16041 toc05
CCDLY_ (nF)
OUT_ DELAY (ms)
900800600 700200 300 400 500100
500
1000
1500
2000
2500
3000
3500
4000
4500
5000
0
01000
RESET TIMEOUT PERIOD
vs. CCRESET
MAX16041 toc06
CCRESET (nF)
RESET TIMEOUT PERIOD (ms)
900800600 700200 300 400 500100
100
200
300
400
500
600
700
800
900
1000
1100
1200
0
01000
FIXED RESET TIMEOUT PERIOD
vs. TEMPERATURE
MAX16041 toc07
TEMPERATURE (°C)
FIXED RESET TIMEOUT PERIOD (ms)
1109565 80-10 5 20 35 50-25
181
182
183
184
185
186
187
188
189
190
180
-40 125
CRESET = VCC
OUT_ LOW VOLTAGE
vs. SINK CURRENT
MAX16041 toc08
SINK CURRENT (mA)
VOUT_ (V)
6
5
4321
0.2
0.4
0.6
0.8
1.0
0
07
RESET OUTPUT LOW VOLTAGE
vs. SINK CURRENT
MAX16041 toc09
SINK CURRENT (mA)
RESET OUTPUT LOW VOLTAGE (V)
653 421
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0
07
MAX16041/MAX16042/MAX16043
Dual-/Triple-/Quad-Voltage, Capacitor-
Adjustable, Sequencing/Supervisory Circuits
_______________________________________________________________________________________
5
RESET OUTPUT HIGH VOLTAGE
vs. SOURCE CURRENT
MAX16041 toc10
SOURCE CURRENT (mA)
RESET OUTPUT HIGH VOLTAGE (V)
0.90.80.70.60.50.40.30.20.1
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
01.0
ENABLE TURN-OFF
MAX16041 toc11
4µs/div
EN_
5V/div
OUT_
5V/div
RESET
5V/div
CRESET = VCC
CDLY_ = OPEN
ENABLE TURN-ON
MAX16041 toc12
40ms/div
EN_
5V/div
OUT_
5V/div
RESET
5V/div
CRESET = VCC
CDLY_ = OPEN
RESET TIMEOUT DELAY
MAX16041 toc13
100ms/div
IN_
5V/div
OUT_
5V/div
RESET
5V/div
CRESET = VCC
CDLY_ = OPEN
MR FALLING vs. RESET
MAX16041 toc14
4µs/div
RESET
5V/div
CRESET = VCC
CDLY_ = OPEN
MR
5V/div
MR RISING vs. RESET
MAX16041 toc15
40ms/div
RESET
5V/div
CRESET = VCC
CDLY_ = OPEN
MR
5V/div
MAXIMUM TRANSIENT DURATION
vs. THRESHOLD OVERDRIVE
MAX16041 toc16
THRESHOLD OVERDRIVE (mV)
MAXIMUM TRANSIENT DURATION (µs)
10010
10
20
30
40
50
60
70
80
90
100
0
11000
OUTPUT ASSERTED ABOVE THIS LINE
Typical Operating Characteristics (continued)
(VCC = 3.3V, TA= +25°C, unless otherwise noted.)
MAX16041/MAX16042/MAX16043
Dual-/Triple-/Quad-Voltage, Capacitor-
Adjustable, Sequencing/Supervisory Circuits
6 _______________________________________________________________________________________
Pin Description
PIN
MAX16041 MAX16042 MAX16043 NAME FUNCTION
111V
CC
Supply Voltage Input. Connect a 2.2V to 28V supply voltage to power the
device. All outputs are low when VCC is below the UVLO. For noisy systems,
bypass VCC to GND with a 0.1µF capacitor.
2 2 2 IN1
Monitored Input 1. When the voltage at IN1 exceeds its threshold, OUT1 goes
high after the capacitor-adjustable delay period. When the voltage at IN1 falls
below its threshold, OUT1 goes low after a propagation delay.
3 3 3 IN2
Monitored Input 2. When the voltage at IN2 exceeds its threshold, OUT2 goes
high after the capacitor-adjustable delay period. When the voltage at IN2 falls
below its threshold, OUT2 goes low after a propagation delay.
4 4 IN3
Monitored Input 3. When the voltage at IN3 exceeds its threshold, OUT3 goes
high after the capacitor-adjustable delay period. When the voltage at IN3 falls
below its threshold, OUT3 goes low after a propagation delay.
5 IN4
Monitored Input 4. When the voltage at IN4 exceeds its threshold, OUT4 goes
high after the capacitor-adjustable delay period. When the voltage at IN4 falls
below its threshold, OUT4 goes low after a propagation delay.
4 5 6 TOL Threshold Tolerance Input. Connect TOL to GND to select thresholds 5%
below nominal. Connect TOL to VCC to select thresholds 10% below nominal.
5 6 7 GND Ground
6 7 8 EN1
Active-High Logic-Enable Input 1. Driving EN1 low causes OUT1 to go low
regardless of the input voltage. Drive EN1 high to enable the monitoring
comparator.
7 8 9 EN2
Active-High Logic-Enable Input 2. Driving EN2 low causes OUT2 to go low
regardless of the input voltage. Drive EN2 high to enable the monitoring
comparator.
9 10 EN3
Active-High Logic-Enable Input 3. Driving EN3 low causes OUT3 to go low
regardless of the input voltage. Drive EN3 high to enable the monitoring
comparator.
11 EN4
Active-High Logic-Enable Input 4. Driving EN4 low causes OUT4 to go low
regardless of the input voltage. Drive EN4 high to enable the monitoring
comparator.
81012TH1
Threshold Select Input 1. Connect TH1 to VCC or GND, or leave it open to
select the input-voltage threshold option in conjunction with TH0 (see Table 2).
91113TH0
Threshold Select Input 0. Connect TH0 to VCC or GND, or leave it open to
select the input-voltage threshold option in conjunction with TH1 (see Table 2).
14 OUT4 Output 4. When the voltage at IN4 is below its threshold or EN4 goes low,
OUT4 goes low.
12 15 OUT3 Output 3. When the voltage at IN3 is below its threshold or EN3 goes low,
OUT3 goes low.
10 13 16 OUT2 Output 2. When the voltage at IN2 is below its threshold or EN2 goes low,
OUT2 goes low.
MAX16041/MAX16042/MAX16043
Dual-/Triple-/Quad-Voltage, Capacitor-
Adjustable, Sequencing/Supervisory Circuits
_______________________________________________________________________________________ 7
Pin Description (continued)
PIN
MAX16041 MAX16042 MAX16043 NAME FUNCTION
11 14 17 OUT1 Output 1. When the voltage at IN1 is below its threshold or EN1 goes low,
OUT1 goes low.
12 15 18 RESET
Active-Low Reset Output. RESET asserts low when any of the monitored
voltages (IN_) falls below its respective threshold, any EN_ goes low, or MR is
asserted. RESET remains asserted for the reset timeout period after all of the
monitored voltages exceed their respective threshold, all EN_ are high, all
OUT_ are high, and MR is deasserted.
13 16 19 MR
Active-Low Manual Reset Input. Pull MR low to assert RESET low. RESET
remains low for the reset timeout period after MR is deasserted (as long as all
OUT_ are high).
14 17 20 CRESET
Capacitor-Adjustable Reset Delay Input. Connect an external capacitor from
CRESET to GND to set the reset timeout period or connect to VCC for the
default 140ms minimum reset timeout period. Leave CRESET open for internal
propagation delay.
21 CDLY4
Capacitor-Adjustable Delay Input 4. Connect an external capacitor from
CDLY4 to GND to set the IN4 to OUT4 (and EN4 to OUT4) delay period.
Leave CDLY4 open for internal propagation delay.
18 22 CDLY3
Capacitor-Adjustable Delay Input 3. Connect an external capacitor from
CDLY3 to GND to set the IN3 to OUT3 (and EN3 to OUT3) delay period.
Leave CDLY3 open for internal propagation delay.
15 19 23 CDLY2
Capacitor-Adjustable Delay Input 2. Connect an external capacitor from
CDLY2 to GND to set the IN2 to OUT2 (and EN2 to OUT2) delay period.
Leave CDLY2 open for internal propagation delay.
16 20 24 CDLY1
Capacitor-Adjustable Delay Input 1. Connect an external capacitor from
CDLY1 to GND to set the IN1 to OUT1 (and EN1 to OUT1) delay period.
Leave CDLY1 open for internal propagation delay.
——EP
Exposed Pad. EP is internally connected to GND. Connect EP to the
ground plane.
Detailed Description
The MAX16041/MAX16042/MAX16043 are low-voltage,
accurate, dual-/triple-/quad-voltage microprocessor
(µP) supervisors in a small TQFN package. These
devices provide supervisory and sequencing functions
for complex multivoltage systems. The MAX16041 mon-
itors two voltages, the MAX16042 monitors three volt-
ages, and the MAX16043 monitors four voltages.
The MAX16041/MAX16042/MAX16043 offer indepen-
dent outputs and enable functions for each monitored
voltage. This configuration allows the device to operate as
four separate supervisory circuits or be daisy-chained
together to allow controlled sequencing of power supplies
during power-up initialization. When all of the monitored
voltages exceed their respective thresholds, an inde-
pendent reset output deasserts to allow the system
processor to operate.
These devices offer enormous flexibility as there are
nine threshold options that are selected through two
threshold-select logic inputs. Each monitor circuit also
offers an independent enable input to allow both digital
and analog control of each monitor output. A tolerance
select input allows these devices to be used in systems
requiring 5% or 10% power-supply tolerances. In addi-
tion, the time delays and reset timeout can be adjusted
using small capacitors. There is also a fixed 140ms
minimum reset timeout feature.
MAX16041/MAX16042/MAX16043
Dual-/Triple-/Quad-Voltage, Capacitor-
Adjustable, Sequencing/Supervisory Circuits
8 _______________________________________________________________________________________
LOGIC
1V
250nA
OUT1
OUT2
OUT3
OUT4
RESET
EN1EN2EN3EN4TH1TH0
IN1
IN2
IN3
IN4
GND
TOL
DRIVER
DRIVER
DRIVER
DRIVER
DELAY
DELAY
DELAY
DELAY
VCC CDLY1 CDLY2 CDLY3 CDLY4 CRESET MR
REFERENCE
THRESHOLD
SELECT
LOGIC
RESET
DELAY
LOGIC
DRIVER
MAX16043
Figure 1. MAX16043 Simplified Functional Diagram
MAX16041/MAX16042/MAX16043
Dual-/Triple-/Quad-Voltage, Capacitor-
Adjustable, Sequencing/Supervisory Circuits
_______________________________________________________________________________________ 9
Applications Information
Tolerance
The MAX16041/MAX16042/MAX16043 feature a pin-
selectable threshold tolerance. Connect TOL to GND to
select the thresholds 5% below the nominal value.
Connect TOL to VCC to select the threshold tolerance
10% below the nominal voltage. Do not leave TOL uncon-
nected.
Adjustable Input
These devices offer several monitoring options with both
fixed and/or adjustable reset thresholds (see Table 2).
For the adjustable threshold inputs, the threshold voltage
(VTH) at each adjustable IN_ input is typically 0.5V (TOL
= GND) or 0.472V (TOL = VCC). To monitor a voltage
VINTH, connect a resistive divider network to the circuit as
shown in Figure 3 and use the following equation to cal-
culate the threshold voltage:
Choosing the proper external resistors is a balance
between accuracy and power use. The input to the volt-
age monitor is a high-impedance input with a small
100nA leakage current. This leakage current contributes
to the overall error of the threshold voltage where the out-
put is asserted. This induced error is proportional to the
value of the resistors used to set the threshold. With lower
value resistors, this error is reduced, but the amount of
power consumed in the resistors increases.
VV R
R
INTH TH
+
11
2
Figure 2. Timing Diagram (CDLY_ Open)
VCC
VTH VTH
t < tON
VUVLO
tON
tRP
tDELAY-
tDELAY+
tRST_DELAY
tOFF
tRP tRP
tON
IN_
EN_
OUT_
RESET
MAX16041/MAX16042/MAX16043
The following equation is provided to help estimate the
value of the resistors based on the amount of acceptable
error:
where eAis the fraction of the maximum acceptable
absolute resistive divider error attributable to the input
leakage current (use 0.01 for ±1%), VINTH is the voltage
at which the output (OUT_) should assert, and ILis the
worst-case IN_ leakage current (see the
Electrical
Characteristics
). Calculate R2 as follows:
Unused Inputs
Connect any unused IN_ and EN_ inputs to VCC.
OUT_ Output
The MAX16041/MAX16042/MAX16043 feature open-drain
outputs. An OUT_ goes low when its respective IN_ input
voltage drops below its specified threshold or when its
EN_ goes low (see Table 1). OUT_ goes high when EN_
is high and VIN_ is above its threshold after a time delay.
Open-drain outputs require an external pullup resistor to
any voltage from 0 to 28V.
RESET
Output
RESET asserts low when any of the monitored voltages
(IN_) falls below its respective threshold, any EN_ goes
low, or MR is asserted. RESET remains asserted for the
reset timeout period after all of the monitored voltages
exceed their respective thresholds, all EN_ are high, all
OUT_ are high, and MR is deasserted. All devices have
a push-pull, active-low reset output.
RVR
VV
TH
INTH TH
21
=×
ReV
I
A INTH
L
1=×
Dual-/Triple-/Quad-Voltage, Capacitor-
Adjustable, Sequencing/Supervisory Circuits
10 ______________________________________________________________________________________
IN_
VTH
VINTH
R1 = R2 x
(
)
VINTH
VTH
R1
R2
MAX16041
MAX16042
MAX16043
-1
Figure 3. Setting the Adjustable Input
Table 1. Output State*
EN_ IN_ OUT_
Low VIN_ < VTH Low
High VIN_ < VTH Low
Low VIN_ > VTH Low
High VIN_ > VTH OUT_ = high impedance
*
When VCC falls below the UVLO, all outputs go low regardless
of the state of EN_ and VIN_. The outputs are guaranteed to be
in the correct state for VCC down to 1.2V.
Table 2. Input-Voltage Threshold Selector
TH1/TH0
LOGIC
IN1 (ALL
VERSIONS)
(V)
IN2 (ALL
VERSIONS)
(V)
IN3
(MAX16042)
(V)
IN4
(MAX16043)
(V)
Low/Low 3.3 2.5 1.8 1.5
Low/High 3.3 1.8 Adj Adj
Low/Open 3.3 1.5 Adj Adj
High/Low 3.3 1.2 1.8 2.5
High/High 2.5 1.8 Adj Adj
High/Open 3.3 Adj 2.5 Adj
Open/Low 3.3 Adj Adj Adj
Open/High 2.5 Adj Adj Adj
Open/Open Adj Adj Adj Adj
Adjustable Reset Timeout Period
(CRESET)
All of these parts offer an internally fixed reset timeout
(140ms min) by connecting CRESET to VCC. The reset
timeout can also be adjusted by connecting a capaci-
tor from CRESET to GND. When the voltage at CRESET
reaches 0.5V, RESET goes high. When RESET goes
high, CRESET is immediately held low.
Calculate the reset timeout period as follows:
where VTH-RESET is 0.5V, ICH-RESET is 0.5µA, tRP is in
seconds, and CCRESET is in Farads. To ensure timing
accuracy and proper operation, minimize leakage at
CCRESET.
Adjustable Delay (CDLY_)
When VIN rises above VTH with EN_ high, the internal
250nA current source begins charging an external
capacitor connected from CDLY_ to GND. When the
voltage at CDLY_ reaches 1V, OUT_ goes high. When
OUT_ goes high, CDLY_ is immediately held low.
Adjust the delay (tDELAY) from when VIN rises above
VTH (with EN_ high) to OUT_ going high according to
the equation:
where VTH-CDLY is 1V, ICH-CDLY is 0.25µA, CCDLY is in
Farads, and tDELAY is in seconds. To ensure timing
accuracy and proper operation, minimize leakage
at CDLY.
Manual-Reset Input (
MR
)
Many µP-based products require manual-reset capabil-
ity, allowing the operator, a test technician, or external
logic circuitry to initiate a reset. A logic-low on MR
asserts RESET low. RESET remains asserted while MR
is low and during the reset timeout period (140ms fixed
or capacitor adjustable) after MR returns high. The MR
input has a 500nA internal pullup, so it can be left
unconnected, if not used. MR can be driven with TTL or
CMOS logic levels, or with open-drain/collector outputs.
Connect a normally open momentary switch from MR to
GND to create a manual-reset function. External
debounce circuitry is not required. If MR is driven from
long cables or if the device is used in a noisy environ-
ment, connect a 0.1µF capacitor from MR to GND to
provide additional noise immunity.
Pullup Resistor Values
The exact value of the pullup resistors for the open-
drain outputs is not critical, but some consideration
should be made to ensure the proper logic levels
when the device is sinking current. For example, if
VCC = 2.25V and the pullup voltage is 28V, keep the
sink current less than 0.5mA as shown in the
Electrical
Characteristics
. As a result, the pullup resistor should
be greater than 56k. For a 12V pullup, the resistor
should be larger than 24k. Note that the ability to sink
current is dependent on the VCC supply voltage.
Power-Supply Bypassing
The device operates with a VCC supply voltage from
2.2V to 28V. When VCC falls below the UVLO threshold,
all the outputs go low and stay low until VCC falls below
1.2V. For noisy systems or fast rising transients on VCC,
connect a 0.1µF ceramic capacitor from VCC to GND
as close to the device as possible to provide better
noise and transient immunity.
Ensuring Valid Reset Output
with VCC Down to 0V
When VCC falls below 1.2V, the ability for the output to
sink current decreases. To ensure a valid output as
VCC falls to 0V, connect a 100kresistor from RESET
to GND.
Typical Application Circuits
Figures 4 and 5 show typical applications for the
MAX16041/MAX16042/MAX16043. In high-power appli-
cations, using an n-channel device reduces the loss
across the MOSFETs as it offers a lower drain-to-source
on-resistance. However, an n-channel MOSFET
requires a sufficient VGS voltage to fully enhance it for a
low RDS_ON. The application in Figure 4 shows the
MAX16042 configured in a multiple-output sequencing
application. Figure 5 shows the MAX16043 in a power-
supply sequencing application using n-channel
MOSFETs.
tV
IC
DELAY TH CDLY
CH CDLY CDLY
+×
35 10 6
tV
IC
RP TH RESET
CH RESET CRESET
+×
30 10 6
MAX16041/MAX16042/MAX16043
Dual-/Triple-/Quad-Voltage, Capacitor-
Adjustable, Sequencing/Supervisory Circuits
______________________________________________________________________________________ 11
MAX16041/MAX16042/MAX16043
Dual-/Triple-/Quad-Voltage, Capacitor-
Adjustable, Sequencing/Supervisory Circuits
12 ______________________________________________________________________________________
Figure 4. Sequencing Multiple-Voltage System
Figure 5. Multiple-Voltage Sequencing Using n-Channel FETs
EN1
TH1
MR
CDLY1 CDLY2 CDLY3 CRESET GND TOL
OUT1 EN2 IN2 OUT2 EN3 IN3
OUT3
IN1
EN
DC-DC OUT
+2.5V
IN
MAX16042
3.3V
EN
DC-DC OUT
+1.8V
IN
EN
DC-DC OUT
+1.5V
IN
RESET SYSTEM
RESET
TH0
VCC
VCC
EN1
EN4
CDLY1 CDLY2 CDLY3 CDLY4 CRESET GND TOL TH0 TH1
IN2OUT1 OUT2 IN3 OUT3 IN4
OUT4
IN1
12V
BUS
1.5V
1.8V
2.5V
3.3V
MAX16043
MR
RESET SYSTEM
RESET
TO
LOADS
EN3
EN2
MAX16041/MAX16042/MAX16043
Dual-/Triple-/Quad-Voltage, Capacitor-
Adjustable, Sequencing/Supervisory Circuits
______________________________________________________________________________________ 13
+
TOP VIEW
19
20
18
17
7
6
8
IN1
IN3
TOL
9
VCC
OUT1
OUT3
TH0
RESET
12
CDLY3
45
15 14 12 11
CDLY2
CDLY1
EN3
EN2
EN1
GND
MAX16042
IN2 OUT2
3
13
CRESET
16 10 TH1
MR
TQFN
(4mm x 4mm)
15
16
+
14
13
6
5
7
IN1
TOL
8
VCC
OUT1
TH0
RESET
12
CRESET
4
12 11 9
CDLY2
CDLY1
TH1
EN2
EN1
GND
MAX16041
IN2 OUT2
3
10
MR
TQFN
(4mm x 4mm)
Pin Configurations (continued)
Chip Information
PROCESS: BICMOS
MAX16041/MAX16042/MAX16043
Dual-/Triple-/Quad-Voltage, Capacitor-
Adjustable, Sequencing/Supervisory Circuits
14 ______________________________________________________________________________________
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
24L QFN THIN.EPS
PACKAGE OUTLINE,
21-0139
2
1
E
12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm
MAX16041/MAX16042/MAX16043
Dual-/Triple-/Quad-Voltage, Capacitor-
Adjustable, Sequencing/Supervisory Circuits
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________
15
© 2006 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE,
21-0139
2
2
E
12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm
Mouser Electronics
Authorized Distributor
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