MC74LVX00 Quad 2-Input NAND Gate With 5 V-Tolerant Inputs The MC74LVX00 is an advanced high speed CMOS 2-input NAND gate. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. http://onsemi.com Features * * * * * * * * * High Speed: tPD = 4.1 ns (Typ) at VCC = 3.3 V Low Power Dissipation: ICC = 2 mA (Max) at TA = 25C Power Down Protection Provided on Inputs Balanced Propagation Delays Low Noise: VOLP = 0.5 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 mA ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V These Devices are Pb-Free and are RoHS Compliant MARKING DIAGRAMS 14 SOIC-14 D SUFFIX CASE 751A 14 1 LVX08G AWLYWW 1 14 14 1 TSSOP-14 DT SUFFIX CASE 948G 1 LVX 08 ALYWG G 14 14 1 LVX08 ALYWG SOEIAJ-14 M SUFFIX CASE 965 1 LVX08 = Specific Device Code A = Assembly Location WL, L = Wafer Lot Y = Year WW, W = Work Week G or G = Pb-Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. (c) Semiconductor Components Industries, LLC, 2011 March, 2011 - Rev. 4 1 Publication Order Number: MC74LVX00/D MC74LVX00 VCC A2 B2 O2 A3 B3 O3 14 13 12 11 10 9 8 PIN NAMES 1 2 3 4 5 6 7 A0 B0 O0 A1 B1 O1 GND Pins Function An, Bn On Data Inputs Outputs Figure 1. 14-Lead Pinout (Top View) A0 B0 A1 B1 A2 B2 A3 B3 1 3 2 FUNCTION TABLE O0 Inputs 4 6 5 An Bn On O2 L L H H L H L H H H H L 13 11 12 10 8 9 Outputs O1 O3 Figure 2. Logic Diagram ORDERING INFORMATION Package Shipping SOIC-14 (Pb-Free) 2500 Tape & Reel MC74LVX00DTR2G TSSOP-14* 2500 Tape & Reel MC74LVX00MG SOEIAJ-14 (Pb-Free) 50 Units / Rail MC74LVX00MELG SOEIAJ-14 (Pb-Free) 2000 Tape & Reel Device MC74LVX00DR2G For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free. http://onsemi.com 2 MC74LVX00 IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII MAXIMUM RATINGS Symbol Value Unit VCC DC Supply Voltage Parameter -0.5 to +7.0 V VIN DC Input Voltage -0.5 to +7.0 V Vout DC Output Voltage -0.5 to VCC +0.5 V IIK Input Diode Current -20 mA IOK Output Diode Current 20 mA Iout DC Output Current, per Pin 25 mA ICC DC Supply Current, VCC and GND Pins 50 mA PD Power Dissipation 180 mW Tstg Storage Temperature -65 to +150 _C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIII IIIIIIIIII IIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIII IIIIII III III IIII III III IIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit 2.0 3.6 V DC Input Voltage 0 5.5 V DC Output Voltage 0 VCC V -40 +85 _C 0 100 ns/V VCC DC Supply Voltage VIN Vout TA Dt/DV Operating Temperature, All Package Types Input Rise and Fall Time DC ELECTRICAL CHARACTERISTICS Symbol Parameter Test Conditions TA = 25C VCC V Min 1.5 2.0 2.4 VIH High-Level Input Voltage 2.0 3.0 3.6 VIL Low-Level Input Voltage 2.0 3.0 3.6 VOH High-Level Output Voltage (VIN = VIH or VIL) IOH = -50 mA IOH = -50 mA IOH = -4 mA 2.0 3.0 3.0 VOL Low-Level Output Voltage (VIN = VIH or VIL) IOL = 50 mA IOL = 50 mA IOL = 4 mA 2.0 3.0 3.0 Iin Input Leakage Current VIN = 5.5 V or GND ICC Quiescent Supply Current VIN = VCC or GND Typ TA = -40 to 85C Max Min 1.5 2.0 2.4 0.5 0.8 0.8 1.9 2.9 2.58 Max 2.0 3.0 V 0.5 0.8 0.8 1.9 2.9 2.48 V V 0.1 0.1 0.36 0.1 0.1 0.44 V 3.6 0.1 1.0 mA 3.6 2.0 20.0 mA http://onsemi.com 3 0.0 0.0 Unit MC74LVX00 IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIII IIIIIIIII IIIIIII IIII IIIIIIII IIIIIIIII III III III III IIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIII IIIIIIIII III III III III IIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) TA = 25C Symbol Parameter tPLH, tPHL Propagation Delay, Input to Output tOSHL tOSLH Min Test Conditions Output-to-Output Skew (Note 1) TA = - 40 to 85C Typ Max Min Max Unit ns VCC = 2.7 V CL = 15 pF CL = 50 pF 5.4 7.9 10.1 13.6 1.0 1.0 12.5 16.0 VCC = 3.3 0.3 V CL = 15 pF CL = 50 pF 4.1 6.6 6.2 9.7 1.0 1.0 7.5 11.0 VCC = 2.7 V VCC = 3.3 0.3 V CL = 50 pF CL = 50 pF 1.5 1.5 1.5 1.5 ns 1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH); parameter guaranteed by design. IIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIII IIIIIIII IIIIII III IIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIII IIIIIIIII IIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIII IIIIII IIIIII IIIIII IIIIIII IIIIIII III CAPACITIVE CHARACTERISTICS TA = 25C Symbol Min Parameter TA = -40 to 85C Typ Max 10 Cin Input Capacitance 4 CPD Power Dissipation Capacitance (Note 2) 19 Min Max Unit 10 pF pF 2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 4 (per gate). CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 3.3 V, Measured in SOIC Package) TA = 25C Symbol Characteristic Typ Max Unit VOLP Quiet Output Maximum Dynamic VOL 0.3 0.5 V VOLV Quiet Output Minimum Dynamic VOL -0.3 -0.5 V VIHD Minimum High Level Dynamic Input Voltage 2.0 V VILD Maximum Low Level Dynamic Input Voltage 0.8 V TEST POINT VCC A or B OUTPUT 50% DEVICE UNDER TEST GND tPLH O tPHL CL* 50% VCC *Includes all probe and jig capacitance Figure 3. Switching Waveforms Figure 4. Test Circuit http://onsemi.com 4 MC74LVX00 PACKAGE DIMENSIONS SOIC-14 D SUFFIX CASE 751A-03 ISSUE J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. -A- 14 8 -B- P 7 PL 0.25 (0.010) B M 7 1 G -T- D 14 PL 0.25 (0.010) T B S A DIM A B C D F G J K M P R J M K M F R X 45 _ C SEATING PLANE M S SOLDERING FOOTPRINT 7X 7.04 14X 1.52 1 14X 0.58 1.27 PITCH DIMENSIONS: MILLIMETERS http://onsemi.com 5 MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 MC74LVX00 PACKAGE DIMENSIONS TSSOP-14 DT SUFFIX CASE 948G-01 ISSUE B 14X K REF 0.10 (0.004) 0.15 (0.006) T U M T U V S S N 2X 14 L/2 0.25 (0.010) 8 M B -U- L PIN 1 IDENT. N F 7 1 0.15 (0.006) T U NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. S S DETAIL E K A -V- EEE CCC CCC EEE K1 J J1 SECTION N-N -W- C 0.10 (0.004) -T- SEATING PLANE D H G DETAIL E DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ SOLDERING FOOTPRINT 7.06 1 0.65 PITCH 14X 0.36 14X 1.26 DIMENSIONS: MILLIMETERS http://onsemi.com 6 INCHES MIN MAX 0.193 0.200 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ MC74LVX00 PACKAGE DIMENSIONS SOEIAJ-14 M SUFFIX CASE 965-01 ISSUE O 14 LE 8 Q1 E HE L 7 1 M_ DETAIL P Z D VIEW P A e DIM A A1 b c D E e HE L LE M Q1 Z A1 b 0.13 (0.005) c NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). M 0.10 (0.004) MILLIMETERS MIN MAX --2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --1.42 INCHES MIN MAX --0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --0.056 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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