CP2400/1/2/3
Rev. 1.0 3
1. System Overview.................................................................................................................5
1.1. Typical Connection Diagram..........................................................................................9
2. Absolute Maximum Ratings..............................................................................................11
3. Electrical Characteristics..................................................................................................12
4. Pinout and Package Definitions.......................................................................................17
5. Clocking Options...............................................................................................................32
6. Internal Registers and Memory ........................................................................................34
6.1. Accessing Internal Registers and RAM over the SPI Interface....................................35
6.2. Accessing Internal Registers and RAM over the SMBus Interface..............................36
6.3. Internal Registers.........................................................................................................37
7. Interrupt Sources...............................................................................................................40
8. Reset Sources....................................................................................................................47
8.1. Reset Initialization........................................................................................................47
8.2. Power-On Reset...........................................................................................................48
8.3. External Pin Reset........................................................................................................48
9. Power Modes......................................................................................................................49
9.1. Normal Mode................................................................................................................50
9.2. RAM Preservation Mode..............................................................................................50
9.3. Ultra Low Power LCD Mode.........................................................................................51
9.4. Ultra Low Power SmaRTClock Mode...........................................................................52
9.5. Shutdown Mode ...........................................................................................................53
9.6. Determining the ULP Mode Wake-Up Source..............................................................55
9.7. Port Match Functionality in the Ultra Low Power Modes..............................................56
9.8. Disabling Secondary Device Functions........................................................................58
10.Port Input/Output...............................................................................................................60
10.1.Port I/O Modes of Operation........................................................................................61
10.2.Assigning Port I/O Pins to Analog and Digital Functions.............................................62
10.3.Active Mode Port Match...............................................................................................63
10.4.Registers for Accessing and Configuring Port I/O .......................................................65
11.SmaRTClock (Real Time Clock)........................................................................................69
11.1.SmaRTClock Interface.................................................................................................70
11.2.SmaRTClock Clocking Sources...................................................................................74
11.3.SmaRTClock Timer and Alarm Function .....................................................................77
12.LCD Segment Driver..........................................................................................................83
12.1.Initializing the LCD Segment Driver.............................................................................83
12.2.LCD Configuration . ......................................................................................................84
12.3.LCD Bias Generation and Contrast Adjustment ..........................................................85
12.4.LCD Timing Generation...............................................................................................87
12.5.Mapping ULP Memory to LCD Pins.............................................................................90
12.6.Blinking LCD Segments...............................................................................................91
13.Timers.................................................................................................................................92
13.1.Timer 0 .......................................................................................................................92
13.2.Timer 1 .......................................................................................................................96
14.Serial Peripheral Interface (SPI) .....................................................................................101
14.1.Signal Descriptions....................................................................................................101
14.2.Serial Clock Timing....................................................................................................102